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Commits on Oct 27, 2021

• [amdgpu] Handle the case where there is no scavenged register.

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  darkbuck

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Commits on Sep 4, 2021

• [NFC] Run clang-format on llvm/lib/Trget/AVR/

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  xgupta

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Commits on Feb 3, 2020

• [NFC] unsigned->Register in storeRegTo/loadRegFromStack

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  Simon Moll

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Commits on Nov 11, 2019

• Use MCRegister in copyPhysReg

  arsenm

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Commits on Jan 19, 2019

• Update the file headers across all of the LLVM projects in the monorepo

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  chandlerc

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Commits on Nov 8, 2017

• Target/TargetInstrInfo.h -> CodeGen/TargetInstrInfo.h to match layering

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  dwblaikie

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Commits on Oct 4, 2017

• [AVR] Insert JMP for long branches

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  dylanmckay

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Commits on Jul 11, 2017

• [AVR] Use the generic branch relaxer

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  dylanmckay

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Commits on Sep 14, 2016

• Finish renaming remaining analyzeBranch functions

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  arsenm

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• Make analyzeBranch family of instruction names consistent

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  arsenm

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• AArch64: Use TTI branch functions in branch relaxation

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  arsenm

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Commits on Aug 16, 2016

• [AVR] Fix compile errors

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  Job Noorman

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Commits on Jul 29, 2016

• TargetInstrInfo: add virtual function getInstSizeInBytes

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  Sjoerd Meijer

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Commits on Jul 28, 2016

• TargetInstrInfo: rename GetInstSizeInBytes to getInstSizeInBytes. NFC

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  Sjoerd Meijer

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Commits on Jul 15, 2016

• Rename AnalyzeBranch* to analyzeBranch*.

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  jpienaar

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Commits on Jun 30, 2016

• CodeGen: Use MachineInstr& in TargetInstrInfo, NFC

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  dexonsmith

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Commits on Jun 12, 2016

• Pass DebugLoc and SDLoc by const ref.

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  d0k

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Commits on May 18, 2016

• [AVR] Convert C style comments to C++

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  Dylan McKay

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Commits on May 6, 2016

• [AVR] Add a majority of the backend code

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  Dylan McKay

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