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Simon Moll
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[NFC] unsigned->Register in storeRegTo/loadRegFromStack
Summary: This patch makes progress on the 'unsigned -> Register' rewrite for `TargetInstrInfo::loadRegFromStack` and `TII::storeRegToStack`. Reviewers: arsenm, craig.topper, uweigand, jpienaar, atanasyan, venkatra, robertlytton, dylanmckay, t.p.northover, kparzysz, tstellar, k-ishizaka Reviewed By: arsenm Subscribers: wuzish, merge_guards_bot, jyknight, sdardis, nemanjai, jvesely, wdng, nhaehnle, hiraditya, kbarton, fedor.sergeev, asb, rbar, johnrusso, simoncook, sabuasal, niosHD, jrtc27, MaskRay, zzheng, edward-jones, rogfer01, MartinMosbeck, brucehoult, the_o, PkmX, jocewei, jsji, Jim, lenary, s.egerton, pzheng, sameer.abuasal, apazos, luismarques, kerbowa, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D73870
1 parent fc19465 commit 5c8ba50

40 files changed

+88
-88
lines changed

‎llvm/include/llvm/CodeGen/TargetInstrInfo.h

+2-2
Original file line numberDiff line numberDiff line change
@@ -976,7 +976,7 @@ class TargetInstrInfo : public MCInstrInfo {
976976
/// is true, the register operand is the last use and must be marked kill.
977977
virtual void storeRegToStackSlot(MachineBasicBlock &MBB,
978978
MachineBasicBlock::iterator MI,
979-
unsigned SrcReg, bool isKill, int FrameIndex,
979+
Register SrcReg, bool isKill, int FrameIndex,
980980
const TargetRegisterClass *RC,
981981
const TargetRegisterInfo *TRI) const {
982982
llvm_unreachable("Target didn't implement "
@@ -988,7 +988,7 @@ class TargetInstrInfo : public MCInstrInfo {
988988
/// machine basic block before the specified machine instruction.
989989
virtual void loadRegFromStackSlot(MachineBasicBlock &MBB,
990990
MachineBasicBlock::iterator MI,
991-
unsigned DestReg, int FrameIndex,
991+
Register DestReg, int FrameIndex,
992992
const TargetRegisterClass *RC,
993993
const TargetRegisterInfo *TRI) const {
994994
llvm_unreachable("Target didn't implement "

‎llvm/lib/Target/AArch64/AArch64InstrInfo.cpp

+8-8
Original file line numberDiff line numberDiff line change
@@ -2865,11 +2865,11 @@ static void storeRegPairToStackSlot(const TargetRegisterInfo &TRI,
28652865
MachineBasicBlock &MBB,
28662866
MachineBasicBlock::iterator InsertBefore,
28672867
const MCInstrDesc &MCID,
2868-
unsigned SrcReg, bool IsKill,
2868+
Register SrcReg, bool IsKill,
28692869
unsigned SubIdx0, unsigned SubIdx1, int FI,
28702870
MachineMemOperand *MMO) {
2871-
unsigned SrcReg0 = SrcReg;
2872-
unsigned SrcReg1 = SrcReg;
2871+
Register SrcReg0 = SrcReg;
2872+
Register SrcReg1 = SrcReg;
28732873
if (Register::isPhysicalRegister(SrcReg)) {
28742874
SrcReg0 = TRI.getSubReg(SrcReg, SubIdx0);
28752875
SubIdx0 = 0;
@@ -2885,7 +2885,7 @@ static void storeRegPairToStackSlot(const TargetRegisterInfo &TRI,
28852885
}
28862886

28872887
void AArch64InstrInfo::storeRegToStackSlot(
2888-
MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, unsigned SrcReg,
2888+
MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, Register SrcReg,
28892889
bool isKill, int FI, const TargetRegisterClass *RC,
28902890
const TargetRegisterInfo *TRI) const {
28912891
MachineFunction &MF = *MBB.getParent();
@@ -3005,11 +3005,11 @@ static void loadRegPairFromStackSlot(const TargetRegisterInfo &TRI,
30053005
MachineBasicBlock &MBB,
30063006
MachineBasicBlock::iterator InsertBefore,
30073007
const MCInstrDesc &MCID,
3008-
unsigned DestReg, unsigned SubIdx0,
3008+
Register DestReg, unsigned SubIdx0,
30093009
unsigned SubIdx1, int FI,
30103010
MachineMemOperand *MMO) {
3011-
unsigned DestReg0 = DestReg;
3012-
unsigned DestReg1 = DestReg;
3011+
Register DestReg0 = DestReg;
3012+
Register DestReg1 = DestReg;
30133013
bool IsUndef = true;
30143014
if (Register::isPhysicalRegister(DestReg)) {
30153015
DestReg0 = TRI.getSubReg(DestReg, SubIdx0);
@@ -3027,7 +3027,7 @@ static void loadRegPairFromStackSlot(const TargetRegisterInfo &TRI,
30273027
}
30283028

30293029
void AArch64InstrInfo::loadRegFromStackSlot(
3030-
MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, unsigned DestReg,
3030+
MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, Register DestReg,
30313031
int FI, const TargetRegisterClass *RC,
30323032
const TargetRegisterInfo *TRI) const {
30333033
MachineFunction &MF = *MBB.getParent();

‎llvm/lib/Target/AArch64/AArch64InstrInfo.h

+2-2
Original file line numberDiff line numberDiff line change
@@ -148,13 +148,13 @@ class AArch64InstrInfo final : public AArch64GenInstrInfo {
148148
bool KillSrc) const override;
149149

150150
void storeRegToStackSlot(MachineBasicBlock &MBB,
151-
MachineBasicBlock::iterator MBBI, unsigned SrcReg,
151+
MachineBasicBlock::iterator MBBI, Register SrcReg,
152152
bool isKill, int FrameIndex,
153153
const TargetRegisterClass *RC,
154154
const TargetRegisterInfo *TRI) const override;
155155

156156
void loadRegFromStackSlot(MachineBasicBlock &MBB,
157-
MachineBasicBlock::iterator MBBI, unsigned DestReg,
157+
MachineBasicBlock::iterator MBBI, Register DestReg,
158158
int FrameIndex, const TargetRegisterClass *RC,
159159
const TargetRegisterInfo *TRI) const override;
160160

‎llvm/lib/Target/AMDGPU/SIInstrInfo.cpp

+2-2
Original file line numberDiff line numberDiff line change
@@ -1121,7 +1121,7 @@ static unsigned getAGPRSpillSaveOpcode(unsigned Size) {
11211121

11221122
void SIInstrInfo::storeRegToStackSlot(MachineBasicBlock &MBB,
11231123
MachineBasicBlock::iterator MI,
1124-
unsigned SrcReg, bool isKill,
1124+
Register SrcReg, bool isKill,
11251125
int FrameIndex,
11261126
const TargetRegisterClass *RC,
11271127
const TargetRegisterInfo *TRI) const {
@@ -1251,7 +1251,7 @@ static unsigned getAGPRSpillRestoreOpcode(unsigned Size) {
12511251

12521252
void SIInstrInfo::loadRegFromStackSlot(MachineBasicBlock &MBB,
12531253
MachineBasicBlock::iterator MI,
1254-
unsigned DestReg, int FrameIndex,
1254+
Register DestReg, int FrameIndex,
12551255
const TargetRegisterClass *RC,
12561256
const TargetRegisterInfo *TRI) const {
12571257
MachineFunction *MF = MBB.getParent();

‎llvm/lib/Target/AMDGPU/SIInstrInfo.h

+2-2
Original file line numberDiff line numberDiff line change
@@ -220,13 +220,13 @@ class SIInstrInfo final : public AMDGPUGenInstrInfo {
220220
unsigned SrcReg, int Value) const;
221221

222222
void storeRegToStackSlot(MachineBasicBlock &MBB,
223-
MachineBasicBlock::iterator MI, unsigned SrcReg,
223+
MachineBasicBlock::iterator MI, Register SrcReg,
224224
bool isKill, int FrameIndex,
225225
const TargetRegisterClass *RC,
226226
const TargetRegisterInfo *TRI) const override;
227227

228228
void loadRegFromStackSlot(MachineBasicBlock &MBB,
229-
MachineBasicBlock::iterator MI, unsigned DestReg,
229+
MachineBasicBlock::iterator MI, Register DestReg,
230230
int FrameIndex, const TargetRegisterClass *RC,
231231
const TargetRegisterInfo *TRI) const override;
232232

‎llvm/lib/Target/ARC/ARCInstrInfo.cpp

+2-2
Original file line numberDiff line numberDiff line change
@@ -292,7 +292,7 @@ void ARCInstrInfo::copyPhysReg(MachineBasicBlock &MBB,
292292

293293
void ARCInstrInfo::storeRegToStackSlot(MachineBasicBlock &MBB,
294294
MachineBasicBlock::iterator I,
295-
unsigned SrcReg, bool isKill,
295+
Register SrcReg, bool isKill,
296296
int FrameIndex,
297297
const TargetRegisterClass *RC,
298298
const TargetRegisterInfo *TRI) const {
@@ -321,7 +321,7 @@ void ARCInstrInfo::storeRegToStackSlot(MachineBasicBlock &MBB,
321321

322322
void ARCInstrInfo::loadRegFromStackSlot(MachineBasicBlock &MBB,
323323
MachineBasicBlock::iterator I,
324-
unsigned DestReg, int FrameIndex,
324+
Register DestReg, int FrameIndex,
325325
const TargetRegisterClass *RC,
326326
const TargetRegisterInfo *TRI) const {
327327
DebugLoc dl = MBB.findDebugLoc(I);

‎llvm/lib/Target/ARC/ARCInstrInfo.h

+2-2
Original file line numberDiff line numberDiff line change
@@ -68,13 +68,13 @@ class ARCInstrInfo : public ARCGenInstrInfo {
6868
bool KillSrc) const override;
6969

7070
void storeRegToStackSlot(MachineBasicBlock &MBB,
71-
MachineBasicBlock::iterator MI, unsigned SrcReg,
71+
MachineBasicBlock::iterator MI, Register SrcReg,
7272
bool isKill, int FrameIndex,
7373
const TargetRegisterClass *RC,
7474
const TargetRegisterInfo *TRI) const override;
7575

7676
void loadRegFromStackSlot(MachineBasicBlock &MBB,
77-
MachineBasicBlock::iterator MI, unsigned DestReg,
77+
MachineBasicBlock::iterator MI, Register DestReg,
7878
int FrameIndex, const TargetRegisterClass *RC,
7979
const TargetRegisterInfo *TRI) const override;
8080

‎llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp

+2-2
Original file line numberDiff line numberDiff line change
@@ -1023,7 +1023,7 @@ ARMBaseInstrInfo::AddDReg(MachineInstrBuilder &MIB, unsigned Reg,
10231023

10241024
void ARMBaseInstrInfo::
10251025
storeRegToStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator I,
1026-
unsigned SrcReg, bool isKill, int FI,
1026+
Register SrcReg, bool isKill, int FI,
10271027
const TargetRegisterClass *RC,
10281028
const TargetRegisterInfo *TRI) const {
10291029
MachineFunction &MF = *MBB.getParent();
@@ -1264,7 +1264,7 @@ unsigned ARMBaseInstrInfo::isStoreToStackSlotPostFE(const MachineInstr &MI,
12641264

12651265
void ARMBaseInstrInfo::
12661266
loadRegFromStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator I,
1267-
unsigned DestReg, int FI,
1267+
Register DestReg, int FI,
12681268
const TargetRegisterClass *RC,
12691269
const TargetRegisterInfo *TRI) const {
12701270
DebugLoc DL;

‎llvm/lib/Target/ARM/ARMBaseInstrInfo.h

+2-2
Original file line numberDiff line numberDiff line change
@@ -207,13 +207,13 @@ class ARMBaseInstrInfo : public ARMGenInstrInfo {
207207

208208
void storeRegToStackSlot(MachineBasicBlock &MBB,
209209
MachineBasicBlock::iterator MBBI,
210-
unsigned SrcReg, bool isKill, int FrameIndex,
210+
Register SrcReg, bool isKill, int FrameIndex,
211211
const TargetRegisterClass *RC,
212212
const TargetRegisterInfo *TRI) const override;
213213

214214
void loadRegFromStackSlot(MachineBasicBlock &MBB,
215215
MachineBasicBlock::iterator MBBI,
216-
unsigned DestReg, int FrameIndex,
216+
Register DestReg, int FrameIndex,
217217
const TargetRegisterClass *RC,
218218
const TargetRegisterInfo *TRI) const override;
219219

‎llvm/lib/Target/ARM/Thumb1InstrInfo.cpp

+2-2
Original file line numberDiff line numberDiff line change
@@ -76,7 +76,7 @@ void Thumb1InstrInfo::copyPhysReg(MachineBasicBlock &MBB,
7676

7777
void Thumb1InstrInfo::
7878
storeRegToStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator I,
79-
unsigned SrcReg, bool isKill, int FI,
79+
Register SrcReg, bool isKill, int FI,
8080
const TargetRegisterClass *RC,
8181
const TargetRegisterInfo *TRI) const {
8282
assert((RC == &ARM::tGPRRegClass ||
@@ -104,7 +104,7 @@ storeRegToStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator I,
104104

105105
void Thumb1InstrInfo::
106106
loadRegFromStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator I,
107-
unsigned DestReg, int FI,
107+
Register DestReg, int FI,
108108
const TargetRegisterClass *RC,
109109
const TargetRegisterInfo *TRI) const {
110110
assert(

‎llvm/lib/Target/ARM/Thumb1InstrInfo.h

+2-2
Original file line numberDiff line numberDiff line change
@@ -42,13 +42,13 @@ class Thumb1InstrInfo : public ARMBaseInstrInfo {
4242
bool KillSrc) const override;
4343
void storeRegToStackSlot(MachineBasicBlock &MBB,
4444
MachineBasicBlock::iterator MBBI,
45-
unsigned SrcReg, bool isKill, int FrameIndex,
45+
Register SrcReg, bool isKill, int FrameIndex,
4646
const TargetRegisterClass *RC,
4747
const TargetRegisterInfo *TRI) const override;
4848

4949
void loadRegFromStackSlot(MachineBasicBlock &MBB,
5050
MachineBasicBlock::iterator MBBI,
51-
unsigned DestReg, int FrameIndex,
51+
Register DestReg, int FrameIndex,
5252
const TargetRegisterClass *RC,
5353
const TargetRegisterInfo *TRI) const override;
5454

‎llvm/lib/Target/ARM/Thumb2InstrInfo.cpp

+2-2
Original file line numberDiff line numberDiff line change
@@ -133,7 +133,7 @@ void Thumb2InstrInfo::copyPhysReg(MachineBasicBlock &MBB,
133133

134134
void Thumb2InstrInfo::
135135
storeRegToStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator I,
136-
unsigned SrcReg, bool isKill, int FI,
136+
Register SrcReg, bool isKill, int FI,
137137
const TargetRegisterClass *RC,
138138
const TargetRegisterInfo *TRI) const {
139139
DebugLoc DL;
@@ -176,7 +176,7 @@ storeRegToStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator I,
176176

177177
void Thumb2InstrInfo::
178178
loadRegFromStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator I,
179-
unsigned DestReg, int FI,
179+
Register DestReg, int FI,
180180
const TargetRegisterClass *RC,
181181
const TargetRegisterInfo *TRI) const {
182182
MachineFunction &MF = *MBB.getParent();

‎llvm/lib/Target/ARM/Thumb2InstrInfo.h

+2-2
Original file line numberDiff line numberDiff line change
@@ -44,13 +44,13 @@ class Thumb2InstrInfo : public ARMBaseInstrInfo {
4444

4545
void storeRegToStackSlot(MachineBasicBlock &MBB,
4646
MachineBasicBlock::iterator MBBI,
47-
unsigned SrcReg, bool isKill, int FrameIndex,
47+
Register SrcReg, bool isKill, int FrameIndex,
4848
const TargetRegisterClass *RC,
4949
const TargetRegisterInfo *TRI) const override;
5050

5151
void loadRegFromStackSlot(MachineBasicBlock &MBB,
5252
MachineBasicBlock::iterator MBBI,
53-
unsigned DestReg, int FrameIndex,
53+
Register DestReg, int FrameIndex,
5454
const TargetRegisterClass *RC,
5555
const TargetRegisterInfo *TRI) const override;
5656

‎llvm/lib/Target/AVR/AVRInstrInfo.cpp

+2-2
Original file line numberDiff line numberDiff line change
@@ -119,7 +119,7 @@ unsigned AVRInstrInfo::isStoreToStackSlot(const MachineInstr &MI,
119119

120120
void AVRInstrInfo::storeRegToStackSlot(MachineBasicBlock &MBB,
121121
MachineBasicBlock::iterator MI,
122-
unsigned SrcReg, bool isKill,
122+
Register SrcReg, bool isKill,
123123
int FrameIndex,
124124
const TargetRegisterClass *RC,
125125
const TargetRegisterInfo *TRI) const {
@@ -158,7 +158,7 @@ void AVRInstrInfo::storeRegToStackSlot(MachineBasicBlock &MBB,
158158

159159
void AVRInstrInfo::loadRegFromStackSlot(MachineBasicBlock &MBB,
160160
MachineBasicBlock::iterator MI,
161-
unsigned DestReg, int FrameIndex,
161+
Register DestReg, int FrameIndex,
162162
const TargetRegisterClass *RC,
163163
const TargetRegisterInfo *TRI) const {
164164
DebugLoc DL;

‎llvm/lib/Target/AVR/AVRInstrInfo.h

+2-2
Original file line numberDiff line numberDiff line change
@@ -75,12 +75,12 @@ class AVRInstrInfo : public AVRGenInstrInfo {
7575
const DebugLoc &DL, MCRegister DestReg, MCRegister SrcReg,
7676
bool KillSrc) const override;
7777
void storeRegToStackSlot(MachineBasicBlock &MBB,
78-
MachineBasicBlock::iterator MI, unsigned SrcReg,
78+
MachineBasicBlock::iterator MI, Register SrcReg,
7979
bool isKill, int FrameIndex,
8080
const TargetRegisterClass *RC,
8181
const TargetRegisterInfo *TRI) const override;
8282
void loadRegFromStackSlot(MachineBasicBlock &MBB,
83-
MachineBasicBlock::iterator MI, unsigned DestReg,
83+
MachineBasicBlock::iterator MI, Register DestReg,
8484
int FrameIndex, const TargetRegisterClass *RC,
8585
const TargetRegisterInfo *TRI) const override;
8686
unsigned isLoadFromStackSlot(const MachineInstr &MI,

‎llvm/lib/Target/BPF/BPFInstrInfo.cpp

+2-2
Original file line numberDiff line numberDiff line change
@@ -123,7 +123,7 @@ bool BPFInstrInfo::expandPostRAPseudo(MachineInstr &MI) const {
123123

124124
void BPFInstrInfo::storeRegToStackSlot(MachineBasicBlock &MBB,
125125
MachineBasicBlock::iterator I,
126-
unsigned SrcReg, bool IsKill, int FI,
126+
Register SrcReg, bool IsKill, int FI,
127127
const TargetRegisterClass *RC,
128128
const TargetRegisterInfo *TRI) const {
129129
DebugLoc DL;
@@ -146,7 +146,7 @@ void BPFInstrInfo::storeRegToStackSlot(MachineBasicBlock &MBB,
146146

147147
void BPFInstrInfo::loadRegFromStackSlot(MachineBasicBlock &MBB,
148148
MachineBasicBlock::iterator I,
149-
unsigned DestReg, int FI,
149+
Register DestReg, int FI,
150150
const TargetRegisterClass *RC,
151151
const TargetRegisterInfo *TRI) const {
152152
DebugLoc DL;

‎llvm/lib/Target/BPF/BPFInstrInfo.h

+2-2
Original file line numberDiff line numberDiff line change
@@ -36,13 +36,13 @@ class BPFInstrInfo : public BPFGenInstrInfo {
3636
bool expandPostRAPseudo(MachineInstr &MI) const override;
3737

3838
void storeRegToStackSlot(MachineBasicBlock &MBB,
39-
MachineBasicBlock::iterator MBBI, unsigned SrcReg,
39+
MachineBasicBlock::iterator MBBI, Register SrcReg,
4040
bool isKill, int FrameIndex,
4141
const TargetRegisterClass *RC,
4242
const TargetRegisterInfo *TRI) const override;
4343

4444
void loadRegFromStackSlot(MachineBasicBlock &MBB,
45-
MachineBasicBlock::iterator MBBI, unsigned DestReg,
45+
MachineBasicBlock::iterator MBBI, Register DestReg,
4646
int FrameIndex, const TargetRegisterClass *RC,
4747
const TargetRegisterInfo *TRI) const override;
4848
bool analyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB,

‎llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp

+2-2
Original file line numberDiff line numberDiff line change
@@ -888,7 +888,7 @@ void HexagonInstrInfo::copyPhysReg(MachineBasicBlock &MBB,
888888
}
889889

890890
void HexagonInstrInfo::storeRegToStackSlot(MachineBasicBlock &MBB,
891-
MachineBasicBlock::iterator I, unsigned SrcReg, bool isKill, int FI,
891+
MachineBasicBlock::iterator I, Register SrcReg, bool isKill, int FI,
892892
const TargetRegisterClass *RC, const TargetRegisterInfo *TRI) const {
893893
DebugLoc DL = MBB.findDebugLoc(I);
894894
MachineFunction &MF = *MBB.getParent();
@@ -934,7 +934,7 @@ void HexagonInstrInfo::storeRegToStackSlot(MachineBasicBlock &MBB,
934934
}
935935

936936
void HexagonInstrInfo::loadRegFromStackSlot(
937-
MachineBasicBlock &MBB, MachineBasicBlock::iterator I, unsigned DestReg,
937+
MachineBasicBlock &MBB, MachineBasicBlock::iterator I, Register DestReg,
938938
int FI, const TargetRegisterClass *RC,
939939
const TargetRegisterInfo *TRI) const {
940940
DebugLoc DL = MBB.findDebugLoc(I);

‎llvm/lib/Target/Hexagon/HexagonInstrInfo.h

+2-2
Original file line numberDiff line numberDiff line change
@@ -182,7 +182,7 @@ class HexagonInstrInfo : public HexagonGenInstrInfo {
182182
/// is true, the register operand is the last use and must be marked kill.
183183
void storeRegToStackSlot(MachineBasicBlock &MBB,
184184
MachineBasicBlock::iterator MBBI,
185-
unsigned SrcReg, bool isKill, int FrameIndex,
185+
Register SrcReg, bool isKill, int FrameIndex,
186186
const TargetRegisterClass *RC,
187187
const TargetRegisterInfo *TRI) const override;
188188

@@ -191,7 +191,7 @@ class HexagonInstrInfo : public HexagonGenInstrInfo {
191191
/// machine basic block before the specified machine instruction.
192192
void loadRegFromStackSlot(MachineBasicBlock &MBB,
193193
MachineBasicBlock::iterator MBBI,
194-
unsigned DestReg, int FrameIndex,
194+
Register DestReg, int FrameIndex,
195195
const TargetRegisterClass *RC,
196196
const TargetRegisterInfo *TRI) const override;
197197

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