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Commits on May 5, 2021

• [MachineCSE][NFC]: Refactor and comment on preventing CSE for isConvergent instrs

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  mkitzan

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Commits on Apr 23, 2021

• [MachineCSE] Prevent CSE of non-local convergent instrs

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  mkitzan

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Commits on Jan 22, 2021

• [CodeGen] Use llvm::append_range (NFC)

  kazutakahirata

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Commits on Oct 28, 2020

• [NFC] Use [MC]Register in CSE & LICM

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  jaingaurav

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Commits on Sep 26, 2020

• MachineCSE.cpp - use auto const& iterators in for-range loops to avoid copies. NFCI.

  RKSimon

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Commits on Sep 21, 2020

• MachineCSE.cpp - use auto const& iterator in for-range loop to avoid copies. NFCI.

  RKSimon

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Commits on Jul 6, 2020

• DomTree: Remove getChildren() accessor

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  nhaehnle

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Commits on Apr 6, 2020

• [MachineCSE] Don't carry the wrong location when hoisting

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  Davide Italiano

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Commits on Nov 14, 2019

• Sink all InitializePasses.h includes

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  rnk

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Commits on Sep 2, 2019

• [DebugInfo] LiveDebugValues: correctly discriminate kinds of variable locations

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  jmorse

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Commits on Aug 15, 2019

• Apply llvm-prefer-register-over-unsigned from clang-tidy to LLVM

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  dsandersllvm

  committed
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Commits on Aug 7, 2019

• [MachineCSE][NFC] Use 'profitable' rather than 'beneficial' to name method.

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  Kai Luo

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Commits on Aug 1, 2019

• Finish moving TargetRegisterInfo::isVirtualRegister() and friends to llvm::Register as started by r367614. NFC

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  dsandersllvm

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Commits on Jul 19, 2019

• [MachineCSE][MachinePRE] Avoid hoisting code from code regions into hot BBs.

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  Kai Luo

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Commits on Jun 12, 2019

• [MIR] Skip hoisting to basic block which may throw exception or return

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  anton-afanasyev

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Commits on Jun 9, 2019

• [MIR] Add simple PRE pass to MachineCSE

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  anton-afanasyev

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Commits on Jun 5, 2019

• Allow target to handle STRICT floating-point nodes

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  uweigand

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Commits on May 27, 2019

• Revert r361356: "[MIR] Add simple PRE pass to MachineCSE"

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  dlj-NaN

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Commits on May 22, 2019

• [MIR] Add simple PRE pass to MachineCSE

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  anton-afanasyev

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Commits on May 3, 2019

• Revert "[MIR] Add simple PRE pass to MachineCSE"

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  anton-afanasyev

  committed
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• [MIR] Add simple PRE pass to MachineCSE

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  anton-afanasyev

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Commits on Feb 20, 2019

• [Codegen] Remove dead flags on Physical Defs in machine cse

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  davemgreen

  committed
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Commits on Jan 19, 2019

• Update the file headers across all of the LLVM projects in the monorepo

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  chandlerc

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Commits on Oct 20, 2018

• [MachineCSE][GlobalISel] Making sure MachineCSE works mid-GlobalISel (again)

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  ramntry

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Commits on Oct 1, 2018

• [DebugInfo][Dexter] Incorrect DBG_VALUE after MCP dead copy instruction removal.

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  CarlosAlbertoEnciso

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Commits on Aug 30, 2018

• [DWARF] Missing location debug information with -O2.

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  CarlosAlbertoEnciso

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Commits on Jun 12, 2018

• [MIR][MachineCSE] Implementing proper MachineInstr::getNumExplicitDefs()

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  ramntry

  committed
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Commits on May 14, 2018

• Rename DEBUG macro to LLVM_DEBUG.

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  nzaghen

  committed
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Commits on May 9, 2018

• [DebugInfo] Examine all uses of isDebugValue() for debug instructions.

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  ShivaChen

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Commits on May 4, 2018

• [MachineCSE] Rewrite a loop checking if a block is in a set of blocks without using a set. NFC.

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  Michael Zolotukhin

  committed
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Commits on Jan 18, 2018

• GlobalISel: Make MachineCSE runnable in the middle of the GlobalISel

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  bogner

  committed
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Commits on Dec 15, 2017

• MachineFunction: Return reference from getFunction(); NFC

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  MatzeB

  committed
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Commits on Dec 7, 2017

• [CodeGen] Use MachineOperand::print in the MIRPrinter for MO_Register.

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  francisvm

  committed
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Commits on Nov 28, 2017

• [CodeGen] Print register names in lowercase in both MIR and debug output

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  francisvm

  committed
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Commits on Nov 20, 2017

• [MachineCSE] Add new callback for is caller preserved or constant physregs

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  Tony Jiang

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