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Commits on Jun 18, 2021

• [RISCV] Teach vsetvli insertion to remember when predecessors have same AVL and SEW/LMUL ratio if their VTYPEs otherwise mismatch.

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Commits on Jun 9, 2021

• [RISCV] Remove unused method from RISCVInsertVSETVLI. NFC

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Commits on Jun 4, 2021

• [RISCV] Teach vsetvli insertion pass that operations on masks don't care about SEW/LMUL.

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• [RISCV] Simplify some code in RISCVInsertVSETVLI by calling an existing function that does the same thing. NFCI

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Commits on May 27, 2021

• [RISCV] Teach VSETVLI insertion to look through PHIs to prove we don't need to insert a vsetvli.

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• [RISCV] Teach vsetvli insertion to use vsetvl x0, x0 form when we can tell that VLMAX and AVL haven't changed.

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Commits on May 26, 2021

• [RISCV] Use X0 as destination of inserted vsetvli when possible.

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• [RISCV] Don't propagate VL/VTYPE across inline assembly in the Insert VSETVLI pass.

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• [RISCV] Enable cross basic block aware vsetvli insertion

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Commits on May 24, 2021

• [RISCV] Add a vsetvli insert pass that can be extended to be aware of incoming VL/VTYPE from other basic blocks.

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