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Commits on Jul 9, 2021

• [PowerPC] Remove implicit use register after transformToImmFormFedByLI()

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  Kai Luo

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• Revert "GlobalISel/AArch64: don't optimize away redundant branches at -O0"

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  omjavaid

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• [ASan][AMDGPU] Make shadow offset match X86 on Linux

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  rksharma-yymd

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• [NFC][ScalarEvolution] Cleanup howManyLessThans.

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  efriedma-quic

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Commits on Jul 8, 2021

• Add AddDiscriminatorsPass to NPM default O0 pipeline

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  Yuanfang Chen

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• [AMDGPU] Mark more SOP instructions as rematerializable

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  rampitec

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• [ARM] Pass 2 instead of 0 to PHINode::Create in MVEGatherScatterLowering. NFC

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  topperc

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• [WebAssembly] Scalarize extract_vector_elt of binops

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  tlively

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• [InstCombine][NFC]Use only `replaceInstUsesWith`, NFC.

  alexey-bataev

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• PR51018: Remove explicit conversions from SmallString to StringRef to future-proof against C++23

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  dwblaikie

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• [msan] Handle funnel shifts

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  vitalybuka

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• [SLP]Improve vectorization of stores.

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  alexey-bataev

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• [AMDGPU] Simplify GEP construction (NFC)

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  nikic

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• [AMDGPU] Pass explicit GEP type in printf transform (NFC)

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  nikic

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• [NVPTX] Pass explicit GEP type (NFC)

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  nikic

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• [SLP][COST][X86]Improve cost model for masked gather.

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  alexey-bataev

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• [ARM] Use matchSimpleRecurrence to simplify some code in MVEGatherScatterLowering. NFCI

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  topperc

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• [Metadata] Decorate methods with 'const'. NFC.

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  darkbuck

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• Mips/GlobalISel: Remove custom splitToValueTypes

  arsenm

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• GlobalISel: Track original argument index in ArgInfo

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  arsenm

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• Mips/GlobalISel: Use correct callee calling convention

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  arsenm

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• [ScalarEvolution] Fix overflow in computeBECount.

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  efriedma-quic

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• [CostModel][X86] Account for older SSE targets with slow fp->int conversions

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  RKSimon

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• [AMDGPU] Set LoopInfo as preserved by SIAnnotateControlFlow

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  rampitec

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• [DebugInfo][InstrRef][4/4] Support DBG_INSTR_REF through all backend passes

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  jmorse

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• Recommit: Support: add llvm::thread class that supports specifying stack size.

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  TNorthover

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• [Instcombine]Transform reduction+(sext/zext(<n x i1>) to <n x im>) to [-]zext/trunc(ctpop(bitcast <n x i1> to in)) to im.

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  alexey-bataev

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• [Internalize] Preserve variables externally initialized.

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  darkbuck

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• [amdgpu] Remove the GlobalDCE pass prior to the internalization pass.

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  darkbuck

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• Revert "Support: add llvm::thread class that supports specifying stack size."

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  TNorthover

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• Support: add llvm::thread class that supports specifying stack size.

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  TNorthover

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• [AArch64][SVE] Add ISel patterns for floating point compare with zero instructions

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  brads55

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• [IR] Added operator delete to subclasses of User to avoid UB

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  MoritzS

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• [AMDGPU] Fix typo

  Flakebi

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• [ORC] Improve computeLocalDeps / computeNamedSymbolDependencies performance.

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  lhames

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