Allow configuration of Ethernet PHY clock source #916
Merged
Conversation
This file contains hidden or bidirectional Unicode text that may be interpreted or compiled differently than what appears below. To review, open the file in an editor that reveals hidden Unicode characters.
Learn more about bidirectional Unicode characters
Refer to espressif/esp-idf#1127 The internal APLL can be used to generate the 50MHz clock for the internal EMAC and the external Ethernet PHY. The clock can either be input on GPIO0 (as before) or output on GPIO0, GPIO16 or GPIO17 (only GPIO17 extensively tested). New example available.
Contributor
Author
|
travis seems to be missing some configuration files?!? |
Member
|
your sketch needs to be in it's own folder ;) currently Arduino will compile both sketches in that folder as one sketch. |
Refer to espressif/esp-idf#1127 The internal APLL can be used to generate the 50MHz clock for the internal EMAC and the external Ethernet PHY. The clock can either be input on GPIO0 (as before) or output on GPIO0, GPIO16 or GPIO17 (only GPIO17 extensively tested). New example available.
Contributor
Author
|
ping. please merge. |
Member
|
pong done :) |
Curclamas
pushed a commit
to Curclamas/arduino-esp32
that referenced
this pull request
Aug 21, 2018
* Allow configuration of Ethernet PHY clock source Refer to espressif/esp-idf#1127 The internal APLL can be used to generate the 50MHz clock for the internal EMAC and the external Ethernet PHY. The clock can either be input on GPIO0 (as before) or output on GPIO0, GPIO16 or GPIO17 (only GPIO17 extensively tested). New example available. * Allow configuration of Ethernet PHY clock source Refer to espressif/esp-idf#1127 The internal APLL can be used to generate the 50MHz clock for the internal EMAC and the external Ethernet PHY. The clock can either be input on GPIO0 (as before) or output on GPIO0, GPIO16 or GPIO17 (only GPIO17 extensively tested). New example available.
Sign up for free
to join this conversation on GitHub.
Already have an account?
Sign in to comment
2 participants
Add this suggestion to a batch that can be applied as a single commit.
This suggestion is invalid because no changes were made to the code.
Suggestions cannot be applied while the pull request is closed.
Suggestions cannot be applied while viewing a subset of changes.
Only one suggestion per line can be applied in a batch.
Add this suggestion to a batch that can be applied as a single commit.
Applying suggestions on deleted lines is not supported.
You must change the existing code in this line in order to create a valid suggestion.
Outdated suggestions cannot be applied.
This suggestion has been applied or marked resolved.
Suggestions cannot be applied from pending reviews.
Suggestions cannot be applied on multi-line comments.
Suggestions cannot be applied while the pull request is queued to merge.
Suggestion cannot be applied right now. Please check back later.
Refer to espressif/esp-idf#1127
The internal APLL can be used to generate the 50MHz clock for the internal EMAC and the external Ethernet PHY.
The clock can either be input on GPIO0 (as before) or output on GPIO0, GPIO16 or GPIO17 (only GPIO17 extensively tested).
New example available.