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10 changes: 5 additions & 5 deletions .gitattributes
Original file line number Diff line number Diff line change
@@ -1,11 +1,11 @@
# https://docs.github.com/en/github/using-git/configuring-git-to-handle-line-endings
# https://git-scm.com/docs/gitattributes
# https://git-scm.com/docs/git-config
# https://adaptivepatchwork.com/2012/03/01/mind-the-end-of-your-line/
# https://git-scm.com/docs/git-config
# https://adaptivepatchwork.com/2012/03/01/mind-the-end-of-your-line/

# Configure this repository to use Git's type detection algorithm to guess
# whether a file is text or binary. Text files will have line endings converted
# as if you had set
# Configure this repository to use Git's type detection algorithm to guess
# whether a file is text or binary. Text files will have line endings converted
# as if you had set
# eol=native
# That is, on Windows text files will have CRLF line endings in your working
# directory while on Linux and macOS your text files will have LF line endings
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4 changes: 2 additions & 2 deletions .github/workflows/windows.yaml
Original file line number Diff line number Diff line change
Expand Up @@ -5,7 +5,7 @@ on: [push, pull_request]

jobs:
"unittest_lint_sampleproject":
runs-on: ubuntu-latest
runs-on: windows-latest
steps:
- uses: actions/checkout@v2
- uses: ruby/setup-ruby@v1
Expand All @@ -23,7 +23,7 @@ jobs:
bundle exec arduino_ci.rb

NetworkLib:
runs-on: ubuntu-latest
runs-on: windows-latest
steps:
- uses: actions/checkout@v2
- uses: ruby/setup-ruby@v1
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10 changes: 5 additions & 5 deletions SampleProjects/TestSomething/test/godmode.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -236,9 +236,9 @@ unittest(shift_in) {
originalSize = state->digitalPin[clockPin].historySize();

input = shiftIn(dataPin, clockPin, MSBFIRST);
assertEqual(0x7C, (uint)input); // 0111 1100
assertEqual(0x7C, (uint16_t)input); // 0111 1100
assertEqual('|', input); // 0111 1100
assertEqual((uint)'|', (uint)input); // 0111 1100
assertEqual((uint16_t)'|', (uint16_t)input); // 0111 1100

// now verify clock
assertEqual(16, state->digitalPin[clockPin].historySize() - originalSize);
Expand All @@ -249,15 +249,15 @@ unittest(shift_in) {
state->reset();
state->digitalPin[dataPin].fromAscii("|", true); // 0111 1100
input = shiftIn(dataPin, clockPin, LSBFIRST); // <- note the LSB/MSB flip
assertEqual(0x3E, (uint)input); // 0011 1110
assertEqual(0x3E, (uint16_t)input); // 0011 1110
assertEqual('>', input); // 0011 1110
assertEqual((uint)'>', (uint)input); // 0011 1110
assertEqual((uint16_t)'>', (uint16_t)input); // 0011 1110

// test setting MSB
state->reset();
state->digitalPin[dataPin].fromAscii("U", true); // 0101 0101
input = shiftIn(dataPin, clockPin, LSBFIRST); // <- note the LSB/MSB flip
assertEqual(0xAA, (uint)input); // 1010 1010
assertEqual(0xAA, (uint16_t)input); // 1010 1010
}

unittest(shift_out) {
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