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GenType.cpp
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//===--- GenType.cpp - Swift IR Generation For Types ----------------------===//
//
// This source file is part of the Swift.org open source project
//
// Copyright (c) 2014 - 2017 Apple Inc. and the Swift project authors
// Licensed under Apache License v2.0 with Runtime Library Exception
//
// See https://swift.org/LICENSE.txt for license information
// See https://swift.org/CONTRIBUTORS.txt for the list of Swift project authors
//
//===----------------------------------------------------------------------===//
//
// This file implements IR generation for types in Swift.
//
//===----------------------------------------------------------------------===//
#include "swift/ABI/MetadataValues.h"
#include "swift/AST/CanTypeVisitor.h"
#include "swift/AST/Decl.h"
#include "swift/AST/GenericEnvironment.h"
#include "swift/AST/LazyResolver.h"
#include "swift/AST/IRGenOptions.h"
#include "swift/AST/PrettyStackTrace.h"
#include "swift/AST/Types.h"
#include "swift/Basic/Platform.h"
#include "swift/Basic/SourceManager.h"
#include "swift/IRGen/Linking.h"
#include "swift/SIL/SILModule.h"
#include "llvm/IR/DerivedTypes.h"
#include "llvm/ADT/SmallString.h"
#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/Path.h"
#include "clang/CodeGen/SwiftCallingConv.h"
#include "BitPatternBuilder.h"
#include "CallEmission.h"
#include "EnumPayload.h"
#include "LegacyLayoutFormat.h"
#include "LoadableTypeInfo.h"
#include "GenCall.h"
#include "GenMeta.h"
#include "GenPoly.h"
#include "GenProto.h"
#include "GenType.h"
#include "IRGenFunction.h"
#include "IRGenModule.h"
#include "Address.h"
#include "Explosion.h"
#include "GenOpaque.h"
#include "HeapTypeInfo.h"
#include "IndirectTypeInfo.h"
#include "Outlining.h"
#include "ProtocolInfo.h"
#include "ReferenceTypeInfo.h"
#include "ScalarPairTypeInfo.h"
#include "NativeConventionSchema.h"
#include "IRGenMangler.h"
#include "NonFixedTypeInfo.h"
using namespace swift;
using namespace irgen;
Alignment IRGenModule::getCappedAlignment(Alignment align) {
return std::min(align, Alignment(MaximumAlignment));
}
llvm::DenseMap<TypeBase *, const TypeInfo *> &
TypeConverter::Types_t::getCacheFor(bool isDependent, TypeConverter::Mode mode) {
return (isDependent
? DependentCache[unsigned(mode)]
: IndependentCache[unsigned(mode)]);
}
llvm::DenseMap<TypeBase *, const TypeLayoutEntry *> &
TypeConverter::Types_t::getTypeLayoutCacheFor(bool isDependent,
TypeConverter::Mode mode) {
return (isDependent ? DependentTypeLayoutCache[unsigned(mode)]
: IndependentTypeLayoutCache[unsigned(mode)]);
}
void TypeInfo::assign(IRGenFunction &IGF, Address dest, Address src,
IsTake_t isTake, SILType T, bool isOutlined) const {
if (isTake) {
assignWithTake(IGF, dest, src, T, isOutlined);
} else {
assignWithCopy(IGF, dest, src, T, isOutlined);
}
}
void TypeInfo::initialize(IRGenFunction &IGF, Address dest, Address src,
IsTake_t isTake, SILType T, bool isOutlined) const {
if (isTake) {
initializeWithTake(IGF, dest, src, T, isOutlined);
} else {
initializeWithCopy(IGF, dest, src, T, isOutlined);
}
}
bool TypeInfo::isSingleRetainablePointer(ResilienceExpansion expansion,
ReferenceCounting *refcounting) const {
return false;
}
ExplosionSchema TypeInfo::getSchema() const {
ExplosionSchema schema;
getSchema(schema);
return schema;
}
TypeInfo::~TypeInfo() {
if (nativeReturnSchema)
delete nativeReturnSchema;
if (nativeParameterSchema)
delete nativeParameterSchema;
}
Address TypeInfo::getAddressForPointer(llvm::Value *ptr) const {
assert(cast<llvm::PointerType>(ptr->getType())
->isOpaqueOrPointeeTypeMatches(getStorageType()));
return Address(ptr, getStorageType(), getBestKnownAlignment());
}
Address TypeInfo::getUndefAddress() const {
return Address(llvm::UndefValue::get(getStorageType()->getPointerTo(0)),
getStorageType(), getBestKnownAlignment());
}
/// Whether this type is known to be empty.
bool TypeInfo::isKnownEmpty(ResilienceExpansion expansion) const {
if (auto fixed = dyn_cast<FixedTypeInfo>(this))
return fixed->isKnownEmpty(expansion);
return false;
}
const NativeConventionSchema &
TypeInfo::nativeReturnValueSchema(IRGenModule &IGM) const {
if (nativeReturnSchema == nullptr)
nativeReturnSchema = new NativeConventionSchema(IGM, this, true);
return *nativeReturnSchema;
}
const NativeConventionSchema &
TypeInfo::nativeParameterValueSchema(IRGenModule &IGM) const {
if (nativeParameterSchema == nullptr)
nativeParameterSchema = new NativeConventionSchema(IGM, this, false);
return *nativeParameterSchema;
}
/// Copy a value from one object to a new object, directly taking
/// responsibility for anything it might have. This is like C++
/// move-initialization, except the old object will not be destroyed.
void FixedTypeInfo::initializeWithTake(IRGenFunction &IGF, Address destAddr,
Address srcAddr, SILType T,
bool isOutlined) const {
assert(isBitwiseTakable(ResilienceExpansion::Maximal)
&& "non-bitwise-takable type must override default initializeWithTake");
// Prefer loads and stores if we won't make a million of them.
// Maybe this should also require the scalars to have a fixed offset.
ExplosionSchema schema = getSchema();
if (!schema.containsAggregate() && schema.size() <= 2) {
auto &loadableTI = cast<LoadableTypeInfo>(*this);
Explosion copy;
loadableTI.loadAsTake(IGF, srcAddr, copy);
loadableTI.initialize(IGF, copy, destAddr, isOutlined);
return;
}
// Otherwise, use a memcpy.
IGF.emitMemCpy(destAddr, srcAddr, getFixedSize());
}
/// Copy a value from one object to a new object. This is just the
/// default implementation.
void LoadableTypeInfo::initializeWithCopy(IRGenFunction &IGF, Address destAddr,
Address srcAddr, SILType T,
bool isOutlined) const {
// Use memcpy if that's legal.
if (isTriviallyDestroyable(ResilienceExpansion::Maximal)) {
return initializeWithTake(IGF, destAddr, srcAddr, T, isOutlined);
}
// Otherwise explode and re-implode.
if (isOutlined) {
Explosion copy;
loadAsCopy(IGF, srcAddr, copy);
initialize(IGF, copy, destAddr, true);
} else {
OutliningMetadataCollector collector(IGF);
// No need to collect anything because we assume loadable types can be
// loaded without enums.
collector.emitCallToOutlinedCopy(
destAddr, srcAddr, T, *this, IsInitialization, IsNotTake);
}
}
LoadedRef LoadableTypeInfo::loadRefcountedPtr(IRGenFunction &IGF,
SourceLoc loc,
Address addr) const {
IGF.IGM.error(loc, "Can only load from an address that holds a reference to "
"a refcounted type or an address of an optional reference.");
llvm::report_fatal_error("loadRefcountedPtr: Invalid SIL in IRGen");
}
void LoadableTypeInfo::addScalarToAggLowering(IRGenModule &IGM,
SwiftAggLowering &lowering,
llvm::Type *type, Size offset,
Size storageSize) {
lowering.addTypedData(type, offset.asCharUnits(),
offset.asCharUnits() + storageSize.asCharUnits());
}
llvm::Value *FixedTypeInfo::getSize(IRGenFunction &IGF, SILType T) const {
return FixedTypeInfo::getStaticSize(IGF.IGM);
}
llvm::Constant *FixedTypeInfo::getStaticSize(IRGenModule &IGM) const {
return IGM.getSize(getFixedSize());
}
llvm::Value *FixedTypeInfo::getAlignmentMask(IRGenFunction &IGF,
SILType T) const {
return FixedTypeInfo::getStaticAlignmentMask(IGF.IGM);
}
llvm::Constant *FixedTypeInfo::getStaticAlignmentMask(IRGenModule &IGM) const {
return IGM.getSize(Size(getFixedAlignment().getValue() - 1));
}
llvm::Value *FixedTypeInfo::getStride(IRGenFunction &IGF, SILType T) const {
return FixedTypeInfo::getStaticStride(IGF.IGM);
}
llvm::Value *FixedTypeInfo::getIsTriviallyDestroyable(IRGenFunction &IGF, SILType T) const {
return llvm::ConstantInt::get(IGF.IGM.Int1Ty,
isTriviallyDestroyable(ResilienceExpansion::Maximal) == IsTriviallyDestroyable);
}
llvm::Value *FixedTypeInfo::getIsBitwiseTakable(IRGenFunction &IGF, SILType T) const {
return llvm::ConstantInt::get(IGF.IGM.Int1Ty,
isBitwiseTakable(ResilienceExpansion::Maximal) == IsBitwiseTakable);
}
llvm::Constant *FixedTypeInfo::getStaticStride(IRGenModule &IGM) const {
return IGM.getSize(getFixedStride());
}
llvm::Value *FixedTypeInfo::isDynamicallyPackedInline(IRGenFunction &IGF,
SILType T) const {
auto packing = getFixedPacking(IGF.IGM);
assert(packing == FixedPacking::Allocate ||
packing == FixedPacking::OffsetZero);
return llvm::ConstantInt::get(IGF.IGM.Int1Ty,
packing == FixedPacking::OffsetZero);
}
unsigned FixedTypeInfo::getSpareBitExtraInhabitantCount() const {
if (SpareBits.none())
return 0;
// Make sure the arithmetic below doesn't overflow.
if (getFixedSize().getValue() >= 4)
return ValueWitnessFlags::MaxNumExtraInhabitants;
unsigned spareBitCount = SpareBits.count();
assert(spareBitCount <= getFixedSize().getValueInBits()
&& "more spare bits than storage bits?!");
unsigned inhabitedBitCount = getFixedSize().getValueInBits() - spareBitCount;
unsigned rawCount = ((1U << spareBitCount) - 1U) << inhabitedBitCount;
return std::min(rawCount,
unsigned(ValueWitnessFlags::MaxNumExtraInhabitants));
}
void FixedTypeInfo::applyFixedSpareBitsMask(const IRGenModule &IGM,
SpareBitVector &mask) const {
auto builder = BitPatternBuilder(IGM.Triple.isLittleEndian());
// If the mask is no longer than the stored spare bits, we can just
// apply the stored spare bits.
if (mask.size() <= SpareBits.size()) {
// Grow the mask out if necessary; the tail padding is all spare bits.
builder.append(mask);
builder.padWithSetBitsTo(SpareBits.size());
mask = SpareBitVector(builder.build());
mask &= SpareBits;
return;
}
// Otherwise, we have to grow out the stored spare bits before we
// can intersect.
builder.append(SpareBits);
builder.padWithSetBitsTo(mask.size());
mask &= builder.build();
return;
}
APInt
FixedTypeInfo::getSpareBitFixedExtraInhabitantValue(IRGenModule &IGM,
unsigned bits,
unsigned index) const {
// Factor the index into the part that goes in the occupied bits and the
// part that goes in the spare bits.
unsigned occupiedIndex, spareIndex = 0;
unsigned spareBitCount = SpareBits.count();
unsigned occupiedBitCount = SpareBits.size() - spareBitCount;
if (occupiedBitCount >= 31) {
occupiedIndex = index;
// The spare bit value is biased by one because all zero spare bits
// represents a valid value of the type.
spareIndex = 1;
} else {
occupiedIndex = index & ((1 << occupiedBitCount) - 1);
// The spare bit value is biased by one because all zero spare bits
// represents a valid value of the type.
spareIndex = (index >> occupiedBitCount) + 1;
}
APInt mask = SpareBits.asAPInt().zextOrTrunc(bits);
APInt v = scatterBits(mask, spareIndex);
v |= scatterBits(~mask, occupiedIndex);
return v;
}
llvm::Value *
FixedTypeInfo::getSpareBitExtraInhabitantIndex(IRGenFunction &IGF,
Address src) const {
assert(!SpareBits.none() && "no spare bits");
auto &C = IGF.IGM.getLLVMContext();
// Load the value.
auto payloadTy = llvm::IntegerType::get(C, getFixedSize().getValueInBits());
src = IGF.Builder.CreateElementBitCast(src, payloadTy);
auto val = IGF.Builder.CreateLoad(src);
// If the spare bits are all zero, then we have a valid value and not an
// extra inhabitant.
auto spareBitsMask
= llvm::ConstantInt::get(C, SpareBits.asAPInt());
auto valSpareBits = IGF.Builder.CreateAnd(val, spareBitsMask);
auto isValid = IGF.Builder.CreateICmpEQ(valSpareBits,
llvm::ConstantInt::get(payloadTy, 0));
auto *origBB = IGF.Builder.GetInsertBlock();
auto *endBB = llvm::BasicBlock::Create(C);
auto *spareBB = llvm::BasicBlock::Create(C);
IGF.Builder.CreateCondBr(isValid, endBB, spareBB);
IGF.Builder.emitBlock(spareBB);
ConditionalDominanceScope condition(IGF);
// Gather the occupied bits.
auto OccupiedBits = SpareBits;
OccupiedBits.flipAll();
llvm::Value *idx = emitGatherBits(IGF, OccupiedBits.asAPInt(), val, 0, 31);
// See if spare bits fit into the 31 bits of the index.
unsigned numSpareBits = SpareBits.count();
unsigned numOccupiedBits = getFixedSize().getValueInBits() - numSpareBits;
if (numOccupiedBits < 31) {
// Gather the spare bits.
llvm::Value *spareIdx
= emitGatherBits(IGF, SpareBits.asAPInt(), val, numOccupiedBits, 31);
// Unbias by subtracting one.
uint64_t shifted = static_cast<uint64_t>(1) << numOccupiedBits;
spareIdx = IGF.Builder.CreateSub(spareIdx,
llvm::ConstantInt::get(spareIdx->getType(), shifted));
idx = IGF.Builder.CreateOr(idx, spareIdx);
}
idx = IGF.Builder.CreateZExt(idx, IGF.IGM.Int32Ty);
IGF.Builder.CreateBr(endBB);
IGF.Builder.emitBlock(endBB);
// If we had a valid value, return -1. Otherwise, return the index.
auto phi = IGF.Builder.CreatePHI(IGF.IGM.Int32Ty, 2);
phi->addIncoming(llvm::ConstantInt::get(IGF.IGM.Int32Ty, -1), origBB);
phi->addIncoming(idx, spareBB);
return phi;
}
static llvm::Value *computeExtraTagBytes(IRGenFunction &IGF, IRBuilder &Builder,
Size fixedSize,
llvm::Value *numEmptyCases) {
// We can use the payload area with a tag bit set somewhere outside of the
// payload area to represent cases. See how many bytes we need to cover
// all the empty cases.
// Algorithm:
// unsigned numTags = 1;
// if (size >= 4)
// // Assume that one tag bit is enough if the precise calculation overflows
// // an int32.
// numTags += 1;
// else {
// unsigned bits = size * 8U;
// unsigned casesPerTagBitValue = 1U << bits;
// numTags += ((emptyCases + (casesPerTagBitValue - 1U)) >> bits);
// }
// return (numTags < 256 ? 1 :
// numTags < 65536 ? 2 : 4);
auto &IGM = IGF.IGM;
auto &Ctx = Builder.getContext();
auto *int32Ty = IGM.Int32Ty;
auto *one = llvm::ConstantInt::get(int32Ty, 1U);
if (fixedSize >= Size(4)) {
return one;
}
auto *entryBB = Builder.GetInsertBlock();
llvm::Value *size = IGM.getSize(fixedSize);
auto *returnBB = llvm::BasicBlock::Create(Ctx);
size = Builder.CreateZExtOrTrunc(size, int32Ty); // We know size < 4.
auto *two = llvm::ConstantInt::get(int32Ty, 2U);
auto *four = llvm::ConstantInt::get(int32Ty, 4U);
auto *bits = Builder.CreateMul(size, llvm::ConstantInt::get(int32Ty, 8U));
auto *casesPerTagBitValue = Builder.CreateShl(one, bits);
auto *numTags = Builder.CreateSub(casesPerTagBitValue, one);
numTags = Builder.CreateAdd(numTags, numEmptyCases);
numTags = Builder.CreateLShr(numTags, bits);
numTags = Builder.CreateAdd(numTags, one);
auto *notLT256BB = llvm::BasicBlock::Create(Ctx);
auto *isLT256 =
Builder.CreateICmpULT(numTags, llvm::ConstantInt::get(int32Ty, 256U));
Builder.CreateCondBr(isLT256, returnBB, notLT256BB);
Builder.emitBlock(notLT256BB);
auto *isLT65536 =
Builder.CreateICmpULT(numTags, llvm::ConstantInt::get(int32Ty, 65536U));
numTags = Builder.CreateSelect(isLT65536, two, four);
Builder.CreateBr(returnBB);
Builder.emitBlock(returnBB);
auto *phi = Builder.CreatePHI(int32Ty, 3);
phi->addIncoming(one, entryBB);
phi->addIncoming(numTags, notLT256BB);
return phi;
}
/// Emit a specialized memory operation for a \p size of 0, 1, 2 or
/// 4 bytes.
/// \p emitMemOpFn will be called in a basic block where \p size is
/// a known constant value passed as a parameter to the function.
static void emitSpecializedMemOperation(
IRGenFunction &IGF,
llvm::function_ref<void(IRBuilder &, Size)> emitMemOpFn,
llvm::Value *size,
const std::array<Size, 4> &sizes) {
auto &Ctx = IGF.IGM.getLLVMContext();
auto &Builder = IGF.Builder;
// Block to jump to after successful match.
auto *returnBB = llvm::BasicBlock::Create(Ctx);
// Test all the sizes in turn, generating code similar to:
//
// if (size == 0) {
// <op>
// } else if (size == 1) {
// <op>
// } else if (size == 2) {
// <op>
// } else if (size == 4) {
// <op>
// } else {
// <unreachable>
// }
//
for (const Size &s : sizes) {
auto *matchBB = llvm::BasicBlock::Create(Ctx);
auto *nextBB = llvm::BasicBlock::Create(Ctx);
// Check if size matches.
auto *imm = Builder.getInt32(s.getValue());
auto *cmp = Builder.CreateICmpEQ(size, imm);
Builder.CreateCondBr(cmp, matchBB, nextBB);
// Size matches: execute sized operation.
Builder.emitBlock(matchBB);
emitMemOpFn(Builder, s);
Builder.CreateBr(returnBB);
// Size does not match: try next size.
Builder.emitBlock(nextBB);
}
// No size matched. Should never happen.
Builder.CreateUnreachable();
// Continue.
Builder.emitBlock(returnBB);
}
/// Emit a load of the \p size byte integer values zero extended to 4 bytes. \p
/// size maybe any of the four values specified in the \p sizes array.
static llvm::Value *emitLoadBytes(IRGenFunction &IGF, Address from,
llvm::Value *size,
const std::array<Size, 4> &sizes) {
auto *phi = llvm::PHINode::Create(IGF.IGM.Int32Ty, 4);
emitSpecializedMemOperation(IGF,
[=](IRBuilder &B, Size s) {
if (s == Size(0)) {
// If the size is 0 bytes return 0.
phi->addIncoming(B.getInt32(0), B.GetInsertBlock());
return;
}
// Generate a load of size bytes and zero-extend it to 32-bits.
auto *type = B.getIntNTy(s.getValueInBits());
Address addr = B.CreateElementBitCast(from, type);
auto *val = B.CreateZExtOrTrunc(B.CreateLoad(addr), B.getInt32Ty());
phi->addIncoming(val, B.GetInsertBlock());
},
size,
sizes);
IGF.Builder.Insert(phi);
return phi;
}
/// Emit a load of a \p size byte integer value zero extended to 4 bytes \p size
/// may be 1, 2, 3, or 4.
llvm::Value *irgen::emitLoad1to4Bytes(IRGenFunction &IGF, Address from,
llvm::Value *size) {
// Sizes to try. Tested in order.
const std::array<Size, 4> sizes = {
Size(1),
Size(2),
Size(3),
Size(4),
};
return emitLoadBytes(IGF, from, size, sizes);
}
/// Emit a load of a \p size byte integer value zero extended to 4 bytes.
/// \p size may be 0, 1, 2 or 4.
llvm::Value *irgen::emitGetTag(IRGenFunction &IGF, Address from,
llvm::Value *size) {
// Sizes to try. Tested in order.
const std::array<Size, 4> sizes = {
Size(0),
Size(1),
Size(2),
Size(4),
};
return emitLoadBytes(IGF, from, size, sizes);
}
/// Emit a store of \p val truncated to \p size bytes.
/// \p size may be one of the entries in the \p sizes array.
static void emitStoreBytes(IRGenFunction &IGF, Address to, llvm::Value *val,
llvm::Value *size,
const std::array<Size, 4> &sizes) {
emitSpecializedMemOperation(IGF,
[=](IRBuilder &B, Size s) {
if (s == Size(0)) {
// Nothing to store.
return;
}
// Store value truncated to size bytes.
auto *type = B.getIntNTy(s.getValueInBits());
auto *trunc = B.CreateZExtOrTrunc(val, type);
Address addr = B.CreateElementBitCast(to, type);
B.CreateStore(trunc, addr);
},
size,
sizes);
}
/// Emit a store of \p val truncated to \p size bytes.
/// \p size may be 1, 2, 3, or 4.
void irgen::emitStore1to4Bytes(IRGenFunction &IGF, Address to, llvm::Value *val,
llvm::Value *size) {
// Sizes to try. Tested in order.
const std::array<Size, 4> sizes = {
Size(1),
Size(2),
Size(3),
Size(4),
};
emitStoreBytes(IGF, to, val, size, sizes);
}
/// Emit a store of \p val truncated to \p size bytes.
/// \p size may be 0, 1, 2 or 4.
void irgen::emitSetTag(IRGenFunction &IGF,
Address to, llvm::Value *val,
llvm::Value *size) {
// Sizes to try. Tested in order.
const std::array<Size, 4> sizes = {
Size(0),
Size(1),
Size(2),
Size(4),
};
emitStoreBytes(IGF, to, val, size, sizes);
}
llvm::Value *FixedTypeInfo::getEnumTagSinglePayload(IRGenFunction &IGF,
llvm::Value *numEmptyCases,
Address enumAddr,
SILType T,
bool isOutlined) const {
return getFixedTypeEnumTagSinglePayload(IGF, *this, numEmptyCases, enumAddr,
T, isOutlined);
}
llvm::Value *irgen::getFixedTypeEnumTagSinglePayload(IRGenFunction &IGF,
const FixedTypeInfo &ti,
llvm::Value *numEmptyCases,
Address enumAddr,
SILType T,
bool isOutlined) {
auto *size = ti.getSize(IGF, T);
Size fixedSize = ti.getFixedSize();
auto fixedExtraInhabitantCount = ti.getFixedExtraInhabitantCount(IGF.IGM);
return getFixedTypeEnumTagSinglePayload(
IGF, numEmptyCases, enumAddr, size, fixedSize, fixedExtraInhabitantCount,
[&](Address addr) -> llvm::Value * {
return ti.getExtraInhabitantIndex(IGF, addr, T, false);
},
isOutlined);
}
llvm::Value *irgen::getFixedTypeEnumTagSinglePayload(
IRGenFunction &IGF, llvm::Value *numEmptyCases, Address enumAddr,
llvm::Value *size, Size fixedSize, unsigned fixedExtraInhabitantCount,
llvm::function_ref<llvm::Value *(Address)> getExtraInhabitantIndex,
bool isOutlined) {
auto &IGM = IGF.IGM;
auto &Ctx = IGF.IGM.getLLVMContext();
auto &Builder = IGF.Builder;
auto *numExtraInhabitants =
llvm::ConstantInt::get(IGM.Int32Ty, fixedExtraInhabitantCount);
auto *zero = llvm::ConstantInt::get(IGM.Int32Ty, 0U);
auto *one = llvm::ConstantInt::get(IGM.Int32Ty, 1U);
auto *four = llvm::ConstantInt::get(IGM.Int32Ty, 4U);
auto *eight = llvm::ConstantInt::get(IGM.Int32Ty, 8U);
auto *extraTagBitsBB = llvm::BasicBlock::Create(Ctx);
auto *noExtraTagBitsBB = llvm::BasicBlock::Create(Ctx);
auto *hasEmptyCasesBB = llvm::BasicBlock::Create(Ctx);
auto *singleCaseEnumBB = llvm::BasicBlock::Create(Ctx);
// No empty cases so we must be the payload.
auto *hasNoEmptyCases = Builder.CreateICmpEQ(zero, numEmptyCases);
Builder.CreateCondBr(hasNoEmptyCases, singleCaseEnumBB, hasEmptyCasesBB);
// Otherwise, check whether we need extra tag bits.
Builder.emitBlock(hasEmptyCasesBB);
auto *hasExtraTagBits =
Builder.CreateICmpUGT(numEmptyCases, numExtraInhabitants);
Builder.CreateCondBr(hasExtraTagBits, extraTagBitsBB, noExtraTagBitsBB);
// There are extra tag bits to check.
Builder.emitBlock(extraTagBitsBB);
// Compute the number of extra tag bytes.
auto *emptyCases = Builder.CreateSub(numEmptyCases, numExtraInhabitants);
auto *numExtraTagBytes =
computeExtraTagBytes(IGF, Builder, fixedSize, emptyCases);
// Read the value stored in the extra tag bytes.
auto *valueAddr =
Builder.CreateBitOrPointerCast(enumAddr.getAddress(), IGM.Int8PtrTy);
auto *extraTagBitsAddr =
Builder.CreateConstInBoundsGEP1_32(IGM.Int8Ty, valueAddr,
fixedSize.getValue());
auto *extraTagBits =
emitGetTag(IGF, Address(extraTagBitsAddr, IGM.Int8Ty, Alignment(1)),
numExtraTagBytes);
extraTagBitsBB = llvm::BasicBlock::Create(Ctx);
Builder.CreateCondBr(Builder.CreateICmpEQ(extraTagBits, zero),
noExtraTagBitsBB, extraTagBitsBB);
auto *resultBB = llvm::BasicBlock::Create(Ctx);
Builder.emitBlock(extraTagBitsBB);
auto *truncSize = Builder.CreateZExtOrTrunc(size, IGM.Int32Ty);
auto *caseIndexFromExtraTagBits = Builder.CreateSelect(
Builder.CreateICmpUGE(truncSize, four), zero,
Builder.CreateShl(Builder.CreateSub(extraTagBits, one),
Builder.CreateMul(eight, truncSize)));
llvm::Value *caseIndexFromValue = zero;
if (fixedSize > Size(0)) {
// llvm only supports integer types upto a certain size (i.e selection dag
// will crash).
if (fixedSize.getValueInBits() <= llvm::IntegerType::MAX_INT_BITS / 4) {
// Read up to one pointer-sized 'chunk' of the payload.
// The size of the chunk does not have to be a power of 2.
auto *caseIndexType =
llvm::IntegerType::get(Ctx, fixedSize.getValueInBits());
auto *caseIndexAddr =
Builder.CreateBitCast(valueAddr, caseIndexType->getPointerTo());
caseIndexFromValue = Builder.CreateZExtOrTrunc(
Builder.CreateLoad(
Address(caseIndexAddr, caseIndexType, Alignment(1))),
IGM.Int32Ty);
} else {
auto *caseIndexType = llvm::IntegerType::get(Ctx, 32);
auto *caseIndexAddr =
Builder.CreateBitCast(valueAddr, caseIndexType->getPointerTo());
caseIndexFromValue = Builder.CreateZExtOrTrunc(
Builder.CreateLoad(
Address(caseIndexAddr, caseIndexType, Alignment(1))),
IGM.Int32Ty);
}
}
auto *result1 = Builder.CreateAdd(
numExtraInhabitants,
Builder.CreateOr(caseIndexFromValue, caseIndexFromExtraTagBits));
Builder.CreateBr(resultBB);
// Extra tag bits were considered and zero or there are not extra tag
// bits.
Builder.emitBlock(noExtraTagBitsBB);
// If there are extra inhabitants, see whether the payload is valid.
llvm::Value *result0;
if (fixedExtraInhabitantCount > 0) {
result0 = getExtraInhabitantIndex(enumAddr);
noExtraTagBitsBB = Builder.GetInsertBlock();
} else {
result0 = llvm::ConstantInt::getSigned(IGM.Int32Ty, -1);
}
Builder.CreateBr(resultBB);
Builder.emitBlock(singleCaseEnumBB);
// Otherwise, we have a valid payload.
auto *result2 = llvm::ConstantInt::getSigned(IGM.Int32Ty, -1);
Builder.CreateBr(resultBB);
Builder.emitBlock(resultBB);
auto *result = Builder.CreatePHI(IGM.Int32Ty, 3);
result->addIncoming(result0, noExtraTagBitsBB);
result->addIncoming(result1, extraTagBitsBB);
result->addIncoming(result2, singleCaseEnumBB);
return Builder.CreateAdd(result, llvm::ConstantInt::get(IGM.Int32Ty, 1));
}
void FixedTypeInfo::storeEnumTagSinglePayload(IRGenFunction &IGF,
llvm::Value *whichCase,
llvm::Value *numEmptyCases,
Address enumAddr,
SILType T,
bool isOutlined) const {
storeFixedTypeEnumTagSinglePayload(IGF, *this, whichCase, numEmptyCases,
enumAddr, T, isOutlined);
}
void irgen::storeFixedTypeEnumTagSinglePayload(IRGenFunction &IGF,
const FixedTypeInfo &ti,
llvm::Value *whichCase,
llvm::Value *numEmptyCases,
Address enumAddr,
SILType T,
bool isOutlined) {
auto fixedSize = ti.getFixedSize();
auto *size = ti.getSize(IGF, T);
auto fixedExtraInhabitantCount = ti.getFixedExtraInhabitantCount(IGF.IGM);
storeFixedTypeEnumTagSinglePayload(
IGF, whichCase, numEmptyCases, enumAddr, size, fixedSize,
fixedExtraInhabitantCount,
[&](llvm::Value *nonPayloadElementIndex, Address enumAddr) {
ti.storeExtraInhabitant(IGF, nonPayloadElementIndex, enumAddr, T,
/*outlined*/ false);
},
isOutlined);
}
void irgen::storeFixedTypeEnumTagSinglePayload(
IRGenFunction &IGF, llvm::Value *whichCase, llvm::Value *numEmptyCases,
Address enumAddr, llvm::Value *size, Size fixedSize,
unsigned fixedExtraInhabitantCount,
llvm::function_ref<void(llvm::Value *, Address)> storeExtraInhabitant,
bool isOutlined) {
auto &IGM = IGF.IGM;
auto &Ctx = IGF.IGM.getLLVMContext();
auto &Builder = IGF.Builder;
auto &int32Ty = IGM.Int32Ty;
auto *zero = llvm::ConstantInt::get(int32Ty, 0U);
auto *one = llvm::ConstantInt::get(int32Ty, 1U);
auto *four = llvm::ConstantInt::get(int32Ty, 4U);
auto *eight = llvm::ConstantInt::get(int32Ty, 8U);
Address valueAddr = Builder.CreateElementBitCast(enumAddr, IGM.Int8Ty);
Address extraTagBitsAddr =
Builder.CreateConstByteArrayGEP(valueAddr, fixedSize);
auto *numExtraInhabitants =
llvm::ConstantInt::get(IGM.Int32Ty, fixedExtraInhabitantCount);
// Do we need extra tag bytes.
auto *entryBB = Builder.GetInsertBlock();
auto *continueBB = llvm::BasicBlock::Create(Ctx);
auto *computeExtraTagBytesBB = llvm::BasicBlock::Create(Ctx);
auto *hasExtraTagBits =
Builder.CreateICmpUGT(numEmptyCases, numExtraInhabitants);
Builder.CreateCondBr(hasExtraTagBits, computeExtraTagBytesBB, continueBB);
Builder.emitBlock(computeExtraTagBytesBB);
// Compute the number of extra tag bytes.
auto *emptyCases = Builder.CreateSub(numEmptyCases, numExtraInhabitants);
auto *numExtraTagBytes0 =
computeExtraTagBytes(IGF, Builder, fixedSize, emptyCases);
computeExtraTagBytesBB = Builder.GetInsertBlock();
Builder.CreateBr(continueBB);
Builder.emitBlock(continueBB);
auto *numExtraTagBytes = Builder.CreatePHI(int32Ty, 2);
numExtraTagBytes->addIncoming(zero, entryBB);
numExtraTagBytes->addIncoming(numExtraTagBytes0, computeExtraTagBytesBB);
// Check whether we need to set the extra tag bits to non zero.
auto *isExtraTagBitsCaseBB = llvm::BasicBlock::Create(Ctx);
auto *isPayloadOrInhabitantCaseBB = llvm::BasicBlock::Create(Ctx);
auto *isPayloadOrExtraInhabitant =
Builder.CreateICmpULE(whichCase, numExtraInhabitants);
Builder.CreateCondBr(isPayloadOrExtraInhabitant, isPayloadOrInhabitantCaseBB,
isExtraTagBitsCaseBB);
// We are the payload or fit within the extra inhabitants.
Builder.emitBlock(isPayloadOrInhabitantCaseBB);
// Zero the tag bits.
emitSetTag(IGF, extraTagBitsAddr, zero, numExtraTagBytes);
isPayloadOrInhabitantCaseBB = Builder.GetInsertBlock();
auto *storeInhabitantBB = llvm::BasicBlock::Create(Ctx);
auto *returnBB = llvm::BasicBlock::Create(Ctx);
auto *isPayload = Builder.CreateICmpEQ(whichCase, zero);
Builder.CreateCondBr(isPayload, returnBB, storeInhabitantBB);
Builder.emitBlock(storeInhabitantBB);
if (fixedExtraInhabitantCount > 0) {
// Store an index in the range [0..ElementsWithNoPayload-1].
auto *nonPayloadElementIndex = Builder.CreateSub(whichCase, one);
storeExtraInhabitant(nonPayloadElementIndex, enumAddr);
}
Builder.CreateBr(returnBB);
// There are extra tag bits to consider.
Builder.emitBlock(isExtraTagBitsCaseBB);
// Write the extra tag bytes. At this point we know we have an no payload case
// and therefore the index we should store is in the range
// [0..ElementsWithNoPayload-1].
auto *nonPayloadElementIndex = Builder.CreateSub(whichCase, one);
auto *caseIndex =
Builder.CreateSub(nonPayloadElementIndex, numExtraInhabitants);
auto *truncSize = Builder.CreateZExtOrTrunc(size, IGM.Int32Ty);
auto *isFourBytesPayload = Builder.CreateICmpUGE(truncSize, four);
auto *payloadGE4BB = Builder.GetInsertBlock();
auto *payloadLT4BB = llvm::BasicBlock::Create(Ctx);
continueBB = llvm::BasicBlock::Create(Ctx);
Builder.CreateCondBr(isFourBytesPayload, continueBB, payloadLT4BB);
Builder.emitBlock(payloadLT4BB);
auto *payloadBits = Builder.CreateMul(truncSize, eight);
auto *extraTagIndex0 = Builder.CreateLShr(caseIndex, payloadBits);
extraTagIndex0 = Builder.CreateAdd(one, extraTagIndex0);
auto *payloadIndex0 = Builder.CreateShl(one, payloadBits);
payloadIndex0 = Builder.CreateSub(payloadIndex0, one);
payloadIndex0 = Builder.CreateAnd(payloadIndex0, caseIndex);
Builder.CreateBr(continueBB);
Builder.emitBlock(continueBB);
auto *extraTagIndex = Builder.CreatePHI(int32Ty, 2);
extraTagIndex->addIncoming(llvm::ConstantInt::get(int32Ty, 1), payloadGE4BB);
extraTagIndex->addIncoming(extraTagIndex0, payloadLT4BB);
auto *payloadIndex = Builder.CreatePHI(int32Ty, 2);
payloadIndex->addIncoming(caseIndex, payloadGE4BB);
payloadIndex->addIncoming(payloadIndex0, payloadLT4BB);
if (fixedSize > Size(0)) {
if (fixedSize.getValueInBits() <= llvm::IntegerType::MAX_INT_BITS / 4) {
// Write the value to the payload as a zero extended integer.
auto *intType = Builder.getIntNTy(fixedSize.getValueInBits());
Builder.CreateStore(Builder.CreateZExtOrTrunc(payloadIndex, intType),
Builder.CreateElementBitCast(valueAddr, intType));
} else {
// Write the value to the payload as a zero extended integer.
Size limit = IGM.getPointerSize();
auto *intType = Builder.getIntNTy(limit.getValueInBits());
Builder.CreateStore(Builder.CreateZExtOrTrunc(payloadIndex, intType),
Builder.CreateElementBitCast(valueAddr, intType));
// Zero the remainder of the payload.
auto zeroAddr = Builder.CreateConstByteArrayGEP(valueAddr, limit);
auto zeroSize = Builder.CreateSub(
size, llvm::ConstantInt::get(size->getType(), limit.getValue()));
Builder.CreateMemSet(zeroAddr, Builder.getInt8(0), zeroSize);
}
}
// Write to the extra tag bytes, if any.
emitSetTag(IGF, extraTagBitsAddr, extraTagIndex, numExtraTagBytes);
Builder.CreateBr(returnBB);
Builder.emitBlock(returnBB);
}
void
FixedTypeInfo::storeSpareBitExtraInhabitant(IRGenFunction &IGF,
llvm::Value *index,
Address dest) const {
assert(!SpareBits.none() && "no spare bits");
auto &C = IGF.IGM.getLLVMContext();
auto payloadTy = llvm::IntegerType::get(C, getFixedSize().getValueInBits());
unsigned spareBitCount = SpareBits.count();
unsigned occupiedBitCount = SpareBits.size() - spareBitCount;
llvm::Value *occupiedIndex;
llvm::Value *spareIndex;
// The spare bit value is biased by one because all zero spare bits
// represents a valid value of the type.
auto spareBitBias = llvm::ConstantInt::get(IGF.IGM.Int32Ty, 1U);
// Factor the spare and occupied bit values from the index.
if (occupiedBitCount >= 31) {
occupiedIndex = index;
spareIndex = spareBitBias;
} else {
auto occupiedBitMask = APInt::getAllOnes(occupiedBitCount);
occupiedBitMask = occupiedBitMask.zext(32);
auto occupiedBitMaskValue = llvm::ConstantInt::get(C, occupiedBitMask);
occupiedIndex = IGF.Builder.CreateAnd(index, occupiedBitMaskValue);
auto occupiedBitCountValue
= llvm::ConstantInt::get(IGF.IGM.Int32Ty, occupiedBitCount);
spareIndex = IGF.Builder.CreateLShr(index, occupiedBitCountValue);
spareIndex = IGF.Builder.CreateAdd(spareIndex, spareBitBias);
}
// Scatter the occupied bits.
auto OccupiedBits = ~SpareBits.asAPInt();
llvm::Value *occupied = emitScatterBits(IGF.IGM, IGF.Builder, OccupiedBits,
occupiedIndex, 0);
// Scatter the spare bits.
llvm::Value *spare = emitScatterBits(IGF.IGM, IGF.Builder, SpareBits.asAPInt(),
spareIndex, 0);
// Combine the values and store to the destination.
llvm::Value *inhabitant = IGF.Builder.CreateOr(occupied, spare);
dest = IGF.Builder.CreateElementBitCast(dest, payloadTy);
IGF.Builder.CreateStore(inhabitant, dest);
}
namespace {
/// A TypeInfo implementation for empty types.
struct EmptyTypeInfo : ScalarTypeInfo<EmptyTypeInfo, LoadableTypeInfo> {
EmptyTypeInfo(llvm::Type *ty)
: ScalarTypeInfo(ty, Size(0), SpareBitVector{}, Alignment(1),
IsTriviallyDestroyable,
IsCopyable,
IsFixedSize) {}
unsigned getExplosionSize() const override { return 0; }
void getSchema(ExplosionSchema &schema) const override {}
void addToAggLowering(IRGenModule &IGM, SwiftAggLowering &lowering,
Size offset) const override {}
void loadAsCopy(IRGenFunction &IGF, Address addr,
Explosion &e) const override {}
void loadAsTake(IRGenFunction &IGF, Address addr,
Explosion &e) const override {}
void assign(IRGenFunction &IGF, Explosion &e, Address addr,
bool isOutlined, SILType T) const override {}
void initialize(IRGenFunction &IGF, Explosion &e, Address addr,
bool isOutlined) const override {}
void copy(IRGenFunction &IGF, Explosion &src,
Explosion &dest, Atomicity atomicity) const override {}
void consume(IRGenFunction &IGF, Explosion &src,
Atomicity atomicity, SILType T) const override {}
void fixLifetime(IRGenFunction &IGF, Explosion &src) const override {}
void destroy(IRGenFunction &IGF, Address addr, SILType T,
bool isOutlined) const override {}
void packIntoEnumPayload(IRGenModule &IGM,
IRBuilder &builder, EnumPayload &payload,
Explosion &src, unsigned offset) const override {}
void unpackFromEnumPayload(IRGenFunction &IGF,
const EnumPayload &payload,
Explosion &dest,
unsigned offset) const override {}
TypeLayoutEntry
*buildTypeLayoutEntry(IRGenModule &IGM,