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Merge pull request #35760 from nate-chandler/concurrency/irgen/debug-info/async-args/arm64e
[Test] Adapt DebugInfo/async-args for arm64e.
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‎test/DebugInfo/async-args.swift

+79-11
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@@ -1,6 +1,7 @@
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// RUN: %target-swift-frontend %s -emit-ir -g -o - \
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// RUN: -module-name M -enable-experimental-concurrency \
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// RUN: -parse-as-library | %FileCheck %s
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// RUN: -parse-as-library | %FileCheck %s --check-prefix=CHECK \
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// RUN: --check-prefix=CHECK-%target-cpu
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// REQUIRES: concurrency
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func use<T>(_ t: T) {}
@@ -10,7 +11,7 @@ func withGenericArg<T>(_ msg: T) async {
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// This odd debug info is part of a contract with CoroSplit/CoroFrame to fix
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// this up after coroutine splitting.
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// CHECK-LABEL: {{^define .*}} @"$s1M14withGenericArgyyxYlF"(%swift.task* %0, %swift.executor* %1, %swift.context* swiftasync %2)
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// CHECK: call void @llvm.dbg.declare(metadata %swift.context** %[[ALLOCA:[^,]*]],
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// CHECK: call void @llvm.dbg.declare(metadata %swift.context** %[[ALLOCA:[^,]+]],
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// CHECK-SAME: metadata ![[TAU:[0-9]+]], metadata !DIExpression(
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// CHECK-SAME: DW_OP_deref, DW_OP_plus_uconst, {{[0-9]+}}))
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// CHECK: call void @llvm.dbg.declare(metadata %swift.context** %[[ALLOCA]],
@@ -20,15 +21,82 @@ func withGenericArg<T>(_ msg: T) async {
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await forceSplit()
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// CHECK-LABEL: {{^define .*}} @"$s1M14withGenericArgyyxYlF.resume.0"(i8* %0, i8* %1, i8* swiftasync %2)
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// CHECK: call void @llvm.dbg.declare(metadata i8** %[[ALLOCA:[^,]*]],
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// CHECK-SAME: metadata ![[MSG_R:[0-9]+]], metadata !DIExpression(
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// CHECK-SAME: DW_OP_deref, DW_OP_plus_uconst, [[OFFSET:[0-9]+]],
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// CHECK-SAME: DW_OP_plus_uconst, {{[0-9]+}}, DW_OP_deref))
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// CHECK: call void @llvm.dbg.declare(metadata i8** %[[ALLOCA]],
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// CHECK-SAME: metadata ![[TAU_R:[0-9]+]], metadata !DIExpression(
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// CHECK-SAME: DW_OP_deref, DW_OP_plus_uconst, [[OFFSET]],
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// CHECK-SAME: DW_OP_plus_uconst, {{[0-9]+}}))
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// CHECK: store i8* %2, i8** %[[ALLOCA]], align
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// CHECK-arm64e: [[CTXT_PTR:%[0-9]+]] = bitcast i8* %2 to i8**
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// CHECK-arm64e: [[SIGNED_CTXT:%[0-9]+]] = load i8*, i8** [[CTXT_PTR]]
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// CHECK-arm64e: [[CTXT_PTR_INT:%[0-9]+]] = ptrtoint i8** [[CTXT_PTR]] to i64
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// CHECK-arm64e: [[PTRAUTH_BLEND:%[0-9]+]] = call i64 @llvm.ptrauth.blend.i64(i64 [[CTXT_PTR_INT]], i64 48546)
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// CHECK-arm64e: [[SIGNED_CTXT_INT:%[0-9]+]] = ptrtoint i8* [[SIGNED_CTXT]]
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// CHECK-arm64e: [[CTXT:%[0-9]+]] = call i64 @llvm.ptrauth.auth.i64(i64 [[SIGNED_CTXT_INT]], i32 2, i64 [[PTRAUTH_BLEND]])
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// CHECK-arm64e: %[[ALLOCA:[0-9+]]] = inttoptr i64 [[CTXT]] to i8*, !dbg !77
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// CHECK-arm64e: call void @llvm.dbg.declare(metadata i8* %[[ALLOCA]],
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// CHECK-arm64e-SAME: metadata ![[TAU_R:[0-9]+]], metadata !DIExpression(
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// CHECK-arm64e-SAME: DW_OP_deref, DW_OP_plus_uconst, [[OFFSET:[0-9]+]],
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// CHECK-arm64e-SAME: DW_OP_plus_uconst, {{[0-9]+}}))
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// CHECK-arm64e: call void @llvm.dbg.declare(metadata i8* %[[ALLOCA]],
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// CHECK-arm64e-SAME: metadata ![[MSG_R:[0-9]+]], metadata !DIExpression(
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// CHECK-arm64e-SAME: DW_OP_deref, DW_OP_plus_uconst, [[OFFSET]],
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// CHECK-arm64e-SAME: DW_OP_plus_uconst, {{[0-9]+}}, DW_OP_deref))
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// CHECK-i386: call void @llvm.dbg.declare(metadata i8** %[[ALLOCA:[^,]+]],
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// CHECK-i386-SAME: metadata ![[MSG_R:[0-9]+]], metadata !DIExpression(
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// CHECK-i386-SAME: DW_OP_deref, DW_OP_plus_uconst, [[OFFSET:[0-9]+]],
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// CHECK-i386-SAME: DW_OP_plus_uconst, {{[0-9]+}}, DW_OP_deref))
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// CHECK-i386: call void @llvm.dbg.declare(metadata i8** %[[ALLOCA]],
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// CHECK-i386-SAME: metadata ![[TAU_R:[0-9]+]], metadata !DIExpression(
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// CHECK-i386-SAME: DW_OP_deref, DW_OP_plus_uconst, [[OFFSET]],
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// CHECK-i386-SAME: DW_OP_plus_uconst, {{[0-9]+}}))
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// CHECK-i386: store i8* %2, i8** %[[ALLOCA]], align
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// CHECK-x86_64: call void @llvm.dbg.declare(metadata i8** %[[ALLOCA:[^,]+]],
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// CHECK-x86_64-SAME: metadata ![[MSG_R:[0-9]+]], metadata !DIExpression(
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// CHECK-x86_64-SAME: DW_OP_deref, DW_OP_plus_uconst, [[OFFSET:[0-9]+]],
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// CHECK-x86_64-SAME: DW_OP_plus_uconst, {{[0-9]+}}, DW_OP_deref))
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// CHECK-x86_64: call void @llvm.dbg.declare(metadata i8** %[[ALLOCA]],
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// CHECK-x86_64-SAME: metadata ![[TAU_R:[0-9]+]], metadata !DIExpression(
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// CHECK-x86_64-SAME: DW_OP_deref, DW_OP_plus_uconst, [[OFFSET]],
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// CHECK-x86_64-SAME: DW_OP_plus_uconst, {{[0-9]+}}))
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// CHECK-x86_64: store i8* %2, i8** %[[ALLOCA]], align
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// CHECK-armv7: call void @llvm.dbg.declare(metadata i8** %[[ALLOCA:[^,]+]],
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// CHECK-armv7-SAME: metadata ![[MSG_R:[0-9]+]], metadata !DIExpression(
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// CHECK-armv7-SAME: DW_OP_deref, DW_OP_plus_uconst, [[OFFSET:[0-9]+]],
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// CHECK-armv7-SAME: DW_OP_plus_uconst, {{[0-9]+}}, DW_OP_deref))
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// CHECK-armv7: call void @llvm.dbg.declare(metadata i8** %[[ALLOCA]],
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// CHECK-armv7-SAME: metadata ![[TAU_R:[0-9]+]], metadata !DIExpression(
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// CHECK-armv7-SAME: DW_OP_deref, DW_OP_plus_uconst, [[OFFSET]],
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// CHECK-armv7-SAME: DW_OP_plus_uconst, {{[0-9]+}}))
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// CHECK-armv7: store i8* %2, i8** %[[ALLOCA]], align
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// CHECK-arm64: call void @llvm.dbg.declare(metadata i8** %[[ALLOCA:[^,]+]],
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// CHECK-arm64-SAME: metadata ![[MSG_R:[0-9]+]], metadata !DIExpression(
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// CHECK-arm64-SAME: DW_OP_deref, DW_OP_plus_uconst, [[OFFSET:[0-9]+]],
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// CHECK-arm64-SAME: DW_OP_plus_uconst, {{[0-9]+}}, DW_OP_deref))
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// CHECK-arm64: call void @llvm.dbg.declare(metadata i8** %[[ALLOCA]],
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// CHECK-arm64-SAME: metadata ![[TAU_R:[0-9]+]], metadata !DIExpression(
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// CHECK-arm64-SAME: DW_OP_deref, DW_OP_plus_uconst, [[OFFSET]],
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// CHECK-arm64-SAME: DW_OP_plus_uconst, {{[0-9]+}}))
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// CHECK-arm64: store i8* %2, i8** %[[ALLOCA]], align
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// CHECK-powerpc64: call void @llvm.dbg.declare(metadata i8** %[[ALLOCA:[^,]+]],
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// CHECK-powerpc64-SAME: metadata ![[MSG_R:[0-9]+]], metadata !DIExpression(
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// CHECK-powerpc64-SAME: DW_OP_deref, DW_OP_plus_uconst, [[OFFSET:[0-9]+]],
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// CHECK-powerpc64-SAME: DW_OP_plus_uconst, {{[0-9]+}}, DW_OP_deref))
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// CHECK-powerpc64: call void @llvm.dbg.declare(metadata i8** %[[ALLOCA]],
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// CHECK-powerpc64-SAME: metadata ![[TAU_R:[0-9]+]], metadata !DIExpression(
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// CHECK-powerpc64-SAME: DW_OP_deref, DW_OP_plus_uconst, [[OFFSET]],
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// CHECK-powerpc64-SAME: DW_OP_plus_uconst, {{[0-9]+}}))
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// CHECK-powerpc64: store i8* %2, i8** %[[ALLOCA]], align
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// CHECK-powerpc64le: call void @llvm.dbg.declare(metadata i8** %[[ALLOCA:[^,]+]],
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// CHECK-powerpc64le-SAME: metadata ![[MSG_R:[0-9]+]], metadata !DIExpression(
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// CHECK-powerpc64le-SAME: DW_OP_deref, DW_OP_plus_uconst, [[OFFSET:[0-9]+]],
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// CHECK-powerpc64le-SAME: DW_OP_plus_uconst, {{[0-9]+}}, DW_OP_deref))
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// CHECK-powerpc64le: call void @llvm.dbg.declare(metadata i8** %[[ALLOCA]],
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// CHECK-powerpc64le-SAME: metadata ![[TAU_R:[0-9]+]], metadata !DIExpression(
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// CHECK-powerpc64le-SAME: DW_OP_deref, DW_OP_plus_uconst, [[OFFSET]],
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// CHECK-powerpc64le-SAME: DW_OP_plus_uconst, {{[0-9]+}}))
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// CHECK-powerpc64le: store i8* %2, i8** %[[ALLOCA]], align
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use(msg)
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}

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