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Merge pull request #36677 from varungandhi-apple/vg-emit-irgen
[Frontend] Add -emit-irgen option to driver and frontend.
2 parents ad3568e + cc14992 commit cb6b1ea

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11 files changed

+59
-18
lines changed

11 files changed

+59
-18
lines changed

‎include/swift/AST/IRGenOptions.h

+8-3
Original file line numberDiff line numberDiff line change
@@ -40,7 +40,10 @@ enum class IRGenOutputKind : unsigned {
4040
Module,
4141

4242
/// Generate an LLVM module and write it out as LLVM assembly.
43-
LLVMAssembly,
43+
LLVMAssemblyBeforeOptimization,
44+
45+
/// Generate an LLVM module and write it out as LLVM assembly.
46+
LLVMAssemblyAfterOptimization,
4447

4548
/// Generate an LLVM module and write it out as LLVM bitcode.
4649
LLVMBitcode,
@@ -354,7 +357,8 @@ class IRGenOptions {
354357
JITDebugArtifact DumpJIT = JITDebugArtifact::None;
355358

356359
IRGenOptions()
357-
: DWARFVersion(2), OutputKind(IRGenOutputKind::LLVMAssembly),
360+
: DWARFVersion(2),
361+
OutputKind(IRGenOutputKind::LLVMAssemblyAfterOptimization),
358362
Verify(true), OptMode(OptimizationMode::NotSet),
359363
Sanitizers(OptionSet<SanitizerKind>()),
360364
SanitizersWithRecoveryInstrumentation(OptionSet<SanitizerKind>()),
@@ -401,7 +405,8 @@ class IRGenOptions {
401405
if (HasValueNamesSetting) {
402406
return ValueNames;
403407
} else {
404-
return OutputKind == IRGenOutputKind::LLVMAssembly;
408+
return OutputKind == IRGenOutputKind::LLVMAssemblyBeforeOptimization ||
409+
OutputKind == IRGenOutputKind::LLVMAssemblyAfterOptimization;
405410
}
406411
}
407412

‎include/swift/Frontend/FrontendOptions.h

+2-1
Original file line numberDiff line numberDiff line change
@@ -134,7 +134,8 @@ class FrontendOptions {
134134
REPL, ///< REPL mode
135135

136136
EmitAssembly, ///< Emit assembly
137-
EmitIR, ///< Emit LLVM IR
137+
EmitIRGen, ///< Emit LLVM IR before LLVM optimizations
138+
EmitIR, ///< Emit LLVM IR after LLVM optimizations
138139
EmitBC, ///< Emit LLVM BC
139140
EmitObject, ///< Emit object file
140141

‎include/swift/Option/Options.td

+4-1
Original file line numberDiff line numberDiff line change
@@ -907,8 +907,11 @@ def emit_assembly : Flag<["-"], "emit-assembly">,
907907
def emit_bc : Flag<["-"], "emit-bc">,
908908
HelpText<"Emit LLVM BC file(s)">, ModeOpt,
909909
Flags<[FrontendOption, NoInteractiveOption, DoesNotAffectIncrementalBuild]>;
910+
def emit_irgen : Flag<["-"], "emit-irgen">,
911+
HelpText<"Emit LLVM IR file(s) before LLVM optimizations">, ModeOpt,
912+
Flags<[FrontendOption, NoInteractiveOption, DoesNotAffectIncrementalBuild]>;
910913
def emit_ir : Flag<["-"], "emit-ir">,
911-
HelpText<"Emit LLVM IR file(s)">, ModeOpt,
914+
HelpText<"Emit LLVM IR file(s) after LLVM optimizations">, ModeOpt,
912915
Flags<[FrontendOption, NoInteractiveOption, DoesNotAffectIncrementalBuild]>;
913916
def emit_sil : Flag<["-"], "emit-sil">,
914917
HelpText<"Emit canonical SIL file(s)">, ModeOpt,

‎lib/Driver/Driver.cpp

+1
Original file line numberDiff line numberDiff line change
@@ -1504,6 +1504,7 @@ void Driver::buildOutputInfo(const ToolChain &TC, const DerivedArgList &Args,
15041504
OI.CompilerOutputType = file_types::TY_RawSIB;
15051505
break;
15061506

1507+
case options::OPT_emit_irgen:
15071508
case options::OPT_emit_ir:
15081509
OI.CompilerOutputType = file_types::TY_LLVM_IR;
15091510
break;

‎lib/Frontend/ArgsToFrontendOptionsConverter.cpp

+2
Original file line numberDiff line numberDiff line change
@@ -386,6 +386,8 @@ ArgsToFrontendOptionsConverter::determineRequestedAction(const ArgList &args) {
386386
return FrontendOptions::ActionType::EmitObject;
387387
if (Opt.matches(OPT_emit_assembly))
388388
return FrontendOptions::ActionType::EmitAssembly;
389+
if (Opt.matches(OPT_emit_irgen))
390+
return FrontendOptions::ActionType::EmitIRGen;
389391
if (Opt.matches(OPT_emit_ir))
390392
return FrontendOptions::ActionType::EmitIR;
391393
if (Opt.matches(OPT_emit_bc))

‎lib/Frontend/CompilerInvocation.cpp

+3-1
Original file line numberDiff line numberDiff line change
@@ -179,8 +179,10 @@ setIRGenOutputOptsFromFrontendOptions(IRGenOptions &IRGenOpts,
179179
// Set the OutputKind for the given Action.
180180
IRGenOpts.OutputKind = [](FrontendOptions::ActionType Action) {
181181
switch (Action) {
182+
case FrontendOptions::ActionType::EmitIRGen:
183+
return IRGenOutputKind::LLVMAssemblyBeforeOptimization;
182184
case FrontendOptions::ActionType::EmitIR:
183-
return IRGenOutputKind::LLVMAssembly;
185+
return IRGenOutputKind::LLVMAssemblyAfterOptimization;
184186
case FrontendOptions::ActionType::EmitBC:
185187
return IRGenOutputKind::LLVMBitcode;
186188
case FrontendOptions::ActionType::EmitAssembly:

‎lib/Frontend/FrontendOptions.cpp

+16
Original file line numberDiff line numberDiff line change
@@ -59,6 +59,7 @@ bool FrontendOptions::needsProperModuleName(ActionType action) {
5959
case ActionType::PrintFeature:
6060
return false;
6161
case ActionType::EmitAssembly:
62+
case ActionType::EmitIRGen:
6263
case ActionType::EmitIR:
6364
case ActionType::EmitBC:
6465
case ActionType::EmitObject:
@@ -119,6 +120,7 @@ bool FrontendOptions::doesActionRequireSwiftStandardLibrary(ActionType action) {
119120
case ActionType::Immediate:
120121
case ActionType::REPL:
121122
case ActionType::EmitAssembly:
123+
case ActionType::EmitIRGen:
122124
case ActionType::EmitIR:
123125
case ActionType::EmitBC:
124126
case ActionType::EmitObject:
@@ -162,6 +164,7 @@ bool FrontendOptions::doesActionRequireInputs(ActionType action) {
162164
case ActionType::EmitSIB:
163165
case ActionType::Immediate:
164166
case ActionType::EmitAssembly:
167+
case ActionType::EmitIRGen:
165168
case ActionType::EmitIR:
166169
case ActionType::EmitBC:
167170
case ActionType::EmitObject:
@@ -203,6 +206,7 @@ bool FrontendOptions::doesActionPerformEndOfPipelineActions(ActionType action) {
203206
case ActionType::EmitSIB:
204207
case ActionType::Immediate:
205208
case ActionType::EmitAssembly:
209+
case ActionType::EmitIRGen:
206210
case ActionType::EmitIR:
207211
case ActionType::EmitBC:
208212
case ActionType::EmitObject:
@@ -287,6 +291,7 @@ FrontendOptions::formatForPrincipalOutputFileForAction(ActionType action) {
287291
case ActionType::EmitAssembly:
288292
return TY_Assembly;
289293

294+
case ActionType::EmitIRGen:
290295
case ActionType::EmitIR:
291296
return TY_LLVM_IR;
292297

@@ -339,6 +344,7 @@ bool FrontendOptions::canActionEmitDependencies(ActionType action) {
339344
case ActionType::EmitSIL:
340345
case ActionType::EmitSIBGen:
341346
case ActionType::EmitSIB:
347+
case ActionType::EmitIRGen:
342348
case ActionType::EmitIR:
343349
case ActionType::EmitBC:
344350
case ActionType::EmitAssembly:
@@ -382,6 +388,7 @@ bool FrontendOptions::canActionEmitReferenceDependencies(ActionType action) {
382388
case ActionType::EmitSIL:
383389
case ActionType::EmitSIBGen:
384390
case ActionType::EmitSIB:
391+
case ActionType::EmitIRGen:
385392
case ActionType::EmitIR:
386393
case ActionType::EmitBC:
387394
case ActionType::EmitAssembly:
@@ -424,6 +431,7 @@ bool FrontendOptions::canActionEmitModuleSummary(ActionType action) {
424431
return false;
425432
case ActionType::EmitSIL:
426433
case ActionType::EmitSIB:
434+
case ActionType::EmitIRGen:
427435
case ActionType::EmitIR:
428436
case ActionType::EmitBC:
429437
case ActionType::EmitAssembly:
@@ -464,6 +472,7 @@ bool FrontendOptions::canActionEmitObjCHeader(ActionType action) {
464472
case ActionType::EmitSIL:
465473
case ActionType::EmitSIBGen:
466474
case ActionType::EmitSIB:
475+
case ActionType::EmitIRGen:
467476
case ActionType::EmitIR:
468477
case ActionType::EmitBC:
469478
case ActionType::EmitAssembly:
@@ -505,6 +514,7 @@ bool FrontendOptions::canActionEmitLoadedModuleTrace(ActionType action) {
505514
case ActionType::EmitSIL:
506515
case ActionType::EmitSIBGen:
507516
case ActionType::EmitSIB:
517+
case ActionType::EmitIRGen:
508518
case ActionType::EmitIR:
509519
case ActionType::EmitBC:
510520
case ActionType::EmitAssembly:
@@ -546,6 +556,7 @@ bool FrontendOptions::canActionEmitModule(ActionType action) {
546556
case ActionType::EmitSIL:
547557
case ActionType::EmitSIBGen:
548558
case ActionType::EmitSIB:
559+
case ActionType::EmitIRGen:
549560
case ActionType::EmitIR:
550561
case ActionType::EmitBC:
551562
case ActionType::EmitAssembly:
@@ -591,6 +602,7 @@ bool FrontendOptions::canActionEmitInterface(ActionType action) {
591602
case ActionType::EmitModuleOnly:
592603
case ActionType::EmitSIL:
593604
case ActionType::EmitSIB:
605+
case ActionType::EmitIRGen:
594606
case ActionType::EmitIR:
595607
case ActionType::EmitBC:
596608
case ActionType::EmitAssembly:
@@ -620,6 +632,7 @@ bool FrontendOptions::doesActionProduceOutput(ActionType action) {
620632
case ActionType::EmitSIB:
621633
case ActionType::EmitModuleOnly:
622634
case ActionType::EmitAssembly:
635+
case ActionType::EmitIRGen:
623636
case ActionType::EmitIR:
624637
case ActionType::EmitBC:
625638
case ActionType::EmitObject:
@@ -674,6 +687,7 @@ bool FrontendOptions::doesActionProduceTextualOutput(ActionType action) {
674687
case ActionType::EmitSILGen:
675688
case ActionType::EmitSIL:
676689
case ActionType::EmitAssembly:
690+
case ActionType::EmitIRGen:
677691
case ActionType::EmitIR:
678692
case ActionType::DumpTypeInfo:
679693
case ActionType::DumpPCM:
@@ -717,6 +731,7 @@ bool FrontendOptions::doesActionGenerateSIL(ActionType action) {
717731
case ActionType::Immediate:
718732
case ActionType::REPL:
719733
case ActionType::EmitAssembly:
734+
case ActionType::EmitIRGen:
720735
case ActionType::EmitIR:
721736
case ActionType::EmitBC:
722737
case ActionType::EmitObject:
@@ -758,6 +773,7 @@ bool FrontendOptions::doesActionGenerateIR(ActionType action) {
758773
return false;
759774
case ActionType::Immediate:
760775
case ActionType::REPL:
776+
case ActionType::EmitIRGen:
761777
case ActionType::EmitIR:
762778
case ActionType::EmitBC:
763779
case ActionType::EmitAssembly:

‎lib/FrontendTool/FrontendTool.cpp

+1
Original file line numberDiff line numberDiff line change
@@ -1232,6 +1232,7 @@ static bool performAction(CompilerInstance &Instance,
12321232
case FrontendOptions::ActionType::MergeModules:
12331233
case FrontendOptions::ActionType::Immediate:
12341234
case FrontendOptions::ActionType::EmitAssembly:
1235+
case FrontendOptions::ActionType::EmitIRGen:
12351236
case FrontendOptions::ActionType::EmitIR:
12361237
case FrontendOptions::ActionType::EmitBC:
12371238
case FrontendOptions::ActionType::EmitObject:

‎lib/IRGen/IRGen.cpp

+7-1
Original file line numberDiff line numberDiff line change
@@ -537,6 +537,10 @@ bool swift::performLLVM(const IRGenOptions &Opts,
537537
RawOS->clear_error();
538538
return true;
539539
}
540+
if (Opts.OutputKind == IRGenOutputKind::LLVMAssemblyBeforeOptimization) {
541+
Module->print(RawOS.getValue(), nullptr);
542+
return false;
543+
}
540544
} else {
541545
assert(Opts.OutputKind == IRGenOutputKind::Module && "no output specified");
542546
}
@@ -569,9 +573,11 @@ bool swift::compileAndWriteLLVM(llvm::Module *module,
569573

570574
// Set up the final emission passes.
571575
switch (opts.OutputKind) {
576+
case IRGenOutputKind::LLVMAssemblyBeforeOptimization:
577+
llvm_unreachable("Should be handled earlier.");
572578
case IRGenOutputKind::Module:
573579
break;
574-
case IRGenOutputKind::LLVMAssembly:
580+
case IRGenOutputKind::LLVMAssemblyAfterOptimization:
575581
EmitPasses.add(createPrintModulePass(out));
576582
break;
577583
case IRGenOutputKind::LLVMBitcode: {

‎test/Frontend/emit-irgen.swift

+4
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,4 @@
1+
// RUN: %target-swift-frontend -emit-irgen %s | %FileCheck %s
2+
3+
// CHECK: define{{.*}} swiftcc void @"$s4main5helloyyF"
4+
public func hello() { }

‎tools/sil-llvm-gen/SILLLVMGen.cpp

+11-11
Original file line numberDiff line numberDiff line change
@@ -88,17 +88,17 @@ static llvm::cl::opt<std::string>
8888
static llvm::cl::opt<bool>
8989
PerformWMO("wmo", llvm::cl::desc("Enable whole-module optimizations"));
9090

91-
static llvm::cl::opt<IRGenOutputKind>
92-
OutputKind("output-kind", llvm::cl::desc("Type of output to produce"),
93-
llvm::cl::values(clEnumValN(IRGenOutputKind::LLVMAssembly,
94-
"llvm-as", "Emit llvm assembly"),
95-
clEnumValN(IRGenOutputKind::LLVMBitcode,
96-
"llvm-bc", "Emit llvm bitcode"),
97-
clEnumValN(IRGenOutputKind::NativeAssembly,
98-
"as", "Emit native assembly"),
99-
clEnumValN(IRGenOutputKind::ObjectFile,
100-
"object", "Emit an object file")),
101-
llvm::cl::init(IRGenOutputKind::ObjectFile));
91+
static llvm::cl::opt<IRGenOutputKind> OutputKind(
92+
"output-kind", llvm::cl::desc("Type of output to produce"),
93+
llvm::cl::values(clEnumValN(IRGenOutputKind::LLVMAssemblyAfterOptimization,
94+
"llvm-as", "Emit llvm assembly"),
95+
clEnumValN(IRGenOutputKind::LLVMBitcode, "llvm-bc",
96+
"Emit llvm bitcode"),
97+
clEnumValN(IRGenOutputKind::NativeAssembly, "as",
98+
"Emit native assembly"),
99+
clEnumValN(IRGenOutputKind::ObjectFile, "object",
100+
"Emit an object file")),
101+
llvm::cl::init(IRGenOutputKind::ObjectFile));
102102

103103
static llvm::cl::opt<bool>
104104
DisableLegacyTypeInfo("disable-legacy-type-info",

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