[SIL] Infer isWholeModule() from associated context

Rather than maintain a separate bit, check if the
associated decl context is for the ModuleDecl.

Author: hamishknight

include/swift/AST/SILGenRequests.h

@@ -81,9 +81,6 @@ struct SILGenDescriptor {
   /// If the module or file contains SIL that needs parsing, returns the file
   /// to be parsed, or \c nullptr if parsing isn't required.
   SourceFile *getSourceFileToParse() const;
-
-  /// Whether the SIL is being emitted for a whole module.
-  bool isWholeModule() const;
 };
 
 void simple_display(llvm::raw_ostream &out, const SILGenDescriptor &d);

include/swift/SIL/SILModule.h

@@ -262,10 +262,6 @@ class SILModule {
   /// The indexed profile data to be used for PGO, or nullptr.
   std::unique_ptr<llvm::IndexedInstrProfReader> PGOReader;
 
-  /// True if this SILModule really contains the whole module, i.e.
-  /// optimizations can assume that they see the whole module.
-  bool wholeModule;
-
   /// The options passed into this SILModule.
   const SILOptions &Options;
 
@@ -281,8 +277,7 @@ class SILModule {
   llvm::SetVector<DeleteNotificationHandler*> NotificationHandlers;
 
   SILModule(ModuleDecl *M, Lowering::TypeConverter &TC,
-            const SILOptions &Options, const DeclContext *associatedDC,
-            bool wholeModule);
+            const SILOptions &Options, const DeclContext *associatedDC);
 
   SILModule(const SILModule&) = delete;
   void operator=(const SILModule&) = delete;
@@ -357,8 +352,7 @@ class SILModule {
   /// later parse SIL bodies directly into, without converting from an AST.
   static std::unique_ptr<SILModule>
   createEmptyModule(ModuleDecl *M, Lowering::TypeConverter &TC,
-                    const SILOptions &Options,
-                    bool WholeModule = false);
+                    const SILOptions &Options);
 
   /// Get the Swift module associated with this SIL module.
   ModuleDecl *getSwiftModule() const { return TheSwiftModule; }
@@ -382,7 +376,7 @@ class SILModule {
   /// Returns true if this SILModule really contains the whole module, i.e.
   /// optimizations can assume that they see the whole module.
   bool isWholeModule() const {
-    return wholeModule;
+    return isa<ModuleDecl>(AssociatedDeclContext);
   }
 
   bool isStdlibModule() const;

lib/SIL/IR/SILModule.cpp

@@ -93,12 +93,11 @@ class SILModule::SerializationCallback final
 };
 
 SILModule::SILModule(ModuleDecl *SwiftModule, TypeConverter &TC,
-                     const SILOptions &Options, const DeclContext *associatedDC,
-                     bool wholeModule)
+                     const SILOptions &Options, const DeclContext *associatedDC)
     : TheSwiftModule(SwiftModule),
       AssociatedDeclContext(associatedDC),
-      Stage(SILStage::Raw), wholeModule(wholeModule), Options(Options),
-      serialized(false), SerializeSILAction(), Types(TC) {
+      Stage(SILStage::Raw), Options(Options), serialized(false),
+      SerializeSILAction(), Types(TC) {
   assert(AssociatedDeclContext);
 
   // We always add the base SILModule serialization callback.
@@ -125,10 +124,9 @@ SILModule::~SILModule() {
 }
 
 std::unique_ptr<SILModule>
-SILModule::createEmptyModule(ModuleDecl *M, TypeConverter &TC, const SILOptions &Options,
-                             bool WholeModule) {
-  return std::unique_ptr<SILModule>(
-      new SILModule(M, TC, Options, M, WholeModule));
+SILModule::createEmptyModule(ModuleDecl *M, TypeConverter &TC,
+                             const SILOptions &Options) {
+  return std::unique_ptr<SILModule>(new SILModule(M, TC, Options, M));
 }
 
 ASTContext &SILModule::getASTContext() const {

lib/SIL/Parser/ParseSIL.cpp

@@ -116,8 +116,7 @@ ParseSILModuleRequest::evaluate(Evaluator &evaluator,
   assert(bufferID);
 
   auto *mod = SF->getParentModule();
-  auto silMod = SILModule::createEmptyModule(mod, desc.conv, desc.opts,
-                                             desc.isWholeModule());
+  auto silMod = SILModule::createEmptyModule(mod, desc.conv, desc.opts);
   SILParserState parserState(silMod.get());
   Parser parser(*bufferID, *SF, parserState.Impl.get());
   PrettyStackTraceParser StackTrace(parser);
@@ -126,8 +125,7 @@ ParseSILModuleRequest::evaluate(Evaluator &evaluator,
   if (hadError) {
     // The rest of the SIL pipeline expects well-formed SIL, so if we encounter
     // a parsing error, just return an empty SIL module.
-    return SILModule::createEmptyModule(mod, desc.conv, desc.opts,
-                                        desc.isWholeModule());
+    return SILModule::createEmptyModule(mod, desc.conv, desc.opts);
   }
   return silMod;
 }

lib/SILGen/SILGen.cpp

@@ -1868,7 +1868,7 @@ SILGenSourceFileRequest::evaluate(Evaluator &evaluator,
   auto *unit = desc.context.get<FileUnit *>();
   auto *mod = unit->getParentModule();
   auto M = std::unique_ptr<SILModule>(
-      new SILModule(mod, desc.conv, desc.opts, unit, /*wholeModule*/ false));
+      new SILModule(mod, desc.conv, desc.opts, unit));
   SILGenModuleRAII scope(*M, mod);
 
   if (auto *file = dyn_cast<SourceFile>(unit)) {
@@ -1891,7 +1891,7 @@ SILGenWholeModuleRequest::evaluate(Evaluator &evaluator,
 
   auto *mod = desc.context.get<ModuleDecl *>();
   auto M = std::unique_ptr<SILModule>(
-      new SILModule(mod, desc.conv, desc.opts, mod, /*wholeModule*/ true));
+      new SILModule(mod, desc.conv, desc.opts, mod));
   SILGenModuleRAII scope(*M, mod);
 
   for (auto file : mod->getFiles()) {

lib/SILGen/SILGenRequests.cpp

@@ -65,10 +65,6 @@ ArrayRef<FileUnit *> SILGenDescriptor::getFiles() const {
   return llvm::makeArrayRef(*context.getAddrOfPtr1());
 }
 
-bool SILGenDescriptor::isWholeModule() const {
-  return context.is<ModuleDecl *>();
-}
-
 SourceFile *SILGenDescriptor::getSourceFileToParse() const {
 #ifndef NDEBUG
   auto sfCount = llvm::count_if(getFiles(), [](FileUnit *file) {