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Merge pull request #56 from dcci/themips64revert
[MIPS/MIPS64] Remove another set of differences from upstream.
2 parents 76b8af2 + 9eb0776 commit 6ce58a9

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+25
-76
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2 files changed

+25
-76
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‎lldb/source/Plugins/Instruction/MIPS/EmulateInstructionMIPS.cpp‎

Lines changed: 14 additions & 44 deletions
Original file line numberDiff line numberDiff line change
@@ -1081,14 +1081,11 @@ bool EmulateInstructionMIPS::EvaluateInstruction(uint32_t evaluate_options) {
10811081
* mc_insn.getOpcode() returns decoded opcode. However to make use
10821082
* of llvm::Mips::<insn> we would need "MipsGenInstrInfo.inc".
10831083
*/
1084-
llvm::StringRef op_name_ref = m_insn_info->getName(mc_insn.getOpcode());
1084+
const char *op_name = m_insn_info->getName(mc_insn.getOpcode()).data();
10851085

1086-
if (op_name_ref.empty())
1086+
if (op_name == nullptr)
10871087
return false;
10881088

1089-
std::string op_name_str = op_name_ref;
1090-
const char *op_name = op_name_str.c_str();
1091-
10921089
/*
10931090
* Decoding has been done already. Just get the call-back function
10941091
* and emulate the instruction.
@@ -1351,10 +1348,7 @@ bool EmulateInstructionMIPS::Emulate_SUBU_ADDU(llvm::MCInst &insn) {
13511348
bool success = false;
13521349
uint64_t result;
13531350
uint8_t src, dst, rt;
1354-
1355-
llvm::StringRef op_name_ref = m_insn_info->getName(insn.getOpcode());
1356-
std::string op_name_str = op_name_ref;
1357-
const char *op_name = op_name_str.c_str();
1351+
const char *op_name = m_insn_info->getName(insn.getOpcode()).data();
13581352

13591353
dst = m_reg_info->getEncodingValue(insn.getOperand(0).getReg());
13601354
src = m_reg_info->getEncodingValue(insn.getOperand(1).getReg());
@@ -1806,9 +1800,7 @@ bool EmulateInstructionMIPS::Emulate_BXX_3ops(llvm::MCInst &insn) {
18061800
bool success = false;
18071801
uint32_t rs, rt;
18081802
int32_t offset, pc, target = 0, rs_val, rt_val;
1809-
llvm::StringRef op_name_ref = m_insn_info->getName(insn.getOpcode());
1810-
std::string op_name_str = op_name_ref;
1811-
const char *op_name = op_name_str.c_str();
1803+
const char *op_name = m_insn_info->getName(insn.getOpcode()).data();
18121804

18131805
rs = m_reg_info->getEncodingValue(insn.getOperand(0).getReg());
18141806
rt = m_reg_info->getEncodingValue(insn.getOperand(1).getReg());
@@ -1857,11 +1849,7 @@ bool EmulateInstructionMIPS::Emulate_BXX_3ops_C(llvm::MCInst &insn) {
18571849
bool success = false;
18581850
uint32_t rs, rt;
18591851
int32_t offset, pc, target = 0, rs_val, rt_val;
1860-
1861-
llvm::StringRef op_name_ref = m_insn_info->getName(insn.getOpcode());
1862-
std::string op_name_str = op_name_ref;
1863-
const char *op_name = op_name_str.c_str();
1864-
1852+
const char *op_name = m_insn_info->getName(insn.getOpcode()).data();
18651853
uint32_t current_inst_size = m_insn_info->get(insn.getOpcode()).getSize();
18661854

18671855
rs = m_reg_info->getEncodingValue(insn.getOperand(0).getReg());
@@ -1941,9 +1929,7 @@ bool EmulateInstructionMIPS::Emulate_Bcond_Link_C(llvm::MCInst &insn) {
19411929
uint32_t rs;
19421930
int32_t offset, pc, target = 0;
19431931
int32_t rs_val;
1944-
llvm::StringRef op_name_ref = m_insn_info->getName(insn.getOpcode());
1945-
std::string op_name_str = op_name_ref;
1946-
const char *op_name = op_name_str.c_str();
1932+
const char *op_name = m_insn_info->getName(insn.getOpcode()).data();
19471933

19481934
rs = m_reg_info->getEncodingValue(insn.getOperand(0).getReg());
19491935
offset = insn.getOperand(1).getImm();
@@ -2012,9 +1998,7 @@ bool EmulateInstructionMIPS::Emulate_Bcond_Link(llvm::MCInst &insn) {
20121998
uint32_t rs;
20131999
int32_t offset, pc, target = 0;
20142000
int32_t rs_val;
2015-
llvm::StringRef op_name_ref = m_insn_info->getName(insn.getOpcode());
2016-
std::string op_name_str = op_name_ref;
2017-
const char *op_name = op_name_str.c_str();
2001+
const char *op_name = m_insn_info->getName(insn.getOpcode()).data();
20182002

20192003
rs = m_reg_info->getEncodingValue(insn.getOperand(0).getReg());
20202004
offset = insn.getOperand(1).getImm();
@@ -2064,9 +2048,7 @@ bool EmulateInstructionMIPS::Emulate_BXX_2ops(llvm::MCInst &insn) {
20642048
uint32_t rs;
20652049
int32_t offset, pc, target = 0;
20662050
int32_t rs_val;
2067-
llvm::StringRef op_name_ref = m_insn_info->getName(insn.getOpcode());
2068-
std::string op_name_str = op_name_ref;
2069-
const char *op_name = op_name_str.c_str();
2051+
const char *op_name = m_insn_info->getName(insn.getOpcode()).data();
20702052

20712053
rs = m_reg_info->getEncodingValue(insn.getOperand(0).getReg());
20722054
offset = insn.getOperand(1).getImm();
@@ -2119,9 +2101,7 @@ bool EmulateInstructionMIPS::Emulate_BXX_2ops_C(llvm::MCInst &insn) {
21192101
uint32_t rs;
21202102
int32_t offset, pc, target = 0;
21212103
int32_t rs_val;
2122-
llvm::StringRef op_name_ref = m_insn_info->getName(insn.getOpcode());
2123-
std::string op_name_str = op_name_ref;
2124-
const char *op_name = op_name_str.c_str();
2104+
const char *op_name = m_insn_info->getName(insn.getOpcode()).data();
21252105
uint32_t current_inst_size = m_insn_info->get(insn.getOpcode()).getSize();
21262106

21272107
rs = m_reg_info->getEncodingValue(insn.getOperand(0).getReg());
@@ -2207,9 +2187,7 @@ bool EmulateInstructionMIPS::Emulate_Branch_MM(llvm::MCInst &insn) {
22072187
bool success = false;
22082188
int32_t target = 0;
22092189
uint32_t current_inst_size = m_insn_info->get(insn.getOpcode()).getSize();
2210-
llvm::StringRef op_name_ref = m_insn_info->getName(insn.getOpcode());
2211-
std::string op_name_str = op_name_ref;
2212-
const char *op_name = op_name_str.c_str();
2190+
const char *op_name = m_insn_info->getName(insn.getOpcode()).data();
22132191
bool update_ra = false;
22142192
uint32_t ra_offset = 0;
22152193

@@ -2309,9 +2287,7 @@ bool EmulateInstructionMIPS::Emulate_Branch_MM(llvm::MCInst &insn) {
23092287
bool EmulateInstructionMIPS::Emulate_JALRx16_MM(llvm::MCInst &insn) {
23102288
bool success = false;
23112289
uint32_t ra_offset = 0;
2312-
llvm::StringRef op_name_ref = m_insn_info->getName(insn.getOpcode());
2313-
std::string op_name_str = op_name_ref;
2314-
const char *op_name = op_name_str.c_str();
2290+
const char *op_name = m_insn_info->getName(insn.getOpcode()).data();
23152291

23162292
uint32_t rs = m_reg_info->getEncodingValue(insn.getOperand(0).getReg());
23172293

@@ -2350,9 +2326,7 @@ bool EmulateInstructionMIPS::Emulate_JALRx16_MM(llvm::MCInst &insn) {
23502326
bool EmulateInstructionMIPS::Emulate_JALx(llvm::MCInst &insn) {
23512327
bool success = false;
23522328
uint32_t offset = 0, target = 0, pc = 0, ra_offset = 0;
2353-
llvm::StringRef op_name_ref = m_insn_info->getName(insn.getOpcode());
2354-
std::string op_name_str = op_name_ref;
2355-
const char *op_name = op_name_str.c_str();
2329+
const char *op_name = m_insn_info->getName(insn.getOpcode()).data();
23562330

23572331
/*
23582332
* JALS target
@@ -2700,9 +2674,7 @@ bool EmulateInstructionMIPS::Emulate_FP_branch(llvm::MCInst &insn) {
27002674
bool success = false;
27012675
uint32_t cc, fcsr;
27022676
int32_t pc, offset, target = 0;
2703-
llvm::StringRef op_name_ref = m_insn_info->getName(insn.getOpcode());
2704-
std::string op_name_str = op_name_ref;
2705-
const char *op_name = op_name_str.c_str();
2677+
const char *op_name = m_insn_info->getName(insn.getOpcode()).data();
27062678

27072679
cc = m_reg_info->getEncodingValue(insn.getOperand(0).getReg());
27082680
offset = insn.getOperand(1).getImm();
@@ -2818,9 +2790,7 @@ bool EmulateInstructionMIPS::Emulate_3D_branch(llvm::MCInst &insn) {
28182790
bool success = false;
28192791
uint32_t cc, fcsr;
28202792
int32_t pc, offset, target = 0;
2821-
llvm::StringRef op_name_ref = m_insn_info->getName(insn.getOpcode());
2822-
std::string op_name_str = op_name_ref;
2823-
const char *op_name = op_name_str.c_str();
2793+
const char *op_name = m_insn_info->getName(insn.getOpcode()).data();
28242794

28252795
cc = m_reg_info->getEncodingValue(insn.getOperand(0).getReg());
28262796
offset = insn.getOperand(1).getImm();

‎lldb/source/Plugins/Instruction/MIPS64/EmulateInstructionMIPS64.cpp‎

Lines changed: 11 additions & 32 deletions
Original file line numberDiff line numberDiff line change
@@ -972,14 +972,11 @@ bool EmulateInstructionMIPS64::EvaluateInstruction(uint32_t evaluate_options) {
972972
* mc_insn.getOpcode() returns decoded opcode. However to make use
973973
* of llvm::Mips::<insn> we would need "MipsGenInstrInfo.inc".
974974
*/
975-
llvm::StringRef op_name_ref = m_insn_info->getName(mc_insn.getOpcode());
975+
const char *op_name = m_insn_info->getName(mc_insn.getOpcode()).data();
976976

977-
if (op_name_ref.empty())
977+
if (op_name == nullptr)
978978
return false;
979979

980-
std::string op_name_str = op_name_ref;
981-
const char *op_name = op_name_str.c_str();
982-
983980
/*
984981
* Decoding has been done already. Just get the call-back function
985982
* and emulate the instruction.
@@ -1264,9 +1261,7 @@ bool EmulateInstructionMIPS64::Emulate_DSUBU_DADDU(llvm::MCInst &insn) {
12641261
bool success = false;
12651262
uint64_t result;
12661263
uint8_t src, dst, rt;
1267-
llvm::StringRef op_name_ref = m_insn_info->getName(insn.getOpcode());
1268-
std::string op_name_str = op_name_ref;
1269-
const char *op_name = op_name_str.c_str();
1264+
const char *op_name = m_insn_info->getName(insn.getOpcode()).data();
12701265

12711266
dst = m_reg_info->getEncodingValue(insn.getOperand(0).getReg());
12721267
src = m_reg_info->getEncodingValue(insn.getOperand(1).getReg());
@@ -1345,9 +1340,7 @@ bool EmulateInstructionMIPS64::Emulate_BXX_3ops(llvm::MCInst &insn) {
13451340
bool success = false;
13461341
uint32_t rs, rt;
13471342
int64_t offset, pc, rs_val, rt_val, target = 0;
1348-
llvm::StringRef op_name_ref = m_insn_info->getName(insn.getOpcode());
1349-
std::string op_name_str = op_name_ref;
1350-
const char *op_name = op_name_str.c_str();
1343+
const char *op_name = m_insn_info->getName(insn.getOpcode()).data();
13511344

13521345
rs = m_reg_info->getEncodingValue(insn.getOperand(0).getReg());
13531346
rt = m_reg_info->getEncodingValue(insn.getOperand(1).getReg());
@@ -1399,9 +1392,7 @@ bool EmulateInstructionMIPS64::Emulate_Bcond_Link(llvm::MCInst &insn) {
13991392
uint32_t rs;
14001393
int64_t offset, pc, target = 0;
14011394
int64_t rs_val;
1402-
llvm::StringRef op_name_ref = m_insn_info->getName(insn.getOpcode());
1403-
std::string op_name_str = op_name_ref;
1404-
const char *op_name = op_name_str.c_str();
1395+
const char *op_name = m_insn_info->getName(insn.getOpcode()).data();
14051396

14061397
rs = m_reg_info->getEncodingValue(insn.getOperand(0).getReg());
14071398
offset = insn.getOperand(1).getImm();
@@ -1511,9 +1502,7 @@ bool EmulateInstructionMIPS64::Emulate_Bcond_Link_C(llvm::MCInst &insn) {
15111502
bool success = false;
15121503
uint32_t rs;
15131504
int64_t offset, pc, rs_val, target = 0;
1514-
llvm::StringRef op_name_ref = m_insn_info->getName(insn.getOpcode());
1515-
std::string op_name_str = op_name_ref;
1516-
const char *op_name = op_name_str.c_str();
1505+
const char *op_name = m_insn_info->getName(insn.getOpcode()).data();
15171506

15181507
rs = m_reg_info->getEncodingValue(insn.getOperand(0).getReg());
15191508
offset = insn.getOperand(1).getImm();
@@ -1581,9 +1570,7 @@ bool EmulateInstructionMIPS64::Emulate_BXX_2ops(llvm::MCInst &insn) {
15811570
bool success = false;
15821571
uint32_t rs;
15831572
int64_t offset, pc, rs_val, target = 0;
1584-
llvm::StringRef op_name_ref = m_insn_info->getName(insn.getOpcode());
1585-
std::string op_name_str = op_name_ref;
1586-
const char *op_name = op_name_str.c_str();
1573+
const char *op_name = m_insn_info->getName(insn.getOpcode()).data();
15871574

15881575
rs = m_reg_info->getEncodingValue(insn.getOperand(0).getReg());
15891576
offset = insn.getOperand(1).getImm();
@@ -1668,9 +1655,7 @@ bool EmulateInstructionMIPS64::Emulate_BXX_3ops_C(llvm::MCInst &insn) {
16681655
bool success = false;
16691656
uint32_t rs, rt;
16701657
int64_t offset, pc, rs_val, rt_val, target = 0;
1671-
llvm::StringRef op_name_ref = m_insn_info->getName(insn.getOpcode());
1672-
std::string op_name_str = op_name_ref;
1673-
const char *op_name = op_name_str.c_str();
1658+
const char *op_name = m_insn_info->getName(insn.getOpcode()).data();
16741659
uint32_t current_inst_size = m_insn_info->get(insn.getOpcode()).getSize();
16751660

16761661
rs = m_reg_info->getEncodingValue(insn.getOperand(0).getReg());
@@ -1750,9 +1735,7 @@ bool EmulateInstructionMIPS64::Emulate_BXX_2ops_C(llvm::MCInst &insn) {
17501735
uint32_t rs;
17511736
int64_t offset, pc, target = 0;
17521737
int64_t rs_val;
1753-
llvm::StringRef op_name_ref = m_insn_info->getName(insn.getOpcode());
1754-
std::string op_name_str = op_name_ref;
1755-
const char *op_name = op_name_str.c_str();
1738+
const char *op_name = m_insn_info->getName(insn.getOpcode()).data();
17561739
uint32_t current_inst_size = m_insn_info->get(insn.getOpcode()).getSize();
17571740

17581741
rs = m_reg_info->getEncodingValue(insn.getOperand(0).getReg());
@@ -1992,9 +1975,7 @@ bool EmulateInstructionMIPS64::Emulate_FP_branch(llvm::MCInst &insn) {
19921975
bool success = false;
19931976
uint32_t cc, fcsr;
19941977
int64_t pc, offset, target = 0;
1995-
llvm::StringRef op_name_ref = m_insn_info->getName(insn.getOpcode());
1996-
std::string op_name_str = op_name_ref;
1997-
const char *op_name = op_name_str.c_str();
1978+
const char *op_name = m_insn_info->getName(insn.getOpcode()).data();
19981979

19991980
/*
20001981
* BC1F cc, offset
@@ -2119,9 +2100,7 @@ bool EmulateInstructionMIPS64::Emulate_3D_branch(llvm::MCInst &insn) {
21192100
bool success = false;
21202101
uint32_t cc, fcsr;
21212102
int64_t pc, offset, target = 0;
2122-
llvm::StringRef op_name_ref = m_insn_info->getName(insn.getOpcode());
2123-
std::string op_name_str = op_name_ref;
2124-
const char *op_name = op_name_str.c_str();
2103+
const char *op_name = m_insn_info->getName(insn.getOpcode()).data();
21252104

21262105
cc = m_reg_info->getEncodingValue(insn.getOperand(0).getReg());
21272106
offset = insn.getOperand(1).getImm();

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