Skip to content

Commit fe55076

Browse files
committed
workin on new variants
1 parent dc7d113 commit fe55076

File tree

12 files changed

+912
-113
lines changed

12 files changed

+912
-113
lines changed

boards.txt

+45-10
Original file line numberDiff line numberDiff line change
@@ -27,7 +27,7 @@ Nucleo_144.menu.pnum.NUCLEO_F207ZG.node=NODE_F207ZG
2727
Nucleo_144.menu.pnum.NUCLEO_F207ZG.upload.maximum_size=1048576
2828
Nucleo_144.menu.pnum.NUCLEO_F207ZG.upload.maximum_data_size=131072
2929
Nucleo_144.menu.pnum.NUCLEO_F207ZG.build.mcu=cortex-m3
30-
Nucleo_144.menu.pnum.NUCLEO_F207ZG.uild.board=NUCLEO_F207ZG
30+
Nucleo_144.menu.pnum.NUCLEO_F207ZG.build.board=NUCLEO_F207ZG
3131
Nucleo_144.menu.pnum.NUCLEO_F207ZG.build.series=STM32F2xx
3232
Nucleo_144.menu.pnum.NUCLEO_F207ZG.build.product_line=STM32F207xx
3333
Nucleo_144.menu.pnum.NUCLEO_F207ZG.build.variant=NUCLEO_F207ZG
@@ -847,6 +847,14 @@ GenF1.build.series=STM32F1xx
847847
GenF1.build.cmsis_lib_gcc=arm_cortexM3l_math
848848
GenF1.build.extra_flags=-D{build.product_line} {build.enable_usb} {build.xSerial} {build.bootloader_flags}
849849

850+
# microduinostm32 F103CB
851+
GenF1.menu.pnum.microduinostm32_F103CB=microduinostm32 F103CB
852+
GenF1.menu.pnum.microduinostm32_F103CB.upload.maximum_size=131072
853+
GenF1.menu.pnum.microduinostm32_F103CB.upload.maximum_data_size=32768
854+
GenF1.menu.pnum.microduinostm32_F103CB.build.board=GENERIC_F103CB
855+
GenF1.menu.pnum.microduinostm32_F103CB.build.product_line=STM32F103xB
856+
GenF1.menu.pnum.microduinostm32_F103CB.build.variant=microduinostm32_F103CB
857+
850858
# BLUEPILL_F103C6 board
851859
GenF1.menu.pnum.BLUEPILL_F103C6=BluePill F103C6 (32K)
852860
GenF1.menu.pnum.BLUEPILL_F103C6.upload.maximum_size=32768
@@ -1221,6 +1229,15 @@ GenF4.build.flags.fp=-mfpu=fpv4-sp-d16 -mfloat-abi=hard
12211229
GenF4.build.series=STM32F4xx
12221230
GenF4.build.cmsis_lib_gcc=arm_cortexM4lf_math
12231231

1232+
# microduinostm32 F410CB
1233+
GenF4.menu.pnum.microduinostm32_F4110CB=microduinostm32 F410CB
1234+
GenF4.menu.pnum.microduinostm32_F4110CB.upload.maximum_size=131072
1235+
GenF4.menu.pnum.microduinostm32_F4110CB.upload.maximum_data_size=32768
1236+
GenF4.menu.pnum.microduinostm32_F4110CB.build.board=GENERIC_F410CB
1237+
GenF4.menu.pnum.microduinostm32_F4110CB.build.product_line=STM32F410Cx
1238+
GenF4.menu.pnum.microduinostm32_F4110CB.build.variant=microduinostm32_F410CB
1239+
1240+
12241241
# Black F407VE
12251242
# https://github.com/mcauser/BLACK_F407VEZ
12261243
GenF4.menu.pnum.BLACK_F407VE=Black F407VE
@@ -1500,15 +1517,6 @@ GenF4.menu.pnum.Generic_F410CB.build.board=GENERIC_F410CB
15001517
GenF4.menu.pnum.Generic_F410CB.build.product_line=STM32F410Cx
15011518
GenF4.menu.pnum.Generic_F410CB.build.variant=Generic_F410Cx
15021519

1503-
# microduinostm32 F410CB
1504-
GenF4.menu.pnum.microduinostm32_F4110CB=microduinostm32 F4110CB
1505-
GenF4.menu.pnum.microduinostm32_F4110CB.upload.maximum_size=131072
1506-
GenF4.menu.pnum.microduinostm32_F4110CB.upload.maximum_data_size=32768
1507-
GenF4.menu.pnum.microduinostm32_F4110CB.build.board=GENERIC_F410CB
1508-
GenF4.menu.pnum.microduinostm32_F4110CB.build.product_line=STM32F410Cx
1509-
GenF4.menu.pnum.microduinostm32_F4110CB.build.variant=microduinostm32_F4110CB
1510-
1511-
15121520
# Generic F410C8
15131521
GenF4.menu.pnum.Generic_F410C8=Generic F410C8
15141522
GenF4.menu.pnum.Generic_F410C8.upload.maximum_size=65536
@@ -1714,6 +1722,33 @@ GenL0.menu.upload_method.bmpMethod=BMP (Black Magic Probe)
17141722
GenL0.menu.upload_method.bmpMethod.upload.protocol=gdb_bmp
17151723
GenL0.menu.upload_method.bmpMethod.upload.tool=bmp_upload
17161724

1725+
1726+
################################################################################
1727+
# Generic L4
1728+
1729+
GenL4.name=Generic STM32L4 series
1730+
GenL4.build.core=arduino
1731+
GenL4.build.board=GenL4
1732+
GenL4.build.extra_flags=-D{build.product_line} {build.enable_usb} {build.xSerial}
1733+
GenL4.build.mcu=cortex-m4
1734+
GenL4.build.flags.fp=-mfpu=fpv4-sp-d16 -mfloat-abi=hard
1735+
GenL4.build.series=STM32L4xx
1736+
GenL4.build.cmsis_lib_gcc=arm_cortexM4lf_math
1737+
1738+
# microduinostm32 L433CC
1739+
GenL4.menu.pnum.microduinostm32_L433CC=microduinostm32 L433CC
1740+
GenL4.menu.pnum.microduinostm32_L433CC.node=NODE_L433RC
1741+
GenL4.menu.pnum.microduinostm32_L433CC.upload.maximum_size=1048576
1742+
GenL4.menu.pnum.microduinostm32_L433CC.upload.maximum_data_size=98304
1743+
GenL4.menu.pnum.microduinostm32_L433CC.build.mcu=cortex-m4
1744+
GenL4.menu.pnum.microduinostm32_L433CC.build.flags.fp=-mfpu=fpv4-sp-d16 -mfloat-abi=hard
1745+
GenL4.menu.pnum.microduinostm32_L433CC.build.board=microduinostm32_L433CC
1746+
GenL4.menu.pnum.microduinostm32_L433CC.build.series=STM32L4xx
1747+
GenL4.menu.pnum.microduinostm32_L433CC.build.product_line=STM32L433xx
1748+
GenL4.menu.pnum.microduinostm32_L433CC.build.variant=microduinostm32_L433CC
1749+
GenL4.menu.pnum.microduinostm32_L433CC.build.cmsis_lib_gcc=arm_cortexM4lf_math
1750+
1751+
17171752
################################################################################
17181753
# Electronic Speed Controller boards
17191754

Original file line numberDiff line numberDiff line change
@@ -0,0 +1,261 @@
1+
/*
2+
*******************************************************************************
3+
* Copyright (c) 2020, STMicroelectronics
4+
* All rights reserved.
5+
*
6+
* This software component is licensed by ST under BSD 3-Clause license,
7+
* the "License"; You may not use this file except in compliance with the
8+
* License. You may obtain a copy of the License at:
9+
* opensource.org/licenses/BSD-3-Clause
10+
*
11+
*******************************************************************************
12+
* Automatically generated from STM32F103C(8-B)Tx.xml
13+
*/
14+
#include "Arduino.h"
15+
#include "PeripheralPins.h"
16+
17+
/* =====
18+
* Note: Commented lines are alternative possibilities which are not used per default.
19+
* If you change them, you will have to know what you do
20+
* =====
21+
*/
22+
23+
//*** ADC ***
24+
25+
#ifdef HAL_ADC_MODULE_ENABLED
26+
WEAK const PinMap PinMap_ADC[] = {
27+
{PA_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 0, 0)}, // ADC1_IN0
28+
// {PA_0, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 0, 0)}, // ADC2_IN0
29+
{PA_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // ADC1_IN1
30+
// {PA_1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // ADC2_IN1
31+
{PA_2, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // ADC1_IN2
32+
// {PA_2, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // ADC2_IN2
33+
{PA_3, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC1_IN3
34+
// {PA_3, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC2_IN3
35+
{PA_4, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 4, 0)}, // ADC1_IN4
36+
// {PA_4, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 4, 0)}, // ADC2_IN4
37+
{PA_5, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC1_IN5
38+
// {PA_5, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC2_IN5
39+
{PA_6, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 6, 0)}, // ADC1_IN6
40+
// {PA_6, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 6, 0)}, // ADC2_IN6
41+
{PA_7, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC1_IN7
42+
// {PA_7, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC2_IN7
43+
{PB_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC1_IN8
44+
// {PB_0, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC2_IN8
45+
{PB_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC1_IN9
46+
// {PB_1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC2_IN9
47+
{NC, NP, 0}
48+
};
49+
#endif
50+
51+
//*** No DAC ***
52+
53+
//*** I2C ***
54+
55+
#ifdef HAL_I2C_MODULE_ENABLED
56+
WEAK const PinMap PinMap_I2C_SDA[] = {
57+
{PB_7, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, AFIO_NONE)},
58+
{PB_9, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, AFIO_I2C1_ENABLE)},
59+
#ifdef STM32F103xB
60+
{PB_11, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, AFIO_NONE)},
61+
#endif
62+
{NC, NP, 0}
63+
};
64+
#endif
65+
66+
#ifdef HAL_I2C_MODULE_ENABLED
67+
WEAK const PinMap PinMap_I2C_SCL[] = {
68+
{PB_6, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, AFIO_NONE)},
69+
{PB_8, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, AFIO_I2C1_ENABLE)},
70+
#ifdef STM32F103xB
71+
{PB_10, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, AFIO_NONE)},
72+
#endif
73+
{NC, NP, 0}
74+
};
75+
#endif
76+
77+
//*** PWM ***
78+
79+
#ifdef HAL_TIM_MODULE_ENABLED
80+
WEAK const PinMap PinMap_PWM[] = {
81+
{PA_0, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 1, 0)}, // TIM2_CH1
82+
// {PA_0, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM2_PARTIAL_2, 1, 0)}, // TIM2_CH1
83+
{PA_1, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 2, 0)}, // TIM2_CH2
84+
// {PA_1, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM2_PARTIAL_2, 2, 0)}, // TIM2_CH2
85+
{PA_2, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 3, 0)}, // TIM2_CH3
86+
// {PA_2, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM2_PARTIAL_1, 3, 0)}, // TIM2_CH3
87+
{PA_3, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 4, 0)}, // TIM2_CH4
88+
// {PA_3, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM2_PARTIAL_1, 4, 0)}, // TIM2_CH4
89+
{PA_6, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 1, 0)}, // TIM3_CH1
90+
// {PA_7, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM1_PARTIAL, 1, 1)}, // TIM1_CH1N
91+
{PA_7, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 2, 0)}, // TIM3_CH2
92+
{PA_8, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 1, 0)}, // TIM1_CH1
93+
// {PA_8, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM1_PARTIAL, 1, 0)}, // TIM1_CH1
94+
{PA_9, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 2, 0)}, // TIM1_CH2
95+
// {PA_9, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM1_PARTIAL, 2, 0)}, // TIM1_CH2
96+
{PA_10, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 3, 0)}, // TIM1_CH3
97+
// {PA_10, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM1_PARTIAL, 3, 0)}, // TIM1_CH3
98+
{PA_11, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 4, 0)}, // TIM1_CH4
99+
// {PA_11, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM1_PARTIAL, 4, 0)}, // TIM1_CH4
100+
// {PA_15, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM2_PARTIAL_1, 1, 0)}, // TIM2_CH1
101+
{PA_15, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM2_ENABLE, 1, 0)}, // TIM2_CH1
102+
// {PB_0, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM1_PARTIAL, 2, 1)}, // TIM1_CH2N
103+
{PB_0, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 3, 0)}, // TIM3_CH3
104+
// {PB_0, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM3_PARTIAL, 3, 0)}, // TIM3_CH3
105+
// {PB_1, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM1_PARTIAL, 3, 1)}, // TIM1_CH3N
106+
{PB_1, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 4, 0)}, // TIM3_CH4
107+
// {PB_1, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM3_PARTIAL, 4, 0)}, // TIM3_CH4
108+
// {PB_3, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM2_PARTIAL_1, 2, 0)}, // TIM2_CH2
109+
{PB_3, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM2_ENABLE, 2, 0)}, // TIM2_CH2
110+
{PB_4, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM3_PARTIAL, 1, 0)}, // TIM3_CH1
111+
{PB_5, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM3_PARTIAL, 2, 0)}, // TIM3_CH2
112+
#ifdef STM32F103xB
113+
{PB_6, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 1, 0)}, // TIM4_CH1
114+
{PB_7, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 2, 0)}, // TIM4_CH2
115+
{PB_8, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 3, 0)}, // TIM4_CH3
116+
{PB_9, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 4, 0)}, // TIM4_CH4
117+
#endif
118+
// {PB_10, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM2_PARTIAL_2, 3, 0)}, // TIM2_CH3
119+
{PB_10, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM2_ENABLE, 3, 0)}, // TIM2_CH3
120+
// {PB_11, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM2_PARTIAL_2, 4, 0)}, // TIM2_CH4
121+
{PB_11, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM2_ENABLE, 4, 0)}, // TIM2_CH4
122+
{PB_13, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 1, 1)}, // TIM1_CH1N
123+
{PB_14, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 2, 1)}, // TIM1_CH2N
124+
{PB_15, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 3, 1)}, // TIM1_CH3N
125+
{NC, NP, 0}
126+
};
127+
#endif
128+
129+
//*** SERIAL ***
130+
131+
#ifdef HAL_UART_MODULE_ENABLED
132+
WEAK const PinMap PinMap_UART_TX[] = {
133+
{PA_2, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)},
134+
{PA_9, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)},
135+
{PB_6, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_USART1_ENABLE)},
136+
#ifdef STM32F103xB
137+
{PB_10, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)},
138+
#endif
139+
{NC, NP, 0}
140+
};
141+
#endif
142+
143+
#ifdef HAL_UART_MODULE_ENABLED
144+
WEAK const PinMap PinMap_UART_RX[] = {
145+
{PA_3, USART2, STM_PIN_DATA(STM_MODE_INPUT, GPIO_PULLUP, AFIO_NONE)},
146+
{PA_10, USART1, STM_PIN_DATA(STM_MODE_INPUT, GPIO_PULLUP, AFIO_NONE)},
147+
{PB_7, USART1, STM_PIN_DATA(STM_MODE_INPUT, GPIO_PULLUP, AFIO_USART1_ENABLE)},
148+
#ifdef STM32F103xB
149+
{PB_11, USART3, STM_PIN_DATA(STM_MODE_INPUT, GPIO_PULLUP, AFIO_NONE)},
150+
#endif
151+
{NC, NP, 0}
152+
};
153+
#endif
154+
155+
#ifdef HAL_UART_MODULE_ENABLED
156+
WEAK const PinMap PinMap_UART_RTS[] = {
157+
{PA_1, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)},
158+
{PA_12, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)},
159+
#ifdef STM32F103xB
160+
{PB_14, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)},
161+
// {PB_14, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_USART3_PARTIAL)},
162+
#endif
163+
{NC, NP, 0}
164+
};
165+
#endif
166+
167+
#ifdef HAL_UART_MODULE_ENABLED
168+
WEAK const PinMap PinMap_UART_CTS[] = {
169+
{PA_0, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)},
170+
{PA_11, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)},
171+
#ifdef STM32F103xB
172+
{PB_13, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)},
173+
// {PB_13, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_USART3_PARTIAL)},
174+
#endif
175+
{NC, NP, 0}
176+
};
177+
#endif
178+
179+
//*** SPI ***
180+
181+
#ifdef HAL_SPI_MODULE_ENABLED
182+
WEAK const PinMap PinMap_SPI_MOSI[] = {
183+
{PA_7, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)},
184+
{PB_5, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_SPI1_ENABLE)},
185+
#ifdef STM32F103xB
186+
{PB_15, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)},
187+
#endif
188+
{NC, NP, 0}
189+
};
190+
#endif
191+
192+
#ifdef HAL_SPI_MODULE_ENABLED
193+
WEAK const PinMap PinMap_SPI_MISO[] = {
194+
{PA_6, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)},
195+
{PB_4, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_SPI1_ENABLE)},
196+
#ifdef STM32F103xB
197+
{PB_14, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)},
198+
#endif
199+
{NC, NP, 0}
200+
};
201+
#endif
202+
203+
#ifdef HAL_SPI_MODULE_ENABLED
204+
WEAK const PinMap PinMap_SPI_SCLK[] = {
205+
{PA_5, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)},
206+
{PB_3, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_SPI1_ENABLE)},
207+
#ifdef STM32F103xB
208+
{PB_13, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)},
209+
#endif
210+
{NC, NP, 0}
211+
};
212+
#endif
213+
214+
#ifdef HAL_SPI_MODULE_ENABLED
215+
WEAK const PinMap PinMap_SPI_SSEL[] = {
216+
{PA_4, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)},
217+
{PA_15, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_SPI1_ENABLE)},
218+
#ifdef STM32F103xB
219+
{PB_12, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)},
220+
#endif
221+
{NC, NP, 0}
222+
};
223+
#endif
224+
225+
//*** CAN ***
226+
227+
#ifdef HAL_CAN_MODULE_ENABLED
228+
WEAK const PinMap PinMap_CAN_RD[] = {
229+
{PA_11, CAN1, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, AFIO_NONE)},
230+
{PB_8, CAN1, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, AFIO_CAN1_2)},
231+
{NC, NP, 0}
232+
};
233+
#endif
234+
235+
#ifdef HAL_CAN_MODULE_ENABLED
236+
WEAK const PinMap PinMap_CAN_TD[] = {
237+
{PA_12, CAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, AFIO_NONE)},
238+
{PB_9, CAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, AFIO_CAN1_2)},
239+
{NC, NP, 0}
240+
};
241+
#endif
242+
243+
//*** No ETHERNET ***
244+
245+
//*** No QUADSPI ***
246+
247+
//*** USB ***
248+
249+
#ifdef HAL_PCD_MODULE_ENABLED
250+
WEAK const PinMap PinMap_USB[] = {
251+
{PA_11, USB, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, AFIO_NONE)}, // USB_DM
252+
{PA_12, USB, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, AFIO_NONE)}, // USB_DP
253+
{NC, NP, 0}
254+
};
255+
#endif
256+
257+
//*** No USB_OTG_FS ***
258+
259+
//*** No USB_OTG_HS ***
260+
261+
//*** No SD ***
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,30 @@
1+
/* SYS_WKUP */
2+
#ifdef PWR_WAKEUP_PIN1
3+
SYS_WKUP1 = PA_0,
4+
#endif
5+
#ifdef PWR_WAKEUP_PIN2
6+
SYS_WKUP2 = NC,
7+
#endif
8+
#ifdef PWR_WAKEUP_PIN3
9+
SYS_WKUP3 = NC,
10+
#endif
11+
#ifdef PWR_WAKEUP_PIN4
12+
SYS_WKUP4 = NC,
13+
#endif
14+
#ifdef PWR_WAKEUP_PIN5
15+
SYS_WKUP5 = NC,
16+
#endif
17+
#ifdef PWR_WAKEUP_PIN6
18+
SYS_WKUP6 = NC,
19+
#endif
20+
#ifdef PWR_WAKEUP_PIN7
21+
SYS_WKUP7 = NC,
22+
#endif
23+
#ifdef PWR_WAKEUP_PIN8
24+
SYS_WKUP8 = NC,
25+
#endif
26+
/* USB */
27+
#ifdef USBCON
28+
USB_DM = PA_11,
29+
USB_DP = PA_12,
30+
#endif

0 commit comments

Comments
 (0)