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GlobalISel: Allow constructing SrcOp/DstOp from MachineOperand
llvm-svn: 353080
1 parent 1c250bf commit f3a46d0

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+27
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llvm/include/llvm/CodeGen/GlobalISel/MachineIRBuilder.h

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@@ -66,6 +66,7 @@ class DstOp {
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public:
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enum class DstType { Ty_LLT, Ty_Reg, Ty_RC };
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DstOp(unsigned R) : Reg(R), Ty(DstType::Ty_Reg) {}
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DstOp(const MachineOperand &Op) : Reg(Op.getReg()), Ty(DstType::Ty_Reg) {}
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DstOp(const LLT &T) : LLTTy(T), Ty(DstType::Ty_LLT) {}
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DstOp(const TargetRegisterClass *TRC) : RC(TRC), Ty(DstType::Ty_RC) {}
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@@ -125,6 +126,7 @@ class SrcOp {
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public:
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enum class SrcType { Ty_Reg, Ty_MIB, Ty_Predicate };
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SrcOp(unsigned R) : Reg(R), Ty(SrcType::Ty_Reg) {}
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SrcOp(const MachineOperand &Op) : Reg(Op.getReg()), Ty(SrcType::Ty_Reg) {}
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SrcOp(const MachineInstrBuilder &MIB) : SrcMIB(MIB), Ty(SrcType::Ty_MIB) {}
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SrcOp(const CmpInst::Predicate P) : Pred(P), Ty(SrcType::Ty_Predicate) {}
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llvm/unittests/CodeGen/GlobalISel/MachineIRBuilderTest.cpp

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@@ -65,3 +65,28 @@ TEST_F(GISelMITest, TestBuildConstantFConstantDeath) {
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#endif
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#endif
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TEST_F(GISelMITest, DstOpSrcOp) {
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if (!TM)
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return;
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SmallVector<unsigned, 4> Copies;
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collectCopies(Copies, MF);
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LLT s64 = LLT::scalar(64);
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auto MIBAdd = B.buildAdd(s64, Copies[0], Copies[1]);
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// Test SrcOp and DstOp can be constructed directly from MachineOperand by
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// copying the instruction
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B.buildAdd(MIBAdd->getOperand(0), MIBAdd->getOperand(1), MIBAdd->getOperand(2));
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auto CheckStr = R"(
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; CHECK: [[COPY0:%[0-9]+]]:_(s64) = COPY $x0
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; CHECK: [[COPY1:%[0-9]+]]:_(s64) = COPY $x1
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; CHECK: [[ADD:%[0-9]+]]:_(s64) = G_ADD [[COPY0]]:_, [[COPY1]]:_
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; CHECK: [[ADD]]:_(s64) = G_ADD [[COPY0]]:_, [[COPY1]]:_
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)";
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EXPECT_TRUE(CheckMachineFunction(*MF, CheckStr)) << *MF;
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}

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