Skip to content

Commit ea834c8

Browse files
brads55brads55
committed
Revert "[AArch64][SVE] Allow accesses to SVE stack objects to use frame pointer"
This patch introduced codegen faults. An attempt to fix this was done in https://reviews.llvm.org/D97193, but ultimately it was decided to approach this differently. This reverts commit 4263585. Differential Revision: https://reviews.llvm.org/D98350
1 parent 2489cba commit ea834c8

5 files changed

+52
-51
lines changed

‎llvm/lib/Target/AArch64/AArch64FrameLowering.cpp

+4-13
Original file line numberDiff line numberDiff line change
@@ -352,7 +352,6 @@ bool AArch64FrameLowering::canUseRedZone(const MachineFunction &MF) const {
352352
/// pointer register.
353353
bool AArch64FrameLowering::hasFP(const MachineFunction &MF) const {
354354
const MachineFrameInfo &MFI = MF.getFrameInfo();
355-
const AArch64FunctionInfo *AFI = MF.getInfo<AArch64FunctionInfo>();
356355
const TargetRegisterInfo *RegInfo = MF.getSubtarget().getRegisterInfo();
357356
// Win64 EH requires a frame pointer if funclets are present, as the locals
358357
// are accessed off the frame pointer in both the parent function and the
@@ -377,14 +376,6 @@ bool AArch64FrameLowering::hasFP(const MachineFunction &MF) const {
377376
if (!MFI.isMaxCallFrameSizeComputed() ||
378377
MFI.getMaxCallFrameSize() > DefaultSafeSPDisplacement)
379378
return true;
380-
// If there are both SVE and non-SVE objects on the stack, make the frame
381-
// pointer available since it may be more performant to use it.
382-
uint64_t CalleeStackSize = AFI->isCalleeSavedStackSizeComputed()
383-
? AFI->getCalleeSavedStackSize()
384-
: 0;
385-
uint64_t NonSVEStackSize = MFI.getStackSize() - CalleeStackSize;
386-
if (AFI->getStackSizeSVE() && NonSVEStackSize)
387-
return true;
388379

389380
return false;
390381
}
@@ -1980,6 +1971,10 @@ StackOffset AArch64FrameLowering::resolveFrameOffsetReference(
19801971
// right thing for the emergency spill slot.
19811972
bool UseFP = false;
19821973
if (AFI->hasStackFrame() && !isSVE) {
1974+
// We shouldn't prefer using the FP when there is an SVE area
1975+
// in between the FP and the non-SVE locals/spills.
1976+
PreferFP &= !SVEStackSize;
1977+
19831978
// Note: Keeping the following as multiple 'if' statements rather than
19841979
// merging to a single expression for readability.
19851980
//
@@ -2000,10 +1995,6 @@ StackOffset AArch64FrameLowering::resolveFrameOffsetReference(
20001995
bool FPOffsetFits = !ForSimm || FPOffset >= -256;
20011996
PreferFP |= Offset > -FPOffset;
20021997

2003-
// The FP offset will not fit if there is an SVE area in the way.
2004-
if (SVEStackSize && FPOffset < 0)
2005-
FPOffsetFits = false;
2006-
20071998
if (MFI.hasVarSizedObjects()) {
20081999
// If we have variable sized objects, we can use either FP or BP, as the
20092000
// SP offset is unknown. We can use the base pointer if we have one and

‎llvm/lib/Target/AArch64/AArch64MachineFunctionInfo.h

-4
Original file line numberDiff line numberDiff line change
@@ -248,10 +248,6 @@ class AArch64FunctionInfo final : public MachineFunctionInfo {
248248
return getCalleeSavedStackSize();
249249
}
250250

251-
bool isCalleeSavedStackSizeComputed() const {
252-
return HasCalleeSavedStackSize;
253-
}
254-
255251
unsigned getCalleeSavedStackSize() const {
256252
assert(HasCalleeSavedStackSize &&
257253
"CalleeSavedStackSize has not been calculated");

‎llvm/test/CodeGen/AArch64/debug-info-sve-dbg-value.mir

+4-4
Original file line numberDiff line numberDiff line change
@@ -12,16 +12,16 @@
1212
# CHECK1: : DW_OP_breg31 WSP+16)
1313
# CHECK1: DW_AT_type {{.*}}ty32
1414
#
15-
# CHECK2: : DW_OP_breg29 W29+0, DW_OP_lit8, DW_OP_bregx VG+0, DW_OP_mul, DW_OP_minus)
15+
# CHECK2: : DW_OP_breg31 WSP+16, DW_OP_lit16, DW_OP_bregx VG+0, DW_OP_mul, DW_OP_plus)
1616
# CHECK2: DW_AT_type {{.*}}svint32_t
1717
#
18-
# CHECK3: : DW_OP_breg29 W29+0, DW_OP_lit16, DW_OP_bregx VG+0, DW_OP_mul, DW_OP_minus)
18+
# CHECK3: : DW_OP_breg31 WSP+16, DW_OP_lit8, DW_OP_bregx VG+0, DW_OP_mul, DW_OP_plus)
1919
# CHECK3: DW_AT_type {{.*}}svint32_t
2020
#
21-
# CHECK4: : DW_OP_breg29 W29+0, DW_OP_lit17, DW_OP_bregx VG+0, DW_OP_mul, DW_OP_minus)
21+
# CHECK4: : DW_OP_breg31 WSP+16, DW_OP_lit7, DW_OP_bregx VG+0, DW_OP_mul, DW_OP_plus)
2222
# CHECK4: DW_AT_type {{.*}}svbool_t
2323
#
24-
# CHECK5: : DW_OP_breg29 W29+0, DW_OP_lit18, DW_OP_bregx VG+0, DW_OP_mul, DW_OP_minus)
24+
# CHECK5: : DW_OP_breg31 WSP+16, DW_OP_lit6, DW_OP_bregx VG+0, DW_OP_mul, DW_OP_plus)
2525
# CHECK5: DW_AT_type {{.*}}svbool_t
2626

2727
--- |

‎llvm/test/CodeGen/AArch64/framelayout-sve.mir

+36-23
Original file line numberDiff line numberDiff line change
@@ -57,7 +57,6 @@
5757

5858
# CHECK: bb.0.entry:
5959
# CHECK-NEXT: $sp = frame-setup STRXpre killed $[[SCRATCH:[a-z0-9]+]], $sp, -16
60-
# CHECK-NEXT: $fp = frame-setup ADDXri $sp, 0, 0
6160
# CHECK-NEXT: $sp = frame-setup ADDVL_XXI $sp, -2
6261
# CHECK-NEXT: $sp = frame-setup SUBXri $sp, 16, 0
6362
# CHECK-COUNT-2: frame-setup CFI_INSTRUCTION
@@ -68,9 +67,11 @@
6867
# CHECK-NEXT: RET_ReallyLR
6968

7069
# ASM-LABEL: test_allocate_sve:
71-
# ASM: .cfi_offset w29, -16
70+
# ASM: .cfi_escape 0x0f, 0x0c, 0x8f, 0x00, 0x11, 0x20, 0x22, 0x11, 0x10, 0x92, 0x2e, 0x00, 0x1e, 0x22 // sp + 32 + 16 * VG
71+
# ASM-NEXT: .cfi_offset w29, -16
7272
#
73-
# UNWINDINFO: DW_CFA_offset: reg29 -16
73+
# UNWINDINFO: DW_CFA_def_cfa_expression: DW_OP_breg31 +0, DW_OP_consts +32, DW_OP_plus, DW_OP_consts +16, DW_OP_bregx 0x2e +0, DW_OP_mul, DW_OP_plus
74+
# UNWINDINFO-NEXT: DW_CFA_offset: reg29 -16
7475
name: test_allocate_sve
7576
stack:
7677
- { id: 0, stack-id: scalable-vector, size: 18, alignment: 2 }
@@ -95,7 +96,6 @@ body: |
9596
# CHECK: bb.0.entry:
9697
# CHECK-NEXT: $sp = frame-setup STRXpre killed $[[SCRATCH:[a-z0-9]+]], $sp, -32
9798
# CHECK-NEXT: frame-setup STPXi killed $x21, killed $x20, $sp, 2
98-
# CHECK-NEXT: $fp = frame-setup ADDXri $sp, 0, 0
9999
# CHECK-NEXT: $sp = frame-setup ADDVL_XXI $sp, -2
100100
# CHECK-NEXT: $sp = frame-setup SUBXri $sp, 16, 0
101101
# CHECK-COUNT-4: frame-setup CFI_INSTRUCTION
@@ -109,11 +109,13 @@ body: |
109109
# CHECK-NEXT: RET_ReallyLR
110110
#
111111
# ASM-LABEL: test_allocate_sve_gpr_callee_saves:
112-
# ASM: .cfi_offset w20, -8
112+
# ASM: .cfi_escape 0x0f, 0x0c, 0x8f, 0x00, 0x11, 0x30, 0x22, 0x11, 0x10, 0x92, 0x2e, 0x00, 0x1e, 0x22 // sp + 48 + 16 * VG
113+
# ASM-NEXT: .cfi_offset w20, -8
113114
# ASM-NEXT: .cfi_offset w21, -16
114115
# ASM-NEXT: .cfi_offset w29, -32
115116
#
116-
# UNWINDINFO: DW_CFA_offset: reg20 -8
117+
# UNWINDINFO: DW_CFA_def_cfa_expression: DW_OP_breg31 +0, DW_OP_consts +48, DW_OP_plus, DW_OP_consts +16, DW_OP_bregx 0x2e +0, DW_OP_mul, DW_OP_plus
118+
# UNWINDINFO-NEXT: DW_CFA_offset: reg20 -8
117119
# UNWINDINFO-NEXT: DW_CFA_offset: reg21 -16
118120
# UNWINDINFO-NEXT: DW_CFA_offset: reg29 -32
119121
name: test_allocate_sve_gpr_callee_saves
@@ -182,24 +184,28 @@ body: |
182184

183185
# CHECK: bb.0.entry:
184186
# CHECK-NEXT: $sp = frame-setup STRXpre killed $[[SCRATCH:[a-z0-9]+]], $sp, -16
185-
# CHECK-NEXT: $fp = frame-setup ADDXri $sp, 0, 0
186187
# CHECK-NEXT: $sp = frame-setup ADDVL_XXI $sp, -3
187188
# CHECK-NEXT: $sp = frame-setup SUBXri $sp, 16, 0
188189
# CHECK-COUNT-2: frame-setup CFI_INSTRUCTION
189190

190-
# CHECK-NEXT: STR_ZXI $z0, $fp, -1
191-
# CHECK-NEXT: STR_ZXI $z1, $fp, -2
192-
# CHECK-NEXT: STR_PXI $p0, $fp, -17
191+
# CHECK-NEXT: $[[TMP:x[0-9]+]] = ADDXri $sp, 16
192+
# CHECK-NEXT: STR_ZXI $z0, killed $[[TMP]], 2
193+
# CHECK-NEXT: $[[TMP:x[0-9]+]] = ADDXri $sp, 16
194+
# CHECK-NEXT: STR_ZXI $z1, killed $[[TMP]], 1
195+
# CHECK-NEXT: $[[TMP:x[0-9]+]] = ADDXri $sp, 16
196+
# CHECK-NEXT: STR_PXI $p0, killed $[[TMP]], 7
193197

194198
# CHECK-NEXT: $sp = frame-destroy ADDVL_XXI $sp, 3
195199
# CHECK-NEXT: $sp = frame-destroy ADDXri $sp, 16, 0
196200
# CHECK-NEXT: $sp, $[[SCRATCH]] = frame-destroy LDRXpost $sp, 16
197201
# CHECK-NEXT: RET_ReallyLR
198202
#
199203
# ASM-LABEL: test_address_sve:
200-
# ASM: .cfi_offset w29, -16
204+
# ASM: .cfi_escape 0x0f, 0x0c, 0x8f, 0x00, 0x11, 0x20, 0x22, 0x11, 0x18, 0x92, 0x2e, 0x00, 0x1e, 0x22 // sp + 32 + 24 * VG
205+
# ASM-NEXT: .cfi_offset w29, -16
201206
#
202-
# UNWINDINFO: DW_CFA_offset: reg29 -16
207+
# UNWINDINFO: DW_CFA_def_cfa_expression: DW_OP_breg31 +0, DW_OP_consts +32, DW_OP_plus, DW_OP_consts +24, DW_OP_bregx 0x2e +0, DW_OP_mul, DW_OP_plus
208+
# UNWINDINFO-NEXT: DW_CFA_offset: reg29 -16
203209

204210
name: test_address_sve
205211
frameInfo:
@@ -292,22 +298,24 @@ body: |
292298

293299
# CHECK: bb.0.entry:
294300
# CHECK-NEXT: $sp = frame-setup STRXpre killed $[[SCRATCH:[a-z0-9]+]], $sp, -16
295-
# CHECK-NEXT: $fp = frame-setup ADDXri $sp, 0, 0
296301
# CHECK-NEXT: $sp = frame-setup ADDVL_XXI $sp, -1
297302
# CHECK-NEXT: $sp = frame-setup SUBXri $sp, 16, 0
298303
# CHECK-COUNT-2: frame-setup CFI_INSTRUCTION
299304

300-
# CHECK-NEXT: $x0 = LDRXui $fp, 2
305+
# CHECK: $[[TMP:x[0-9]+]] = ADDVL_XXI $sp, 1
306+
# CHECK-NEXT: $x0 = LDRXui killed $[[TMP]], 4
301307

302308
# CHECK-NEXT: $sp = frame-destroy ADDVL_XXI $sp, 1
303309
# CHECK-NEXT: $sp = frame-destroy ADDXri $sp, 16, 0
304310
# CHECK-NEXT: $sp, $[[SCRATCH]] = frame-destroy LDRXpost $sp, 16
305311
# CHECK-NEXT: RET_ReallyLR
306312
#
307313
# ASM-LABEL: test_stack_arg_sve:
308-
# ASM: .cfi_offset w29, -16
314+
# ASM: .cfi_escape 0x0f, 0x0c, 0x8f, 0x00, 0x11, 0x20, 0x22, 0x11, 0x08, 0x92, 0x2e, 0x00, 0x1e, 0x22 // sp + 32 + 8 * VG
315+
# ASM-NEXT: .cfi_offset w29, -16
309316
#
310-
# UNWINDINFO: DW_CFA_offset: reg29 -16
317+
# UNWINDINFO: DW_CFA_def_cfa_expression: DW_OP_breg31 +0, DW_OP_consts +32, DW_OP_plus, DW_OP_consts +8, DW_OP_bregx 0x2e +0, DW_OP_mul, DW_OP_plus
318+
# UNWINDINFO-NEXT: DW_CFA_offset: reg29 -16
311319

312320
name: test_stack_arg_sve
313321
fixedStack:
@@ -452,9 +460,11 @@ body: |
452460
# CHECK: RET_ReallyLR
453461
#
454462
# ASM-LABEL: save_restore_pregs_sve:
455-
# ASM: .cfi_offset w29, -16
463+
# ASM: .cfi_escape 0x0f, 0x0c, 0x8f, 0x00, 0x11, 0x30, 0x22, 0x11, 0x08, 0x92, 0x2e, 0x00, 0x1e, 0x22 // sp + 48 + 8 * VG
464+
# ASM-NEXT: .cfi_offset w29, -16
456465
#
457-
# UNWINDINFO: DW_CFA_offset: reg29 -16
466+
# UNWINDINFO: DW_CFA_def_cfa_expression: DW_OP_breg31 +0, DW_OP_consts +48, DW_OP_plus, DW_OP_consts +8, DW_OP_bregx 0x2e +0, DW_OP_mul, DW_OP_plus
467+
# UNWINDINFO-NEXT: DW_CFA_offset: reg29 -16
458468
name: save_restore_pregs_sve
459469
stack:
460470
- { id: 0, stack-id: default, size: 32, alignment: 16 }
@@ -470,7 +480,6 @@ body: |
470480
...
471481
# CHECK-LABEL: name: save_restore_zregs_sve
472482
# CHECK: $sp = frame-setup STRXpre killed $fp, $sp, -16
473-
# CHECK-NEXT: $fp = frame-setup ADDXri $sp, 0, 0
474483
# CHECK-NEXT: $sp = frame-setup ADDVL_XXI $sp, -3
475484
# CHECK-NEXT: frame-setup STR_ZXI killed $z10, $sp, 0
476485
# CHECK-NEXT: frame-setup STR_ZXI killed $z9, $sp, 1
@@ -487,11 +496,13 @@ body: |
487496
# CHECK-NEXT: RET_ReallyLR
488497
#
489498
# ASM-LABEL: save_restore_zregs_sve:
490-
# ASM: .cfi_escape 0x10, 0x48, 0x0a, 0x11, 0x70, 0x22, 0x11, 0x78, 0x92, 0x2e, 0x00, 0x1e, 0x22 // $d8 @ cfa - 16 - 8 * VG
499+
# ASM: .cfi_escape 0x0f, 0x0c, 0x8f, 0x00, 0x11, 0x30, 0x22, 0x11, 0x18, 0x92, 0x2e, 0x00, 0x1e, 0x22 // sp + 48 + 24 * VG
500+
# ASM-NEXT: .cfi_escape 0x10, 0x48, 0x0a, 0x11, 0x70, 0x22, 0x11, 0x78, 0x92, 0x2e, 0x00, 0x1e, 0x22 // $d8 @ cfa - 16 - 8 * VG
491501
# ASM-NEXT: .cfi_escape 0x10, 0x49, 0x0a, 0x11, 0x70, 0x22, 0x11, 0x70, 0x92, 0x2e, 0x00, 0x1e, 0x22 // $d9 @ cfa - 16 - 16 * VG
492502
# ASM-NEXT: .cfi_escape 0x10, 0x4a, 0x0a, 0x11, 0x70, 0x22, 0x11, 0x68, 0x92, 0x2e, 0x00, 0x1e, 0x22 // $d10 @ cfa - 16 - 24 * VG
493503

494-
# UNWINDINFO: DW_CFA_expression: reg72 DW_OP_consts -16, DW_OP_plus, DW_OP_consts -8, DW_OP_bregx 0x2e +0, DW_OP_mul, DW_OP_plus
504+
# UNWINDINFO: DW_CFA_def_cfa_expression: DW_OP_breg31 +0, DW_OP_consts +48, DW_OP_plus, DW_OP_consts +24, DW_OP_bregx 0x2e +0, DW_OP_mul, DW_OP_plus
505+
# UNWINDINFO-NEXT: DW_CFA_expression: reg72 DW_OP_consts -16, DW_OP_plus, DW_OP_consts -8, DW_OP_bregx 0x2e +0, DW_OP_mul, DW_OP_plus
495506
# UNWINDINFO-NEXT: DW_CFA_expression: reg73 DW_OP_consts -16, DW_OP_plus, DW_OP_consts -16, DW_OP_bregx 0x2e +0, DW_OP_mul, DW_OP_plus
496507
# UNWINDINFO-NEXT: DW_CFA_expression: reg74 DW_OP_consts -16, DW_OP_plus, DW_OP_consts -24, DW_OP_bregx 0x2e +0, DW_OP_mul, DW_OP_plus
497508
# UNWINDINFO-NEXT: DW_CFA_offset: reg29 -16
@@ -547,7 +558,8 @@ body: |
547558
# CHECK: RET_ReallyLR
548559
#
549560
# ASM-LABEL: save_restore_sve:
550-
# ASM: .cfi_escape 0x10, 0x48, 0x0a, 0x11, 0x60, 0x22, 0x11, 0x78, 0x92, 0x2e, 0x00, 0x1e, 0x22 // $d8 @ cfa - 32 - 8 * VG
561+
# ASM: .cfi_escape 0x0f, 0x0e, 0x8f, 0x00, 0x11, 0xc0, 0x00, 0x22, 0x11, 0x98, 0x01, 0x92, 0x2e, 0x00, 0x1e, 0x22 // sp + 64 + 152 * VG
562+
# ASM-NEXT: .cfi_escape 0x10, 0x48, 0x0a, 0x11, 0x60, 0x22, 0x11, 0x78, 0x92, 0x2e, 0x00, 0x1e, 0x22 // $d8 @ cfa - 32 - 8 * VG
551563
# ASM-NEXT: .cfi_escape 0x10, 0x49, 0x0a, 0x11, 0x60, 0x22, 0x11, 0x70, 0x92, 0x2e, 0x00, 0x1e, 0x22 // $d9 @ cfa - 32 - 16 * VG
552564
# ASM-NEXT: .cfi_escape 0x10, 0x4a, 0x0a, 0x11, 0x60, 0x22, 0x11, 0x68, 0x92, 0x2e, 0x00, 0x1e, 0x22 // $d10 @ cfa - 32 - 24 * VG
553565
# ASM-NEXT: .cfi_escape 0x10, 0x4b, 0x0a, 0x11, 0x60, 0x22, 0x11, 0x60, 0x92, 0x2e, 0x00, 0x1e, 0x22 // $d11 @ cfa - 32 - 32 * VG
@@ -560,7 +572,8 @@ body: |
560572
# ASM-NEXT: .cfi_offset w21, -24
561573
# ASM-NEXT: .cfi_offset w29, -32
562574
#
563-
# UNWINDINFO: DW_CFA_expression: reg72 DW_OP_consts -32, DW_OP_plus, DW_OP_consts -8, DW_OP_bregx 0x2e +0, DW_OP_mul, DW_OP_plus
575+
# UNWINDINFO: DW_CFA_def_cfa_expression: DW_OP_breg31 +0, DW_OP_consts +64, DW_OP_plus, DW_OP_consts +152, DW_OP_bregx 0x2e +0, DW_OP_mul, DW_OP_plus
576+
# UNWINDINFO-NEXT: DW_CFA_expression: reg72 DW_OP_consts -32, DW_OP_plus, DW_OP_consts -8, DW_OP_bregx 0x2e +0, DW_OP_mul, DW_OP_plus
564577
# UNWINDINFO-NEXT: DW_CFA_expression: reg73 DW_OP_consts -32, DW_OP_plus, DW_OP_consts -16, DW_OP_bregx 0x2e +0, DW_OP_mul, DW_OP_plus
565578
# UNWINDINFO-NEXT: DW_CFA_expression: reg74 DW_OP_consts -32, DW_OP_plus, DW_OP_consts -24, DW_OP_bregx 0x2e +0, DW_OP_mul, DW_OP_plus
566579
# UNWINDINFO-NEXT: DW_CFA_expression: reg75 DW_OP_consts -32, DW_OP_plus, DW_OP_consts -32, DW_OP_bregx 0x2e +0, DW_OP_mul, DW_OP_plus

‎llvm/test/CodeGen/AArch64/sve-calling-convention-mixed.ll

+8-7
Original file line numberDiff line numberDiff line change
@@ -41,27 +41,28 @@ define float @foo2(double* %x0, double* %x1) nounwind {
4141
; CHECK-LABEL: foo2:
4242
; CHECK: // %bb.0: // %entry
4343
; CHECK-NEXT: stp x29, x30, [sp, #-16]! // 16-byte Folded Spill
44-
; CHECK-NEXT: mov x29, sp
4544
; CHECK-NEXT: addvl sp, sp, #-4
45+
; CHECK-NEXT: sub sp, sp, #16 // =16
4646
; CHECK-NEXT: ptrue p0.b
4747
; CHECK-NEXT: ld4d { z1.d, z2.d, z3.d, z4.d }, p0/z, [x0]
4848
; CHECK-NEXT: ld4d { z16.d, z17.d, z18.d, z19.d }, p0/z, [x1]
4949
; CHECK-NEXT: ptrue p0.d
50-
; CHECK-NEXT: addvl x8, x29, #-4
50+
; CHECK-NEXT: add x8, sp, #16 // =16
51+
; CHECK-NEXT: add x9, sp, #16 // =16
5152
; CHECK-NEXT: fmov s0, #1.00000000
52-
; CHECK-NEXT: st1d { z16.d }, p0, [x29, #-4, mul vl]
53-
; CHECK-NEXT: st1d { z17.d }, p0, [x8, #1, mul vl]
54-
; CHECK-NEXT: st1d { z18.d }, p0, [x8, #2, mul vl]
55-
; CHECK-NEXT: st1d { z19.d }, p0, [x8, #3, mul vl]
5653
; CHECK-NEXT: mov w1, #1
5754
; CHECK-NEXT: mov w2, #2
5855
; CHECK-NEXT: mov w3, #3
5956
; CHECK-NEXT: mov w4, #4
6057
; CHECK-NEXT: mov w5, #5
6158
; CHECK-NEXT: mov w6, #6
6259
; CHECK-NEXT: mov w7, #7
63-
; CHECK-NEXT: str x8, [sp, #-16]!
6460
; CHECK-NEXT: mov w0, wzr
61+
; CHECK-NEXT: st1d { z16.d }, p0, [x9]
62+
; CHECK-NEXT: st1d { z17.d }, p0, [x8, #1, mul vl]
63+
; CHECK-NEXT: st1d { z18.d }, p0, [x8, #2, mul vl]
64+
; CHECK-NEXT: st1d { z19.d }, p0, [x8, #3, mul vl]
65+
; CHECK-NEXT: str x8, [sp]
6566
; CHECK-NEXT: bl callee2
6667
; CHECK-NEXT: addvl sp, sp, #4
6768
; CHECK-NEXT: add sp, sp, #16 // =16

0 commit comments

Comments
 (0)