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Add an option to use a virtual register as the global base register instead of
reserving a physical register ($gp or $28) for that purpose. This will completely eliminate loads that restore the value of $gp after every function call, if the register allocator assigns a callee-saved register, or eliminate unnecessary loads if it assigns a temporary register. example: .cpload $25 // set $gp. ... .cprestore 16 // store $gp to stack slot 16($sp). ... jalr $25 // function call. clobbers $gp. lw $gp, 16($sp) // not emitted if callee-saved reg is chosen. ... lw $2, 4($gp) ... jalr $25 // function call. lw $gp, 16($sp) // not emitted if $gp is not live after this instruction. ... llvm-svn: 151402
1 parent 324df55 commit b049aef

18 files changed

+276
-99
lines changed

‎llvm/lib/Target/Mips/Mips64InstrInfo.td

+6-6
Original file line numberDiff line numberDiff line change
@@ -244,12 +244,12 @@ def : Pat<(add CPU64Regs:$hi, (MipsLo tconstpool:$lo)),
244244
def : Pat<(add CPU64Regs:$hi, (MipsLo tglobaltlsaddr:$lo)),
245245
(DADDiu CPU64Regs:$hi, tglobaltlsaddr:$lo)>;
246246

247-
def : WrapperPat<tglobaladdr, DADDiu, GP_64>;
248-
def : WrapperPat<tconstpool, DADDiu, GP_64>;
249-
def : WrapperPat<texternalsym, DADDiu, GP_64>;
250-
def : WrapperPat<tblockaddress, DADDiu, GP_64>;
251-
def : WrapperPat<tjumptable, DADDiu, GP_64>;
252-
def : WrapperPat<tglobaltlsaddr, DADDiu, GP_64>;
247+
def : WrapperPat<tglobaladdr, DADDiu, CPU64Regs>;
248+
def : WrapperPat<tconstpool, DADDiu, CPU64Regs>;
249+
def : WrapperPat<texternalsym, DADDiu, CPU64Regs>;
250+
def : WrapperPat<tblockaddress, DADDiu, CPU64Regs>;
251+
def : WrapperPat<tjumptable, DADDiu, CPU64Regs>;
252+
def : WrapperPat<tglobaltlsaddr, DADDiu, CPU64Regs>;
253253

254254
defm : BrcondPats<CPU64Regs, BEQ64, BNE64, SLT64, SLTu64, SLTi64, SLTiu64,
255255
ZERO_64>;

‎llvm/lib/Target/Mips/MipsAsmPrinter.cpp

+12
Original file line numberDiff line numberDiff line change
@@ -34,6 +34,8 @@
3434
#include "llvm/Instructions.h"
3535
#include "llvm/MC/MCStreamer.h"
3636
#include "llvm/MC/MCAsmInfo.h"
37+
#include "llvm/MC/MCContext.h"
38+
#include "llvm/MC/MCExpr.h"
3739
#include "llvm/MC/MCInst.h"
3840
#include "llvm/MC/MCSymbol.h"
3941
#include "llvm/Support/TargetRegistry.h"
@@ -116,6 +118,16 @@ void MipsAsmPrinter::EmitInstruction(const MachineInstr *MI) {
116118
}
117119
}
118120

121+
if (Opc == Mips::SETGP01) {
122+
MCInstLowering.LowerSETGP01(MI, MCInsts);
123+
124+
for (SmallVector<MCInst, 4>::iterator I = MCInsts.begin();
125+
I != MCInsts.end(); ++I)
126+
OutStreamer.EmitInstruction(*I);
127+
128+
return;
129+
}
130+
119131
OutStreamer.EmitInstruction(TmpInst0);
120132
}
121133

‎llvm/lib/Target/Mips/MipsEmitGPRestore.cpp

+5-2
Original file line numberDiff line numberDiff line change
@@ -44,11 +44,14 @@ namespace {
4444
} // end of anonymous namespace
4545

4646
bool Inserter::runOnMachineFunction(MachineFunction &F) {
47-
if (TM.getRelocationModel() != Reloc::PIC_)
47+
MipsFunctionInfo *MipsFI = F.getInfo<MipsFunctionInfo>();
48+
49+
if ((TM.getRelocationModel() != Reloc::PIC_) ||
50+
(!MipsFI->globalBaseRegFixed()))
4851
return false;
4952

5053
bool Changed = false;
51-
int FI = F.getInfo<MipsFunctionInfo>()->getGPFI();
54+
int FI = MipsFI->getGPFI();
5255

5356
for (MachineFunction::iterator MFI = F.begin(), MFE = F.end();
5457
MFI != MFE; ++MFI) {

‎llvm/lib/Target/Mips/MipsExpandPseudo.cpp

+6
Original file line numberDiff line numberDiff line change
@@ -67,6 +67,12 @@ bool MipsExpandPseudo::runOnMachineBasicBlock(MachineBasicBlock& MBB) {
6767
default:
6868
++I;
6969
continue;
70+
case Mips::SETGP2:
71+
// Convert "setgp2 $globalreg, $t9" to "addu $globalreg, $v0, $t9"
72+
BuildMI(MBB, I, I->getDebugLoc(), TII->get(Mips::ADDu),
73+
I->getOperand(0).getReg())
74+
.addReg(Mips::V0).addReg(I->getOperand(1).getReg());
75+
break;
7076
case Mips::BuildPairF64:
7177
ExpandBuildPairF64(MBB, I);
7278
break;

‎llvm/lib/Target/Mips/MipsFrameLowering.cpp

+11-28
Original file line numberDiff line numberDiff line change
@@ -136,20 +136,16 @@ void MipsFrameLowering::emitPrologue(MachineFunction &MF) const {
136136
MipsFunctionInfo *MipsFI = MF.getInfo<MipsFunctionInfo>();
137137
const MipsRegisterInfo *RegInfo =
138138
static_cast<const MipsRegisterInfo*>(MF.getTarget().getRegisterInfo());
139-
MachineRegisterInfo& MRI = MF.getRegInfo();
140139
const MipsInstrInfo &TII =
141140
*static_cast<const MipsInstrInfo*>(MF.getTarget().getInstrInfo());
142141
MachineBasicBlock::iterator MBBI = MBB.begin();
143142
DebugLoc dl = MBBI != MBB.end() ? MBBI->getDebugLoc() : DebugLoc();
144143
bool isPIC = (MF.getTarget().getRelocationModel() == Reloc::PIC_);
145-
unsigned GP = STI.isABI_N64() ? Mips::GP_64 : Mips::GP;
146-
unsigned T9 = STI.isABI_N64() ? Mips::T9_64 : Mips::T9;
147144
unsigned SP = STI.isABI_N64() ? Mips::SP_64 : Mips::SP;
148145
unsigned FP = STI.isABI_N64() ? Mips::FP_64 : Mips::FP;
149146
unsigned ZERO = STI.isABI_N64() ? Mips::ZERO_64 : Mips::ZERO;
150147
unsigned ADDu = STI.isABI_N64() ? Mips::DADDu : Mips::ADDu;
151148
unsigned ADDiu = STI.isABI_N64() ? Mips::DADDiu : Mips::ADDiu;
152-
unsigned LUi = STI.isABI_N64() ? Mips::LUi64 : Mips::LUi;
153149

154150
// First, compute final stack size.
155151
unsigned RegSize = STI.isGP32bit() ? 4 : 8;
@@ -164,17 +160,19 @@ void MipsFrameLowering::emitPrologue(MachineFunction &MF) const {
164160
MFI->setStackSize(StackSize);
165161

166162
BuildMI(MBB, MBBI, dl, TII.get(Mips::NOREORDER));
167-
168-
// Emit instructions that set $gp using the the value of $t9.
169-
// O32 uses the directive .cpload while N32/64 requires three instructions to
170-
// do this.
171-
// TODO: Do not emit these instructions if no instructions use $gp.
172-
if (isPIC && STI.isABI_O32())
173-
BuildMI(MBB, MBBI, dl, TII.get(Mips::CPLOAD))
174-
.addReg(RegInfo->getPICCallReg());
175-
176163
BuildMI(MBB, MBBI, dl, TII.get(Mips::NOMACRO));
177164

165+
// Emit instructions that set the global base register if the target ABI is
166+
// O32.
167+
if (isPIC && MipsFI->globalBaseRegSet() && STI.isABI_O32()) {
168+
if (MipsFI->globalBaseRegFixed())
169+
BuildMI(MBB, llvm::prior(MBBI), dl, TII.get(Mips::CPLOAD))
170+
.addReg(RegInfo->getPICCallReg());
171+
else
172+
// See MipsInstrInfo.td for explanation.
173+
BuildMI(MBB, MBBI, dl, TII.get(Mips:: SETGP01), Mips::V0);
174+
}
175+
178176
// No need to allocate space on the stack.
179177
if (StackSize == 0 && !MFI->adjustsStack()) return;
180178

@@ -239,21 +237,6 @@ void MipsFrameLowering::emitPrologue(MachineFunction &MF) const {
239237
}
240238
}
241239

242-
if ((STI.isABI_N64() || (isPIC && STI.isABI_N32())) &&
243-
MRI.isPhysRegUsed(GP)) {
244-
// lui $28,%hi(%neg(%gp_rel(fname)))
245-
// addu $28,$28,$25
246-
// addiu $28,$28,%lo(%neg(%gp_rel(fname)))
247-
MachineBasicBlock::iterator InsPos = llvm::prior(MBBI);
248-
const GlobalValue *FName = MF.getFunction();
249-
BuildMI(MBB, MBBI, dl, TII.get(LUi), GP)
250-
.addGlobalAddress(FName, 0, MipsII::MO_GPOFF_HI);
251-
BuildMI(MBB, MBBI, dl, TII.get(ADDu), GP).addReg(GP).addReg(T9);
252-
BuildMI(MBB, MBBI, dl, TII.get(ADDiu), GP).addReg(GP)
253-
.addGlobalAddress(FName, 0, MipsII::MO_GPOFF_LO);
254-
MBBI = ++InsPos;
255-
}
256-
257240
// if framepointer enabled, set it to point to the stack pointer.
258241
if (hasFP(MF)) {
259242
// Insert instruction "move $fp, $sp" at this location.

‎llvm/lib/Target/Mips/MipsISelDAGToDAG.cpp

+86-4
Original file line numberDiff line numberDiff line change
@@ -18,6 +18,7 @@
1818
#include "MipsRegisterInfo.h"
1919
#include "MipsSubtarget.h"
2020
#include "MipsTargetMachine.h"
21+
#include "MCTargetDesc/MipsBaseInfo.h"
2122
#include "llvm/GlobalValue.h"
2223
#include "llvm/Instructions.h"
2324
#include "llvm/Intrinsics.h"
@@ -64,6 +65,7 @@ class MipsDAGToDAGISel : public SelectionDAGISel {
6465
return "MIPS DAG->DAG Pattern Instruction Selection";
6566
}
6667

68+
virtual bool runOnMachineFunction(MachineFunction &MF);
6769

6870
private:
6971
// Include the pieces autogenerated from the target description.
@@ -96,18 +98,99 @@ class MipsDAGToDAGISel : public SelectionDAGISel {
9698
return CurDAG->getTargetConstant(Imm, Node->getValueType(0));
9799
}
98100

101+
void InitGlobalBaseReg(MachineFunction &MF);
102+
99103
virtual bool SelectInlineAsmMemoryOperand(const SDValue &Op,
100104
char ConstraintCode,
101105
std::vector<SDValue> &OutOps);
102106
};
103107

104108
}
105109

110+
// Insert instructions to initialize the global base register in the
111+
// first MBB of the function. When the ABI is O32 and the relocation model is
112+
// PIC, the necessary instructions are emitted later to prevent optimization
113+
// passes from moving them.
114+
void MipsDAGToDAGISel::InitGlobalBaseReg(MachineFunction &MF) {
115+
MipsFunctionInfo *MipsFI = MF.getInfo<MipsFunctionInfo>();
116+
117+
if (!MipsFI->globalBaseRegSet())
118+
return;
119+
120+
MachineBasicBlock &MBB = MF.front();
121+
MachineBasicBlock::iterator I = MBB.begin();
122+
MachineRegisterInfo &RegInfo = MF.getRegInfo();
123+
const TargetInstrInfo &TII = *MF.getTarget().getInstrInfo();
124+
DebugLoc DL = I != MBB.end() ? I->getDebugLoc() : DebugLoc();
125+
unsigned V0, V1, GlobalBaseReg = MipsFI->getGlobalBaseReg();
126+
bool FixGlobalBaseReg = MipsFI->globalBaseRegFixed();
127+
128+
if (FixGlobalBaseReg) // $gp is the global base register.
129+
V0 = V1 = GlobalBaseReg;
130+
else {
131+
const TargetRegisterClass *RC;
132+
RC = Subtarget.isABI_N64() ?
133+
Mips::CPU64RegsRegisterClass : Mips::CPURegsRegisterClass;
134+
135+
V0 = RegInfo.createVirtualRegister(RC);
136+
V1 = RegInfo.createVirtualRegister(RC);
137+
}
138+
139+
if (Subtarget.isABI_N64()) {
140+
MF.getRegInfo().addLiveIn(Mips::T9_64);
141+
142+
// lui $v0, %hi(%neg(%gp_rel(fname)))
143+
// daddu $v1, $v0, $t9
144+
// daddiu $globalbasereg, $v1, %lo(%neg(%gp_rel(fname)))
145+
const GlobalValue *FName = MF.getFunction();
146+
BuildMI(MBB, I, DL, TII.get(Mips::LUi64), V0)
147+
.addGlobalAddress(FName, 0, MipsII::MO_GPOFF_HI);
148+
BuildMI(MBB, I, DL, TII.get(Mips::DADDu), V1).addReg(V0).addReg(Mips::T9_64);
149+
BuildMI(MBB, I, DL, TII.get(Mips::DADDiu), GlobalBaseReg).addReg(V1)
150+
.addGlobalAddress(FName, 0, MipsII::MO_GPOFF_LO);
151+
} else if (MF.getTarget().getRelocationModel() == Reloc::Static) {
152+
// Set global register to __gnu_local_gp.
153+
//
154+
// lui $v0, %hi(__gnu_local_gp)
155+
// addiu $globalbasereg, $v0, %lo(__gnu_local_gp)
156+
BuildMI(MBB, I, DL, TII.get(Mips::LUi), V0)
157+
.addExternalSymbol("__gnu_local_gp", MipsII::MO_ABS_HI);
158+
BuildMI(MBB, I, DL, TII.get(Mips::ADDiu), GlobalBaseReg).addReg(V0)
159+
.addExternalSymbol("__gnu_local_gp", MipsII::MO_ABS_LO);
160+
} else {
161+
MF.getRegInfo().addLiveIn(Mips::T9);
162+
163+
if (Subtarget.isABI_N32()) {
164+
// lui $v0, %hi(%neg(%gp_rel(fname)))
165+
// addu $v1, $v0, $t9
166+
// addiu $globalbasereg, $v1, %lo(%neg(%gp_rel(fname)))
167+
const GlobalValue *FName = MF.getFunction();
168+
BuildMI(MBB, I, DL, TII.get(Mips::LUi), V0)
169+
.addGlobalAddress(FName, 0, MipsII::MO_GPOFF_HI);
170+
BuildMI(MBB, I, DL, TII.get(Mips::ADDu), V1).addReg(V0).addReg(Mips::T9);
171+
BuildMI(MBB, I, DL, TII.get(Mips::ADDiu), GlobalBaseReg).addReg(V1)
172+
.addGlobalAddress(FName, 0, MipsII::MO_GPOFF_LO);
173+
} else if (!MipsFI->globalBaseRegFixed()) {
174+
assert(Subtarget.isABI_O32());
175+
176+
BuildMI(MBB, I, DL, TII.get(Mips::SETGP2), GlobalBaseReg)
177+
.addReg(Mips::T9);
178+
}
179+
}
180+
}
181+
182+
bool MipsDAGToDAGISel::runOnMachineFunction(MachineFunction &MF) {
183+
bool Ret = SelectionDAGISel::runOnMachineFunction(MF);
184+
185+
InitGlobalBaseReg(MF);
186+
187+
return Ret;
188+
}
106189

107190
/// getGlobalBaseReg - Output the instructions required to put the
108191
/// GOT address into a register.
109192
SDNode *MipsDAGToDAGISel::getGlobalBaseReg() {
110-
unsigned GlobalBaseReg = getInstrInfo()->getGlobalBaseReg(MF);
193+
unsigned GlobalBaseReg = MF->getInfo<MipsFunctionInfo>()->getGlobalBaseReg();
111194
return CurDAG->getRegister(GlobalBaseReg, TLI.getPointerTy()).getNode();
112195
}
113196

@@ -116,7 +199,6 @@ SDNode *MipsDAGToDAGISel::getGlobalBaseReg() {
116199
bool MipsDAGToDAGISel::
117200
SelectAddr(SDValue Addr, SDValue &Base, SDValue &Offset) {
118201
EVT ValTy = Addr.getValueType();
119-
unsigned GPReg = ValTy == MVT::i32 ? Mips::GP : Mips::GP_64;
120202

121203
// if Address is FI, get the TargetFrameIndex.
122204
if (FrameIndexSDNode *FIN = dyn_cast<FrameIndexSDNode>(Addr)) {
@@ -127,8 +209,8 @@ SelectAddr(SDValue Addr, SDValue &Base, SDValue &Offset) {
127209

128210
// on PIC code Load GA
129211
if (Addr.getOpcode() == MipsISD::Wrapper) {
130-
Base = CurDAG->getRegister(GPReg, ValTy);
131-
Offset = Addr.getOperand(0);
212+
Base = Addr.getOperand(0);
213+
Offset = Addr.getOperand(1);
132214
return true;
133215
}
134216

‎llvm/lib/Target/Mips/MipsISelLowering.cpp

+18-8
Original file line numberDiff line numberDiff line change
@@ -48,6 +48,11 @@ static bool IsShiftedMask(uint64_t I, uint64_t &Pos, uint64_t &Size) {
4848
return true;
4949
}
5050

51+
static SDValue GetGlobalReg(SelectionDAG &DAG, EVT Ty) {
52+
MipsFunctionInfo *FI = DAG.getMachineFunction().getInfo<MipsFunctionInfo>();
53+
return DAG.getRegister(FI->getGlobalBaseReg(), Ty);
54+
}
55+
5156
const char *MipsTargetLowering::getTargetNodeName(unsigned Opcode) const {
5257
switch (Opcode) {
5358
case MipsISD::JmpLink: return "MipsISD::JmpLink";
@@ -1496,7 +1501,7 @@ SDValue MipsTargetLowering::LowerGlobalAddress(SDValue Op,
14961501
(HasGotOfst ? MipsII::MO_GOT_PAGE : MipsII::MO_GOT_DISP) :
14971502
(HasGotOfst ? MipsII::MO_GOT : MipsII::MO_GOT16);
14981503
SDValue GA = DAG.getTargetGlobalAddress(GV, dl, ValTy, 0, GotFlag);
1499-
GA = DAG.getNode(MipsISD::Wrapper, dl, ValTy, GA);
1504+
GA = DAG.getNode(MipsISD::Wrapper, dl, ValTy, GetGlobalReg(DAG, ValTy), GA);
15001505
SDValue ResNode = DAG.getLoad(ValTy, dl, DAG.getEntryNode(), GA,
15011506
MachinePointerInfo(), false, false, false, 0);
15021507
// On functions and global targets not internal linked only
@@ -1529,7 +1534,8 @@ SDValue MipsTargetLowering::LowerBlockAddress(SDValue Op,
15291534
unsigned GOTFlag = IsN64 ? MipsII::MO_GOT_PAGE : MipsII::MO_GOT;
15301535
unsigned OFSTFlag = IsN64 ? MipsII::MO_GOT_OFST : MipsII::MO_ABS_LO;
15311536
SDValue BAGOTOffset = DAG.getBlockAddress(BA, ValTy, true, GOTFlag);
1532-
BAGOTOffset = DAG.getNode(MipsISD::Wrapper, dl, ValTy, BAGOTOffset);
1537+
BAGOTOffset = DAG.getNode(MipsISD::Wrapper, dl, ValTy,
1538+
GetGlobalReg(DAG, ValTy), BAGOTOffset);
15331539
SDValue BALOOffset = DAG.getBlockAddress(BA, ValTy, true, OFSTFlag);
15341540
SDValue Load = DAG.getLoad(ValTy, dl, DAG.getEntryNode(), BAGOTOffset,
15351541
MachinePointerInfo(), false, false, false, 0);
@@ -1554,7 +1560,8 @@ LowerGlobalTLSAddress(SDValue Op, SelectionDAG &DAG) const
15541560
bool LocalDynamic = GV->hasInternalLinkage();
15551561
unsigned Flag = LocalDynamic ? MipsII::MO_TLSLDM :MipsII::MO_TLSGD;
15561562
SDValue TGA = DAG.getTargetGlobalAddress(GV, dl, PtrVT, 0, Flag);
1557-
SDValue Argument = DAG.getNode(MipsISD::Wrapper, dl, PtrVT, TGA);
1563+
SDValue Argument = DAG.getNode(MipsISD::Wrapper, dl, PtrVT,
1564+
GetGlobalReg(DAG, PtrVT), TGA);
15581565
unsigned PtrSize = PtrVT.getSizeInBits();
15591566
IntegerType *PtrTy = Type::getIntNTy(*DAG.getContext(), PtrSize);
15601567

@@ -1591,7 +1598,8 @@ LowerGlobalTLSAddress(SDValue Op, SelectionDAG &DAG) const
15911598
// Initial Exec TLS Model
15921599
SDValue TGA = DAG.getTargetGlobalAddress(GV, dl, PtrVT, 0,
15931600
MipsII::MO_GOTTPREL);
1594-
TGA = DAG.getNode(MipsISD::Wrapper, dl, PtrVT, TGA);
1601+
TGA = DAG.getNode(MipsISD::Wrapper, dl, PtrVT, GetGlobalReg(DAG, PtrVT),
1602+
TGA);
15951603
Offset = DAG.getLoad(PtrVT, dl,
15961604
DAG.getEntryNode(), TGA, MachinePointerInfo(),
15971605
false, false, false, 0);
@@ -1628,7 +1636,8 @@ LowerJumpTable(SDValue Op, SelectionDAG &DAG) const
16281636
unsigned GOTFlag = IsN64 ? MipsII::MO_GOT_PAGE : MipsII::MO_GOT;
16291637
unsigned OfstFlag = IsN64 ? MipsII::MO_GOT_OFST : MipsII::MO_ABS_LO;
16301638
JTI = DAG.getTargetJumpTable(JT->getIndex(), PtrVT, GOTFlag);
1631-
JTI = DAG.getNode(MipsISD::Wrapper, dl, PtrVT, JTI);
1639+
JTI = DAG.getNode(MipsISD::Wrapper, dl, PtrVT, GetGlobalReg(DAG, PtrVT),
1640+
JTI);
16321641
HiPart = DAG.getLoad(PtrVT, dl, DAG.getEntryNode(), JTI,
16331642
MachinePointerInfo(), false, false, false, 0);
16341643
JTILo = DAG.getTargetJumpTable(JT->getIndex(), PtrVT, OfstFlag);
@@ -1671,7 +1680,7 @@ LowerConstantPool(SDValue Op, SelectionDAG &DAG) const
16711680
unsigned OFSTFlag = IsN64 ? MipsII::MO_GOT_OFST : MipsII::MO_ABS_LO;
16721681
SDValue CP = DAG.getTargetConstantPool(C, ValTy, N->getAlignment(),
16731682
N->getOffset(), GOTFlag);
1674-
CP = DAG.getNode(MipsISD::Wrapper, dl, ValTy, CP);
1683+
CP = DAG.getNode(MipsISD::Wrapper, dl, ValTy, GetGlobalReg(DAG, ValTy), CP);
16751684
SDValue Load = DAG.getLoad(ValTy, dl, DAG.getEntryNode(), CP,
16761685
MachinePointerInfo::getConstantPool(), false,
16771686
false, false, 0);
@@ -2210,7 +2219,7 @@ MipsTargetLowering::LowerCall(SDValue InChain, SDValue Callee,
22102219

22112220
// If this is the first call, create a stack frame object that points to
22122221
// a location to which .cprestore saves $gp.
2213-
if (IsO32 && IsPIC && !MipsFI->getGPFI())
2222+
if (IsO32 && IsPIC && MipsFI->globalBaseRegFixed() && !MipsFI->getGPFI())
22142223
MipsFI->setGPFI(MFI->CreateFixedObject(4, 0, true));
22152224

22162225
// Get the frame index of the stack frame object that points to the location
@@ -2384,7 +2393,8 @@ MipsTargetLowering::LowerCall(SDValue InChain, SDValue Callee,
23842393
if (IsPICCall) {
23852394
if (GlobalOrExternal) {
23862395
// Load callee address
2387-
Callee = DAG.getNode(MipsISD::Wrapper, dl, getPointerTy(), Callee);
2396+
Callee = DAG.getNode(MipsISD::Wrapper, dl, getPointerTy(),
2397+
GetGlobalReg(DAG, getPointerTy()), Callee);
23882398
SDValue LoadValue = DAG.getLoad(getPointerTy(), dl, DAG.getEntryNode(),
23892399
Callee, MachinePointerInfo::getGOT(),
23902400
false, false, false, 0);

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