Skip to content

Commit aa70876

Browse files
MaskRayMaskRay
committed
[MC] Add parameter Address to MCInstPrinter::printInst
printInst prints a branch/call instruction as `b offset` (there are many variants on various targets) instead of `b address`. It is a convention to use address instead of offset in most external symbolizers/disassemblers. This difference makes `llvm-objdump -d` output unsatisfactory. Add `uint64_t Address` to printInst(), so that it can pass the argument to printInstruction(). `raw_ostream &OS` is moved to the last to be consistent with other print* methods. The next step is to pass `Address` to printInstruction() (generated by tablegen from the instruction set description). We can gradually migrate targets to print addresses instead of offsets. In any case, downstream projects which don't know `Address` can pass 0 as the argument. Reviewed By: jhenderson Differential Revision: https://reviews.llvm.org/D72172
1 parent dc7b84c commit aa70876

Some content is hidden

Large Commits have some content hidden by default. Use the searchbox below for content that may be hidden.

54 files changed

+140
-118
lines changed

‎llvm/include/llvm/MC/MCInstPrinter.h

+2-2
Original file line numberDiff line numberDiff line change
@@ -79,8 +79,8 @@ class MCInstPrinter {
7979
void setCommentStream(raw_ostream &OS) { CommentStream = &OS; }
8080

8181
/// Print the specified MCInst to the specified raw_ostream.
82-
virtual void printInst(const MCInst *MI, raw_ostream &OS, StringRef Annot,
83-
const MCSubtargetInfo &STI) = 0;
82+
virtual void printInst(const MCInst *MI, uint64_t Address, StringRef Annot,
83+
const MCSubtargetInfo &STI, raw_ostream &OS) = 0;
8484

8585
/// Return the name of the specified opcode enum (e.g. "MOV32ri") or
8686
/// empty if we can't resolve it.

‎llvm/include/llvm/MC/MCStreamer.h

+3-2
Original file line numberDiff line numberDiff line change
@@ -103,8 +103,9 @@ class MCTargetStreamer {
103103
// Allow a target to add behavior to the emitAssignment of MCStreamer.
104104
virtual void emitAssignment(MCSymbol *Symbol, const MCExpr *Value);
105105

106-
virtual void prettyPrintAsm(MCInstPrinter &InstPrinter, raw_ostream &OS,
107-
const MCInst &Inst, const MCSubtargetInfo &STI);
106+
virtual void prettyPrintAsm(MCInstPrinter &InstPrinter, uint64_t Address,
107+
const MCInst &Inst, const MCSubtargetInfo &STI,
108+
raw_ostream &OS);
108109

109110
virtual void emitDwarfFileDirective(StringRef Directive);
110111

‎llvm/lib/MC/MCAsmStreamer.cpp

+2-2
Original file line numberDiff line numberDiff line change
@@ -1944,9 +1944,9 @@ void MCAsmStreamer::EmitInstruction(const MCInst &Inst,
19441944
}
19451945

19461946
if(getTargetStreamer())
1947-
getTargetStreamer()->prettyPrintAsm(*InstPrinter, OS, Inst, STI);
1947+
getTargetStreamer()->prettyPrintAsm(*InstPrinter, 0, Inst, STI, OS);
19481948
else
1949-
InstPrinter->printInst(&Inst, OS, "", STI);
1949+
InstPrinter->printInst(&Inst, 0, "", STI, OS);
19501950

19511951
StringRef Comments = CommentToEmit;
19521952
if (Comments.size() && Comments.back() != '\n')

‎llvm/lib/MC/MCDisassembler/Disassembler.cpp

+2-1
Original file line numberDiff line numberDiff line change
@@ -277,7 +277,8 @@ size_t LLVMDisasmInstruction(LLVMDisasmContextRef DCR, uint8_t *Bytes,
277277
SmallVector<char, 64> InsnStr;
278278
raw_svector_ostream OS(InsnStr);
279279
formatted_raw_ostream FormattedOS(OS);
280-
IP->printInst(&Inst, FormattedOS, AnnotationsStr, *DC->getSubtargetInfo());
280+
IP->printInst(&Inst, PC, AnnotationsStr, *DC->getSubtargetInfo(),
281+
FormattedOS);
281282

282283
if (DC->getOptions() & LLVMDisassembler_Option_PrintLatency)
283284
emitLatency(DC, Inst);

‎llvm/lib/MC/MCStreamer.cpp

+4-3
Original file line numberDiff line numberDiff line change
@@ -977,9 +977,10 @@ void MCStreamer::EmitAssignment(MCSymbol *Symbol, const MCExpr *Value) {
977977
}
978978

979979
void MCTargetStreamer::prettyPrintAsm(MCInstPrinter &InstPrinter,
980-
raw_ostream &OS, const MCInst &Inst,
981-
const MCSubtargetInfo &STI) {
982-
InstPrinter.printInst(&Inst, OS, "", STI);
980+
uint64_t Address, const MCInst &Inst,
981+
const MCSubtargetInfo &STI,
982+
raw_ostream &OS) {
983+
InstPrinter.printInst(&Inst, Address, "", STI, OS);
983984
}
984985

985986
void MCStreamer::visitUsedSymbol(const MCSymbol &Sym) {

‎llvm/lib/Target/AArch64/MCTargetDesc/AArch64InstPrinter.cpp

+7-6
Original file line numberDiff line numberDiff line change
@@ -56,9 +56,9 @@ void AArch64InstPrinter::printRegName(raw_ostream &OS, unsigned RegNo) const {
5656
OS << getRegisterName(RegNo);
5757
}
5858

59-
void AArch64InstPrinter::printInst(const MCInst *MI, raw_ostream &O,
60-
StringRef Annot,
61-
const MCSubtargetInfo &STI) {
59+
void AArch64InstPrinter::printInst(const MCInst *MI, uint64_t Address,
60+
StringRef Annot, const MCSubtargetInfo &STI,
61+
raw_ostream &O) {
6262
// Check for special encodings and print the canonical alias instead.
6363

6464
unsigned Opcode = MI->getOpcode();
@@ -704,9 +704,10 @@ static const LdStNInstrDesc *getLdStNInstrDesc(unsigned Opcode) {
704704
return nullptr;
705705
}
706706

707-
void AArch64AppleInstPrinter::printInst(const MCInst *MI, raw_ostream &O,
707+
void AArch64AppleInstPrinter::printInst(const MCInst *MI, uint64_t Address,
708708
StringRef Annot,
709-
const MCSubtargetInfo &STI) {
709+
const MCSubtargetInfo &STI,
710+
raw_ostream &O) {
710711
unsigned Opcode = MI->getOpcode();
711712
StringRef Layout;
712713

@@ -754,7 +755,7 @@ void AArch64AppleInstPrinter::printInst(const MCInst *MI, raw_ostream &O,
754755
return;
755756
}
756757

757-
AArch64InstPrinter::printInst(MI, O, Annot, STI);
758+
AArch64InstPrinter::printInst(MI, Address, Annot, STI, O);
758759
}
759760

760761
bool AArch64InstPrinter::printSysAlias(const MCInst *MI,

‎llvm/lib/Target/AArch64/MCTargetDesc/AArch64InstPrinter.h

+4-4
Original file line numberDiff line numberDiff line change
@@ -25,8 +25,8 @@ class AArch64InstPrinter : public MCInstPrinter {
2525
AArch64InstPrinter(const MCAsmInfo &MAI, const MCInstrInfo &MII,
2626
const MCRegisterInfo &MRI);
2727

28-
void printInst(const MCInst *MI, raw_ostream &O, StringRef Annot,
29-
const MCSubtargetInfo &STI) override;
28+
void printInst(const MCInst *MI, uint64_t Address, StringRef Annot,
29+
const MCSubtargetInfo &STI, raw_ostream &O) override;
3030
void printRegName(raw_ostream &OS, unsigned RegNo) const override;
3131

3232
// Autogenerated by tblgen.
@@ -197,8 +197,8 @@ class AArch64AppleInstPrinter : public AArch64InstPrinter {
197197
AArch64AppleInstPrinter(const MCAsmInfo &MAI, const MCInstrInfo &MII,
198198
const MCRegisterInfo &MRI);
199199

200-
void printInst(const MCInst *MI, raw_ostream &O, StringRef Annot,
201-
const MCSubtargetInfo &STI) override;
200+
void printInst(const MCInst *MI, uint64_t Address, StringRef Annot,
201+
const MCSubtargetInfo &STI, raw_ostream &O) override;
202202

203203
void printInstruction(const MCInst *MI, const MCSubtargetInfo &STI,
204204
raw_ostream &O) override;

‎llvm/lib/Target/AMDGPU/AMDGPUMCInstLower.cpp

+1-1
Original file line numberDiff line numberDiff line change
@@ -344,7 +344,7 @@ void AMDGPUAsmPrinter::EmitInstruction(const MachineInstr *MI) {
344344

345345
AMDGPUInstPrinter InstPrinter(*TM.getMCAsmInfo(), *STI.getInstrInfo(),
346346
*STI.getRegisterInfo());
347-
InstPrinter.printInst(&TmpInst, DisasmStream, StringRef(), STI);
347+
InstPrinter.printInst(&TmpInst, 0, StringRef(), STI, DisasmStream);
348348

349349
// Disassemble instruction/operands to hex representation.
350350
SmallVector<MCFixup, 4> Fixups;

‎llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp

+6-4
Original file line numberDiff line numberDiff line change
@@ -26,8 +26,9 @@
2626
using namespace llvm;
2727
using namespace llvm::AMDGPU;
2828

29-
void AMDGPUInstPrinter::printInst(const MCInst *MI, raw_ostream &OS,
30-
StringRef Annot, const MCSubtargetInfo &STI) {
29+
void AMDGPUInstPrinter::printInst(const MCInst *MI, uint64_t Address,
30+
StringRef Annot, const MCSubtargetInfo &STI,
31+
raw_ostream &OS) {
3132
OS.flush();
3233
printInstruction(MI, STI, OS);
3334
printAnnotation(OS, Annot);
@@ -1342,8 +1343,9 @@ void AMDGPUInstPrinter::printEndpgm(const MCInst *MI, unsigned OpNo,
13421343

13431344
#include "AMDGPUGenAsmWriter.inc"
13441345

1345-
void R600InstPrinter::printInst(const MCInst *MI, raw_ostream &O,
1346-
StringRef Annot, const MCSubtargetInfo &STI) {
1346+
void R600InstPrinter::printInst(const MCInst *MI, uint64_t Address,
1347+
StringRef Annot, const MCSubtargetInfo &STI,
1348+
raw_ostream &O) {
13471349
O.flush();
13481350
printInstruction(MI, O);
13491351
printAnnotation(O, Annot);

‎llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.h

+4-4
Original file line numberDiff line numberDiff line change
@@ -27,8 +27,8 @@ class AMDGPUInstPrinter : public MCInstPrinter {
2727
raw_ostream &O);
2828
static const char *getRegisterName(unsigned RegNo);
2929

30-
void printInst(const MCInst *MI, raw_ostream &O, StringRef Annot,
31-
const MCSubtargetInfo &STI) override;
30+
void printInst(const MCInst *MI, uint64_t Address, StringRef Annot,
31+
const MCSubtargetInfo &STI, raw_ostream &O) override;
3232
static void printRegOperand(unsigned RegNo, raw_ostream &O,
3333
const MCRegisterInfo &MRI);
3434

@@ -240,8 +240,8 @@ class R600InstPrinter : public MCInstPrinter {
240240
const MCRegisterInfo &MRI)
241241
: MCInstPrinter(MAI, MII, MRI) {}
242242

243-
void printInst(const MCInst *MI, raw_ostream &O, StringRef Annot,
244-
const MCSubtargetInfo &STI) override;
243+
void printInst(const MCInst *MI, uint64_t Address, StringRef Annot,
244+
const MCSubtargetInfo &STI, raw_ostream &O) override;
245245
void printInstruction(const MCInst *MI, raw_ostream &O);
246246
static const char *getRegisterName(unsigned RegNo);
247247

‎llvm/lib/Target/ARC/MCTargetDesc/ARCInstPrinter.cpp

+3-2
Original file line numberDiff line numberDiff line change
@@ -97,8 +97,9 @@ void ARCInstPrinter::printRegName(raw_ostream &OS, unsigned RegNo) const {
9797
OS << StringRef(getRegisterName(RegNo)).lower();
9898
}
9999

100-
void ARCInstPrinter::printInst(const MCInst *MI, raw_ostream &O,
101-
StringRef Annot, const MCSubtargetInfo &STI) {
100+
void ARCInstPrinter::printInst(const MCInst *MI, uint64_t Address,
101+
StringRef Annot, const MCSubtargetInfo &STI,
102+
raw_ostream &O) {
102103
printInstruction(MI, O);
103104
printAnnotation(O, Annot);
104105
}

‎llvm/lib/Target/ARC/MCTargetDesc/ARCInstPrinter.h

+2-2
Original file line numberDiff line numberDiff line change
@@ -30,8 +30,8 @@ class ARCInstPrinter : public MCInstPrinter {
3030
static const char *getRegisterName(unsigned RegNo);
3131

3232
void printRegName(raw_ostream &OS, unsigned RegNo) const override;
33-
void printInst(const MCInst *MI, raw_ostream &O, StringRef Annot,
34-
const MCSubtargetInfo &STI) override;
33+
void printInst(const MCInst *MI, uint64_t Address, StringRef Annot,
34+
const MCSubtargetInfo &STI, raw_ostream &O) override;
3535

3636
private:
3737
void printMemOperandRI(const MCInst *MI, unsigned OpNum, raw_ostream &O);

‎llvm/lib/Target/ARM/MCTargetDesc/ARMInstPrinter.cpp

+3-2
Original file line numberDiff line numberDiff line change
@@ -88,8 +88,9 @@ void ARMInstPrinter::printRegName(raw_ostream &OS, unsigned RegNo) const {
8888
OS << markup("<reg:") << getRegisterName(RegNo, DefaultAltIdx) << markup(">");
8989
}
9090

91-
void ARMInstPrinter::printInst(const MCInst *MI, raw_ostream &O,
92-
StringRef Annot, const MCSubtargetInfo &STI) {
91+
void ARMInstPrinter::printInst(const MCInst *MI, uint64_t Address,
92+
StringRef Annot, const MCSubtargetInfo &STI,
93+
raw_ostream &O) {
9394
unsigned Opcode = MI->getOpcode();
9495

9596
switch (Opcode) {

‎llvm/lib/Target/ARM/MCTargetDesc/ARMInstPrinter.h

+2-2
Original file line numberDiff line numberDiff line change
@@ -25,8 +25,8 @@ class ARMInstPrinter : public MCInstPrinter {
2525

2626
bool applyTargetSpecificCLOption(StringRef Opt) override;
2727

28-
void printInst(const MCInst *MI, raw_ostream &O, StringRef Annot,
29-
const MCSubtargetInfo &STI) override;
28+
void printInst(const MCInst *MI, uint64_t Address, StringRef Annot,
29+
const MCSubtargetInfo &STI, raw_ostream &O) override;
3030
void printRegName(raw_ostream &OS, unsigned RegNo) const override;
3131

3232
// Autogenerated by tblgen.

‎llvm/lib/Target/AVR/MCTargetDesc/AVRInstPrinter.cpp

+3-2
Original file line numberDiff line numberDiff line change
@@ -32,8 +32,9 @@ namespace llvm {
3232
#define PRINT_ALIAS_INSTR
3333
#include "AVRGenAsmWriter.inc"
3434

35-
void AVRInstPrinter::printInst(const MCInst *MI, raw_ostream &O,
36-
StringRef Annot, const MCSubtargetInfo &STI) {
35+
void AVRInstPrinter::printInst(const MCInst *MI, uint64_t Address,
36+
StringRef Annot, const MCSubtargetInfo &STI,
37+
raw_ostream &O) {
3738
unsigned Opcode = MI->getOpcode();
3839

3940
// First handle load and store instructions with postinc or predec

‎llvm/lib/Target/AVR/MCTargetDesc/AVRInstPrinter.h

+2-2
Original file line numberDiff line numberDiff line change
@@ -29,8 +29,8 @@ class AVRInstPrinter : public MCInstPrinter {
2929
static const char *getPrettyRegisterName(unsigned RegNo,
3030
MCRegisterInfo const &MRI);
3131

32-
void printInst(const MCInst *MI, raw_ostream &O, StringRef Annot,
33-
const MCSubtargetInfo &STI) override;
32+
void printInst(const MCInst *MI, uint64_t Address, StringRef Annot,
33+
const MCSubtargetInfo &STI, raw_ostream &O) override;
3434

3535
private:
3636
static const char *getRegisterName(unsigned RegNo,

‎llvm/lib/Target/BPF/MCTargetDesc/BPFInstPrinter.cpp

+3-2
Original file line numberDiff line numberDiff line change
@@ -24,8 +24,9 @@ using namespace llvm;
2424
// Include the auto-generated portion of the assembly writer.
2525
#include "BPFGenAsmWriter.inc"
2626

27-
void BPFInstPrinter::printInst(const MCInst *MI, raw_ostream &O,
28-
StringRef Annot, const MCSubtargetInfo &STI) {
27+
void BPFInstPrinter::printInst(const MCInst *MI, uint64_t Address,
28+
StringRef Annot, const MCSubtargetInfo &STI,
29+
raw_ostream &O) {
2930
printInstruction(MI, O);
3031
printAnnotation(O, Annot);
3132
}

‎llvm/lib/Target/BPF/MCTargetDesc/BPFInstPrinter.h

+2-2
Original file line numberDiff line numberDiff line change
@@ -22,8 +22,8 @@ class BPFInstPrinter : public MCInstPrinter {
2222
const MCRegisterInfo &MRI)
2323
: MCInstPrinter(MAI, MII, MRI) {}
2424

25-
void printInst(const MCInst *MI, raw_ostream &O, StringRef Annot,
26-
const MCSubtargetInfo &STI) override;
25+
void printInst(const MCInst *MI, uint64_t Address, StringRef Annot,
26+
const MCSubtargetInfo &STI, raw_ostream &O) override;
2727
void printOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O,
2828
const char *Modifier = nullptr);
2929
void printMemOperand(const MCInst *MI, int OpNo, raw_ostream &O,

‎llvm/lib/Target/Hexagon/MCTargetDesc/HexagonInstPrinter.cpp

+3-2
Original file line numberDiff line numberDiff line change
@@ -30,8 +30,9 @@ void HexagonInstPrinter::printRegName(raw_ostream &O, unsigned RegNo) const {
3030
O << getRegisterName(RegNo);
3131
}
3232

33-
void HexagonInstPrinter::printInst(const MCInst *MI, raw_ostream &OS,
34-
StringRef Annot, const MCSubtargetInfo &STI) {
33+
void HexagonInstPrinter::printInst(const MCInst *MI, uint64_t Address,
34+
StringRef Annot, const MCSubtargetInfo &STI,
35+
raw_ostream &OS) {
3536
assert(HexagonMCInstrInfo::isBundle(*MI));
3637
assert(HexagonMCInstrInfo::bundleSize(*MI) <= HEXAGON_PACKET_SIZE);
3738
assert(HexagonMCInstrInfo::bundleSize(*MI) > 0);

‎llvm/lib/Target/Hexagon/MCTargetDesc/HexagonInstPrinter.h

+2-2
Original file line numberDiff line numberDiff line change
@@ -28,8 +28,8 @@ class HexagonInstPrinter : public MCInstPrinter {
2828
MCRegisterInfo const &MRI)
2929
: MCInstPrinter(MAI, MII, MRI), MII(MII) {}
3030

31-
void printInst(MCInst const *MI, raw_ostream &O, StringRef Annot,
32-
const MCSubtargetInfo &STI) override;
31+
void printInst(MCInst const *MI, uint64_t Address, StringRef Annot,
32+
const MCSubtargetInfo &STI, raw_ostream &O) override;
3333
void printRegName(raw_ostream &O, unsigned RegNo) const override;
3434

3535
static char const *getRegisterName(unsigned RegNo);

‎llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCTargetDesc.cpp

+4-3
Original file line numberDiff line numberDiff line change
@@ -137,14 +137,15 @@ class HexagonTargetAsmStreamer : public HexagonTargetStreamer {
137137
MCInstPrinter &IP)
138138
: HexagonTargetStreamer(S) {}
139139

140-
void prettyPrintAsm(MCInstPrinter &InstPrinter, raw_ostream &OS,
141-
const MCInst &Inst, const MCSubtargetInfo &STI) override {
140+
void prettyPrintAsm(MCInstPrinter &InstPrinter, uint64_t Address,
141+
const MCInst &Inst, const MCSubtargetInfo &STI,
142+
raw_ostream &OS) override {
142143
assert(HexagonMCInstrInfo::isBundle(Inst));
143144
assert(HexagonMCInstrInfo::bundleSize(Inst) <= HEXAGON_PACKET_SIZE);
144145
std::string Buffer;
145146
{
146147
raw_string_ostream TempStream(Buffer);
147-
InstPrinter.printInst(&Inst, TempStream, "", STI);
148+
InstPrinter.printInst(&Inst, Address, "", STI, TempStream);
148149
}
149150
StringRef Contents(Buffer);
150151
auto PacketBundle = Contents.rsplit('\n');

‎llvm/lib/Target/Lanai/MCTargetDesc/LanaiInstPrinter.cpp

+3-2
Original file line numberDiff line numberDiff line change
@@ -137,9 +137,10 @@ bool LanaiInstPrinter::printAlias(const MCInst *MI, raw_ostream &OS) {
137137
}
138138
}
139139

140-
void LanaiInstPrinter::printInst(const MCInst *MI, raw_ostream &OS,
140+
void LanaiInstPrinter::printInst(const MCInst *MI, uint64_t Address,
141141
StringRef Annotation,
142-
const MCSubtargetInfo & /*STI*/) {
142+
const MCSubtargetInfo & /*STI*/,
143+
raw_ostream &OS) {
143144
if (!printAlias(MI, OS) && !printAliasInstr(MI, OS))
144145
printInstruction(MI, OS);
145146
printAnnotation(OS, Annotation);

‎llvm/lib/Target/Lanai/MCTargetDesc/LanaiInstPrinter.h

+2-2
Original file line numberDiff line numberDiff line change
@@ -24,8 +24,8 @@ class LanaiInstPrinter : public MCInstPrinter {
2424
const MCRegisterInfo &MRI)
2525
: MCInstPrinter(MAI, MII, MRI) {}
2626

27-
void printInst(const MCInst *MI, raw_ostream &O, StringRef Annot,
28-
const MCSubtargetInfo &STI) override;
27+
void printInst(const MCInst *MI, uint64_t Address, StringRef Annot,
28+
const MCSubtargetInfo &STI, raw_ostream &O) override;
2929
void printOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O,
3030
const char *Modifier = nullptr);
3131
void printPredicateOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O);

‎llvm/lib/Target/MSP430/MCTargetDesc/MSP430InstPrinter.cpp

+3-2
Original file line numberDiff line numberDiff line change
@@ -26,8 +26,9 @@ using namespace llvm;
2626
#define PRINT_ALIAS_INSTR
2727
#include "MSP430GenAsmWriter.inc"
2828

29-
void MSP430InstPrinter::printInst(const MCInst *MI, raw_ostream &O,
30-
StringRef Annot, const MCSubtargetInfo &STI) {
29+
void MSP430InstPrinter::printInst(const MCInst *MI, uint64_t Address,
30+
StringRef Annot, const MCSubtargetInfo &STI,
31+
raw_ostream &O) {
3132
if (!printAliasInstr(MI, O))
3233
printInstruction(MI, O);
3334
printAnnotation(O, Annot);

‎llvm/lib/Target/MSP430/MCTargetDesc/MSP430InstPrinter.h

+2-2
Original file line numberDiff line numberDiff line change
@@ -22,8 +22,8 @@ namespace llvm {
2222
const MCRegisterInfo &MRI)
2323
: MCInstPrinter(MAI, MII, MRI) {}
2424

25-
void printInst(const MCInst *MI, raw_ostream &O, StringRef Annot,
26-
const MCSubtargetInfo &STI) override;
25+
void printInst(const MCInst *MI, uint64_t Address, StringRef Annot,
26+
const MCSubtargetInfo &STI, raw_ostream &O) override;
2727

2828
// Autogenerated by tblgen.
2929
void printInstruction(const MCInst *MI, raw_ostream &O);

‎llvm/lib/Target/Mips/MCTargetDesc/MipsInstPrinter.cpp

+3-2
Original file line numberDiff line numberDiff line change
@@ -75,8 +75,9 @@ void MipsInstPrinter::printRegName(raw_ostream &OS, unsigned RegNo) const {
7575
OS << '$' << StringRef(getRegisterName(RegNo)).lower();
7676
}
7777

78-
void MipsInstPrinter::printInst(const MCInst *MI, raw_ostream &O,
79-
StringRef Annot, const MCSubtargetInfo &STI) {
78+
void MipsInstPrinter::printInst(const MCInst *MI, uint64_t Address,
79+
StringRef Annot, const MCSubtargetInfo &STI,
80+
raw_ostream &O) {
8081
switch (MI->getOpcode()) {
8182
default:
8283
break;

‎llvm/lib/Target/Mips/MCTargetDesc/MipsInstPrinter.h

+2-2
Original file line numberDiff line numberDiff line change
@@ -83,8 +83,8 @@ class MipsInstPrinter : public MCInstPrinter {
8383
static const char *getRegisterName(unsigned RegNo);
8484

8585
void printRegName(raw_ostream &OS, unsigned RegNo) const override;
86-
void printInst(const MCInst *MI, raw_ostream &O, StringRef Annot,
87-
const MCSubtargetInfo &STI) override;
86+
void printInst(const MCInst *MI, uint64_t Address, StringRef Annot,
87+
const MCSubtargetInfo &STI, raw_ostream &O) override;
8888

8989
bool printAliasInstr(const MCInst *MI, raw_ostream &OS);
9090
void printCustomAliasOperand(const MCInst *MI, unsigned OpIdx,

‎llvm/lib/Target/NVPTX/MCTargetDesc/NVPTXInstPrinter.cpp

+3-2
Original file line numberDiff line numberDiff line change
@@ -72,8 +72,9 @@ void NVPTXInstPrinter::printRegName(raw_ostream &OS, unsigned RegNo) const {
7272
OS << VReg;
7373
}
7474

75-
void NVPTXInstPrinter::printInst(const MCInst *MI, raw_ostream &OS,
76-
StringRef Annot, const MCSubtargetInfo &STI) {
75+
void NVPTXInstPrinter::printInst(const MCInst *MI, uint64_t Address,
76+
StringRef Annot, const MCSubtargetInfo &STI,
77+
raw_ostream &OS) {
7778
printInstruction(MI, OS);
7879

7980
// Next always print the annotation.

‎llvm/lib/Target/NVPTX/MCTargetDesc/NVPTXInstPrinter.h

+2-2
Original file line numberDiff line numberDiff line change
@@ -25,8 +25,8 @@ class NVPTXInstPrinter : public MCInstPrinter {
2525
const MCRegisterInfo &MRI);
2626

2727
void printRegName(raw_ostream &OS, unsigned RegNo) const override;
28-
void printInst(const MCInst *MI, raw_ostream &OS, StringRef Annot,
29-
const MCSubtargetInfo &STI) override;
28+
void printInst(const MCInst *MI, uint64_t Address, StringRef Annot,
29+
const MCSubtargetInfo &STI, raw_ostream &OS) override;
3030

3131
// Autogenerated by tblgen.
3232
void printInstruction(const MCInst *MI, raw_ostream &O);

0 commit comments

Comments
 (0)