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[SDAG] enable binop identity constant folds for fmul/fdiv
The test diffs are identical to D119111. This only affects x86 currently because no other target has an override for the TLI hook that controls this transform.
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2 files changed

+17
-25
lines changed

2 files changed

+17
-25
lines changed

‎llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp

+3
Original file line numberDiff line numberDiff line change
@@ -2134,6 +2134,9 @@ static SDValue foldSelectWithIdentityConstant(SDNode *N, SelectionDAG &DAG,
21342134
return C->isZero() && C->isNegative();
21352135
case ISD::FSUB: // X - 0.0 --> X
21362136
return C->isZero() && !C->isNegative();
2137+
case ISD::FMUL: // X * 1.0 --> X
2138+
case ISD::FDIV: // X / 1.0 --> X
2139+
return C->isExactlyValue(1.0);
21372140
}
21382141
}
21392142
return false;

‎llvm/test/CodeGen/X86/vector-bo-select.ll

+14-25
Original file line numberDiff line numberDiff line change
@@ -279,9 +279,8 @@ define <4 x float> @fmul_v4f32(<4 x i1> %b, <4 x float> noundef %x, <4 x float>
279279
; AVX512VL: # %bb.0:
280280
; AVX512VL-NEXT: vpslld $31, %xmm0, %xmm0
281281
; AVX512VL-NEXT: vptestmd %xmm0, %xmm0, %k1
282-
; AVX512VL-NEXT: vbroadcastss {{.*#+}} xmm0 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0]
283-
; AVX512VL-NEXT: vmovaps %xmm2, %xmm0 {%k1}
284-
; AVX512VL-NEXT: vmulps %xmm0, %xmm1, %xmm0
282+
; AVX512VL-NEXT: vmulps %xmm2, %xmm1, %xmm1 {%k1}
283+
; AVX512VL-NEXT: vmovaps %xmm1, %xmm0
285284
; AVX512VL-NEXT: retq
286285
%s = select <4 x i1> %b, <4 x float> %y, <4 x float> <float 1.0, float 1.0, float 1.0, float 1.0>
287286
%r = fmul <4 x float> %x, %s
@@ -314,9 +313,8 @@ define <8 x float> @fmul_v8f32_commute(<8 x i1> %b, <8 x float> noundef %x, <8 x
314313
; AVX512VL-NEXT: vpmovsxwd %xmm0, %ymm0
315314
; AVX512VL-NEXT: vpslld $31, %ymm0, %ymm0
316315
; AVX512VL-NEXT: vptestmd %ymm0, %ymm0, %k1
317-
; AVX512VL-NEXT: vbroadcastss {{.*#+}} ymm0 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0]
318-
; AVX512VL-NEXT: vmovaps %ymm2, %ymm0 {%k1}
319-
; AVX512VL-NEXT: vmulps %ymm1, %ymm0, %ymm0
316+
; AVX512VL-NEXT: vmulps %ymm2, %ymm1, %ymm1 {%k1}
317+
; AVX512VL-NEXT: vmovaps %ymm1, %ymm0
320318
; AVX512VL-NEXT: retq
321319
%s = select <8 x i1> %b, <8 x float> %y, <8 x float> <float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0>
322320
%r = fmul <8 x float> %s, %x
@@ -344,8 +342,8 @@ define <16 x float> @fmul_v16f32_swap(<16 x i1> %b, <16 x float> noundef %x, <16
344342
; AVX512-NEXT: vpmovsxbd %xmm0, %zmm0
345343
; AVX512-NEXT: vpslld $31, %zmm0, %zmm0
346344
; AVX512-NEXT: vptestmd %zmm0, %zmm0, %k1
347-
; AVX512-NEXT: vbroadcastss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %zmm2 {%k1}
348345
; AVX512-NEXT: vmulps %zmm2, %zmm1, %zmm0
346+
; AVX512-NEXT: vmovaps %zmm1, %zmm0 {%k1}
349347
; AVX512-NEXT: retq
350348
%s = select <16 x i1> %b, <16 x float> <float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0>, <16 x float> %y
351349
%r = fmul <16 x float> %x, %s
@@ -373,8 +371,8 @@ define <16 x float> @fmul_v16f32_commute_swap(<16 x i1> %b, <16 x float> noundef
373371
; AVX512-NEXT: vpmovsxbd %xmm0, %zmm0
374372
; AVX512-NEXT: vpslld $31, %zmm0, %zmm0
375373
; AVX512-NEXT: vptestmd %zmm0, %zmm0, %k1
376-
; AVX512-NEXT: vbroadcastss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %zmm2 {%k1}
377-
; AVX512-NEXT: vmulps %zmm1, %zmm2, %zmm0
374+
; AVX512-NEXT: vmulps %zmm2, %zmm1, %zmm0
375+
; AVX512-NEXT: vmovaps %zmm1, %zmm0 {%k1}
378376
; AVX512-NEXT: retq
379377
%s = select <16 x i1> %b, <16 x float> <float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0>, <16 x float> %y
380378
%r = fmul <16 x float> %s, %x
@@ -405,9 +403,8 @@ define <4 x float> @fdiv_v4f32(<4 x i1> %b, <4 x float> noundef %x, <4 x float>
405403
; AVX512VL: # %bb.0:
406404
; AVX512VL-NEXT: vpslld $31, %xmm0, %xmm0
407405
; AVX512VL-NEXT: vptestmd %xmm0, %xmm0, %k1
408-
; AVX512VL-NEXT: vbroadcastss {{.*#+}} xmm0 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0]
409-
; AVX512VL-NEXT: vmovaps %xmm2, %xmm0 {%k1}
410-
; AVX512VL-NEXT: vdivps %xmm0, %xmm1, %xmm0
406+
; AVX512VL-NEXT: vdivps %xmm2, %xmm1, %xmm1 {%k1}
407+
; AVX512VL-NEXT: vmovaps %xmm1, %xmm0
411408
; AVX512VL-NEXT: retq
412409
%s = select <4 x i1> %b, <4 x float> %y, <4 x float> <float 1.0, float 1.0, float 1.0, float 1.0>
413410
%r = fdiv <4 x float> %x, %s
@@ -470,8 +467,8 @@ define <16 x float> @fdiv_v16f32_swap(<16 x i1> %b, <16 x float> noundef %x, <16
470467
; AVX512-NEXT: vpmovsxbd %xmm0, %zmm0
471468
; AVX512-NEXT: vpslld $31, %zmm0, %zmm0
472469
; AVX512-NEXT: vptestmd %zmm0, %zmm0, %k1
473-
; AVX512-NEXT: vbroadcastss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %zmm2 {%k1}
474470
; AVX512-NEXT: vdivps %zmm2, %zmm1, %zmm0
471+
; AVX512-NEXT: vmovaps %zmm1, %zmm0 {%k1}
475472
; AVX512-NEXT: retq
476473
%s = select <16 x i1> %b, <16 x float> <float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0>, <16 x float> %y
477474
%r = fdiv <16 x float> %x, %s
@@ -845,9 +842,7 @@ define <8 x float> @fmul_v8f32_cast_cond(i8 noundef zeroext %pb, <8 x float> nou
845842
; AVX512VL-LABEL: fmul_v8f32_cast_cond:
846843
; AVX512VL: # %bb.0:
847844
; AVX512VL-NEXT: kmovw %edi, %k1
848-
; AVX512VL-NEXT: vbroadcastss {{.*#+}} ymm2 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0]
849-
; AVX512VL-NEXT: vmovaps %ymm1, %ymm2 {%k1}
850-
; AVX512VL-NEXT: vmulps %ymm2, %ymm0, %ymm0
845+
; AVX512VL-NEXT: vmulps %ymm1, %ymm0, %ymm0 {%k1}
851846
; AVX512VL-NEXT: retq
852847
%b = bitcast i8 %pb to <8 x i1>
853848
%s = select <8 x i1> %b, <8 x float> %y, <8 x float> <float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0>
@@ -911,9 +906,7 @@ define <8 x double> @fmul_v8f64_cast_cond(i8 noundef zeroext %pb, <8 x double> n
911906
; AVX512-LABEL: fmul_v8f64_cast_cond:
912907
; AVX512: # %bb.0:
913908
; AVX512-NEXT: kmovw %edi, %k1
914-
; AVX512-NEXT: vbroadcastsd {{.*#+}} zmm2 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0]
915-
; AVX512-NEXT: vmovapd %zmm1, %zmm2 {%k1}
916-
; AVX512-NEXT: vmulpd %zmm2, %zmm0, %zmm0
909+
; AVX512-NEXT: vmulpd %zmm1, %zmm0, %zmm0 {%k1}
917910
; AVX512-NEXT: retq
918911
%b = bitcast i8 %pb to <8 x i1>
919912
%s = select <8 x i1> %b, <8 x double> %y, <8 x double> <double 1.0, double 1.0, double 1.0, double 1.0, double 1.0, double 1.0, double 1.0, double 1.0>
@@ -986,9 +979,7 @@ define <8 x float> @fdiv_v8f32_cast_cond(i8 noundef zeroext %pb, <8 x float> nou
986979
; AVX512VL-LABEL: fdiv_v8f32_cast_cond:
987980
; AVX512VL: # %bb.0:
988981
; AVX512VL-NEXT: kmovw %edi, %k1
989-
; AVX512VL-NEXT: vbroadcastss {{.*#+}} ymm2 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0]
990-
; AVX512VL-NEXT: vmovaps %ymm1, %ymm2 {%k1}
991-
; AVX512VL-NEXT: vdivps %ymm2, %ymm0, %ymm0
982+
; AVX512VL-NEXT: vdivps %ymm1, %ymm0, %ymm0 {%k1}
992983
; AVX512VL-NEXT: retq
993984
%b = bitcast i8 %pb to <8 x i1>
994985
%s = select <8 x i1> %b, <8 x float> %y, <8 x float> <float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0>
@@ -1052,9 +1043,7 @@ define <8 x double> @fdiv_v8f64_cast_cond(i8 noundef zeroext %pb, <8 x double> n
10521043
; AVX512-LABEL: fdiv_v8f64_cast_cond:
10531044
; AVX512: # %bb.0:
10541045
; AVX512-NEXT: kmovw %edi, %k1
1055-
; AVX512-NEXT: vbroadcastsd {{.*#+}} zmm2 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0]
1056-
; AVX512-NEXT: vmovapd %zmm1, %zmm2 {%k1}
1057-
; AVX512-NEXT: vdivpd %zmm2, %zmm0, %zmm0
1046+
; AVX512-NEXT: vdivpd %zmm1, %zmm0, %zmm0 {%k1}
10581047
; AVX512-NEXT: retq
10591048
%b = bitcast i8 %pb to <8 x i1>
10601049
%s = select <8 x i1> %b, <8 x double> %y, <8 x double> <double 1.0, double 1.0, double 1.0, double 1.0, double 1.0, double 1.0, double 1.0, double 1.0>

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