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[unittests][CodeGen] Mark tests that cannot be executed with GTEST_SKIP()
This helps to distinguish such tests from successfully passed ones. Differential Revision: https://reviews.llvm.org/D102754
1 parent 21b40f0 commit 5bbf1fe

7 files changed

+30
-137
lines changed

‎llvm/unittests/CodeGen/AArch64SelectionDAGTest.cpp

+2-75
Original file line numberDiff line numberDiff line change
@@ -37,14 +37,14 @@ class AArch64SelectionDAGTest : public testing::Test {
3737
// initialize a target. A skeleton Target for unittests would allow us to
3838
// always run these tests.
3939
if (!T)
40-
return;
40+
GTEST_SKIP();
4141

4242
TargetOptions Options;
4343
TM = std::unique_ptr<LLVMTargetMachine>(static_cast<LLVMTargetMachine *>(
4444
T->createTargetMachine("AArch64", "", "+sve", Options, None, None,
4545
CodeGenOpt::Aggressive)));
4646
if (!TM)
47-
return;
47+
GTEST_SKIP();
4848

4949
SMDiagnostic SMError;
5050
M = parseAssemblyString(Assembly, SMError, Context);
@@ -85,8 +85,6 @@ class AArch64SelectionDAGTest : public testing::Test {
8585
};
8686

8787
TEST_F(AArch64SelectionDAGTest, computeKnownBits_ZERO_EXTEND_VECTOR_INREG) {
88-
if (!TM)
89-
return;
9088
SDLoc Loc;
9189
auto Int8VT = EVT::getIntegerVT(Context, 8);
9290
auto Int16VT = EVT::getIntegerVT(Context, 16);
@@ -100,8 +98,6 @@ TEST_F(AArch64SelectionDAGTest, computeKnownBits_ZERO_EXTEND_VECTOR_INREG) {
10098
}
10199

102100
TEST_F(AArch64SelectionDAGTest, computeKnownBitsSVE_ZERO_EXTEND_VECTOR_INREG) {
103-
if (!TM)
104-
return;
105101
SDLoc Loc;
106102
auto Int8VT = EVT::getIntegerVT(Context, 8);
107103
auto Int16VT = EVT::getIntegerVT(Context, 16);
@@ -119,8 +115,6 @@ TEST_F(AArch64SelectionDAGTest, computeKnownBitsSVE_ZERO_EXTEND_VECTOR_INREG) {
119115
}
120116

121117
TEST_F(AArch64SelectionDAGTest, computeKnownBits_EXTRACT_SUBVECTOR) {
122-
if (!TM)
123-
return;
124118
SDLoc Loc;
125119
auto IntVT = EVT::getIntegerVT(Context, 8);
126120
auto VecVT = EVT::getVectorVT(Context, IntVT, 3);
@@ -134,8 +128,6 @@ TEST_F(AArch64SelectionDAGTest, computeKnownBits_EXTRACT_SUBVECTOR) {
134128
}
135129

136130
TEST_F(AArch64SelectionDAGTest, ComputeNumSignBits_SIGN_EXTEND_VECTOR_INREG) {
137-
if (!TM)
138-
return;
139131
SDLoc Loc;
140132
auto Int8VT = EVT::getIntegerVT(Context, 8);
141133
auto Int16VT = EVT::getIntegerVT(Context, 16);
@@ -148,8 +140,6 @@ TEST_F(AArch64SelectionDAGTest, ComputeNumSignBits_SIGN_EXTEND_VECTOR_INREG) {
148140
}
149141

150142
TEST_F(AArch64SelectionDAGTest, ComputeNumSignBitsSVE_SIGN_EXTEND_VECTOR_INREG) {
151-
if (!TM)
152-
return;
153143
SDLoc Loc;
154144
auto Int8VT = EVT::getIntegerVT(Context, 8);
155145
auto Int16VT = EVT::getIntegerVT(Context, 16);
@@ -162,8 +152,6 @@ TEST_F(AArch64SelectionDAGTest, ComputeNumSignBitsSVE_SIGN_EXTEND_VECTOR_INREG)
162152
}
163153

164154
TEST_F(AArch64SelectionDAGTest, ComputeNumSignBits_EXTRACT_SUBVECTOR) {
165-
if (!TM)
166-
return;
167155
SDLoc Loc;
168156
auto IntVT = EVT::getIntegerVT(Context, 8);
169157
auto VecVT = EVT::getVectorVT(Context, IntVT, 3);
@@ -176,9 +164,6 @@ TEST_F(AArch64SelectionDAGTest, ComputeNumSignBits_EXTRACT_SUBVECTOR) {
176164
}
177165

178166
TEST_F(AArch64SelectionDAGTest, SimplifyDemandedVectorElts_EXTRACT_SUBVECTOR) {
179-
if (!TM)
180-
return;
181-
182167
TargetLowering TL(*TM);
183168

184169
SDLoc Loc;
@@ -198,9 +183,6 @@ TEST_F(AArch64SelectionDAGTest, SimplifyDemandedVectorElts_EXTRACT_SUBVECTOR) {
198183
}
199184

200185
TEST_F(AArch64SelectionDAGTest, SimplifyDemandedBitsNEON) {
201-
if (!TM)
202-
return;
203-
204186
TargetLowering TL(*TM);
205187

206188
SDLoc Loc;
@@ -227,9 +209,6 @@ TEST_F(AArch64SelectionDAGTest, SimplifyDemandedBitsNEON) {
227209
}
228210

229211
TEST_F(AArch64SelectionDAGTest, SimplifyDemandedBitsSVE) {
230-
if (!TM)
231-
return;
232-
233212
TargetLowering TL(*TM);
234213

235214
SDLoc Loc;
@@ -254,8 +233,6 @@ TEST_F(AArch64SelectionDAGTest, SimplifyDemandedBitsSVE) {
254233

255234
// Piggy-backing on the AArch64 tests to verify SelectionDAG::computeKnownBits.
256235
TEST_F(AArch64SelectionDAGTest, ComputeKnownBits_ADD) {
257-
if (!TM)
258-
return;
259236
SDLoc Loc;
260237
auto IntVT = EVT::getIntegerVT(Context, 8);
261238
auto UnknownOp = DAG->getRegister(0, IntVT);
@@ -275,8 +252,6 @@ TEST_F(AArch64SelectionDAGTest, ComputeKnownBits_ADD) {
275252

276253
// Piggy-backing on the AArch64 tests to verify SelectionDAG::computeKnownBits.
277254
TEST_F(AArch64SelectionDAGTest, ComputeKnownBits_SUB) {
278-
if (!TM)
279-
return;
280255
SDLoc Loc;
281256
auto IntVT = EVT::getIntegerVT(Context, 8);
282257
auto N0 = DAG->getConstant(0x55, Loc, IntVT);
@@ -295,9 +270,6 @@ TEST_F(AArch64SelectionDAGTest, ComputeKnownBits_SUB) {
295270
}
296271

297272
TEST_F(AArch64SelectionDAGTest, isSplatValue_Fixed_BUILD_VECTOR) {
298-
if (!TM)
299-
return;
300-
301273
TargetLowering TL(*TM);
302274

303275
SDLoc Loc;
@@ -318,9 +290,6 @@ TEST_F(AArch64SelectionDAGTest, isSplatValue_Fixed_BUILD_VECTOR) {
318290
}
319291

320292
TEST_F(AArch64SelectionDAGTest, isSplatValue_Fixed_ADD_of_BUILD_VECTOR) {
321-
if (!TM)
322-
return;
323-
324293
TargetLowering TL(*TM);
325294

326295
SDLoc Loc;
@@ -345,9 +314,6 @@ TEST_F(AArch64SelectionDAGTest, isSplatValue_Fixed_ADD_of_BUILD_VECTOR) {
345314
}
346315

347316
TEST_F(AArch64SelectionDAGTest, isSplatValue_Scalable_SPLAT_VECTOR) {
348-
if (!TM)
349-
return;
350-
351317
TargetLowering TL(*TM);
352318

353319
SDLoc Loc;
@@ -368,9 +334,6 @@ TEST_F(AArch64SelectionDAGTest, isSplatValue_Scalable_SPLAT_VECTOR) {
368334
}
369335

370336
TEST_F(AArch64SelectionDAGTest, isSplatValue_Scalable_ADD_of_SPLAT_VECTOR) {
371-
if (!TM)
372-
return;
373-
374337
TargetLowering TL(*TM);
375338

376339
SDLoc Loc;
@@ -395,9 +358,6 @@ TEST_F(AArch64SelectionDAGTest, isSplatValue_Scalable_ADD_of_SPLAT_VECTOR) {
395358
}
396359

397360
TEST_F(AArch64SelectionDAGTest, getSplatSourceVector_Fixed_BUILD_VECTOR) {
398-
if (!TM)
399-
return;
400-
401361
TargetLowering TL(*TM);
402362

403363
SDLoc Loc;
@@ -413,9 +373,6 @@ TEST_F(AArch64SelectionDAGTest, getSplatSourceVector_Fixed_BUILD_VECTOR) {
413373
}
414374

415375
TEST_F(AArch64SelectionDAGTest, getSplatSourceVector_Fixed_ADD_of_BUILD_VECTOR) {
416-
if (!TM)
417-
return;
418-
419376
TargetLowering TL(*TM);
420377

421378
SDLoc Loc;
@@ -434,9 +391,6 @@ TEST_F(AArch64SelectionDAGTest, getSplatSourceVector_Fixed_ADD_of_BUILD_VECTOR)
434391
}
435392

436393
TEST_F(AArch64SelectionDAGTest, getSplatSourceVector_Scalable_SPLAT_VECTOR) {
437-
if (!TM)
438-
return;
439-
440394
TargetLowering TL(*TM);
441395

442396
SDLoc Loc;
@@ -452,9 +406,6 @@ TEST_F(AArch64SelectionDAGTest, getSplatSourceVector_Scalable_SPLAT_VECTOR) {
452406
}
453407

454408
TEST_F(AArch64SelectionDAGTest, getSplatSourceVector_Scalable_ADD_of_SPLAT_VECTOR) {
455-
if (!TM)
456-
return;
457-
458409
TargetLowering TL(*TM);
459410

460411
SDLoc Loc;
@@ -473,9 +424,6 @@ TEST_F(AArch64SelectionDAGTest, getSplatSourceVector_Scalable_ADD_of_SPLAT_VECTO
473424
}
474425

475426
TEST_F(AArch64SelectionDAGTest, getRepeatedSequence_Patterns) {
476-
if (!TM)
477-
return;
478-
479427
TargetLowering TL(*TM);
480428

481429
SDLoc Loc;
@@ -594,45 +542,30 @@ TEST_F(AArch64SelectionDAGTest, getRepeatedSequence_Patterns) {
594542
}
595543

596544
TEST_F(AArch64SelectionDAGTest, getTypeConversion_SplitScalableMVT) {
597-
if (!TM)
598-
return;
599-
600545
MVT VT = MVT::nxv4i64;
601546
EXPECT_EQ(getTypeAction(VT), TargetLoweringBase::TypeSplitVector);
602547
ASSERT_TRUE(getTypeToTransformTo(VT).isScalableVector());
603548
}
604549

605550
TEST_F(AArch64SelectionDAGTest, getTypeConversion_PromoteScalableMVT) {
606-
if (!TM)
607-
return;
608-
609551
MVT VT = MVT::nxv2i32;
610552
EXPECT_EQ(getTypeAction(VT), TargetLoweringBase::TypePromoteInteger);
611553
ASSERT_TRUE(getTypeToTransformTo(VT).isScalableVector());
612554
}
613555

614556
TEST_F(AArch64SelectionDAGTest, getTypeConversion_NoScalarizeMVT_nxv1f32) {
615-
if (!TM)
616-
return;
617-
618557
MVT VT = MVT::nxv1f32;
619558
EXPECT_NE(getTypeAction(VT), TargetLoweringBase::TypeScalarizeVector);
620559
ASSERT_TRUE(getTypeToTransformTo(VT).isScalableVector());
621560
}
622561

623562
TEST_F(AArch64SelectionDAGTest, getTypeConversion_SplitScalableEVT) {
624-
if (!TM)
625-
return;
626-
627563
EVT VT = EVT::getVectorVT(Context, MVT::i64, 256, true);
628564
EXPECT_EQ(getTypeAction(VT), TargetLoweringBase::TypeSplitVector);
629565
EXPECT_EQ(getTypeToTransformTo(VT), VT.getHalfNumVectorElementsVT(Context));
630566
}
631567

632568
TEST_F(AArch64SelectionDAGTest, getTypeConversion_WidenScalableEVT) {
633-
if (!TM)
634-
return;
635-
636569
EVT FromVT = EVT::getVectorVT(Context, MVT::i64, 6, true);
637570
EVT ToVT = EVT::getVectorVT(Context, MVT::i64, 8, true);
638571

@@ -641,17 +574,11 @@ TEST_F(AArch64SelectionDAGTest, getTypeConversion_WidenScalableEVT) {
641574
}
642575

643576
TEST_F(AArch64SelectionDAGTest, getTypeConversion_NoScalarizeEVT_nxv1f128) {
644-
if (!TM)
645-
return;
646-
647577
EVT FromVT = EVT::getVectorVT(Context, MVT::f128, 1, true);
648578
EXPECT_DEATH(getTypeAction(FromVT), "Cannot legalize this vector");
649579
}
650580

651581
TEST_F(AArch64SelectionDAGTest, TestFold_STEP_VECTOR) {
652-
if (!TM)
653-
return;
654-
655582
SDLoc Loc;
656583
auto IntVT = EVT::getIntegerVT(Context, 8);
657584
auto VecVT = EVT::getVectorVT(Context, MVT::i8, 16, true);

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