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[AMDGPU] Set the default globals address space to 1
This will ensure that passes that add new global variables will create them in address space 1 once the passes have been updated to no longer default to the implicit address space zero. This also changes AutoUpgrade.cpp to add -G1 to the DataLayout if it wasn't already to present to ensure bitcode backwards compatibility. Reviewed by: arsenm Differential Revision: https://reviews.llvm.org/D84345
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11 files changed

+57
-31
lines changed

11 files changed

+57
-31
lines changed

‎clang/lib/Basic/Targets/AMDGPU.cpp

+2-2
Original file line numberDiff line numberDiff line change
@@ -31,12 +31,12 @@ namespace targets {
3131

3232
static const char *const DataLayoutStringR600 =
3333
"e-p:32:32-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128"
34-
"-v192:256-v256:256-v512:512-v1024:1024-v2048:2048-n32:64-S32-A5";
34+
"-v192:256-v256:256-v512:512-v1024:1024-v2048:2048-n32:64-S32-A5-G1";
3535

3636
static const char *const DataLayoutStringAMDGCN =
3737
"e-p:64:64-p1:64:64-p2:32:32-p3:32:32-p4:64:64-p5:32:32-p6:32:32"
3838
"-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128"
39-
"-v192:256-v256:256-v512:512-v1024:1024-v2048:2048-n32:64-S32-A5"
39+
"-v192:256-v256:256-v512:512-v1024:1024-v2048:2048-n32:64-S32-A5-G1"
4040
"-ni:7";
4141

4242
const LangASMap AMDGPUTargetInfo::AMDGPUDefIsGenMap = {

‎clang/lib/CodeGen/CGClass.cpp

+8-4
Original file line numberDiff line numberDiff line change
@@ -2508,12 +2508,16 @@ void CodeGenFunction::InitializeVTablePointer(const VPtr &Vptr) {
25082508

25092509
// Finally, store the address point. Use the same LLVM types as the field to
25102510
// support optimization.
2511+
unsigned GlobalsAS = CGM.getDataLayout().getDefaultGlobalsAddressSpace();
2512+
unsigned ProgAS = CGM.getDataLayout().getProgramAddressSpace();
25112513
llvm::Type *VTablePtrTy =
25122514
llvm::FunctionType::get(CGM.Int32Ty, /*isVarArg=*/true)
2513-
->getPointerTo()
2514-
->getPointerTo();
2515-
VTableField = Builder.CreateBitCast(VTableField, VTablePtrTy->getPointerTo());
2516-
VTableAddressPoint = Builder.CreateBitCast(VTableAddressPoint, VTablePtrTy);
2515+
->getPointerTo(ProgAS)
2516+
->getPointerTo(GlobalsAS);
2517+
VTableField = Builder.CreatePointerBitCastOrAddrSpaceCast(
2518+
VTableField, VTablePtrTy->getPointerTo(GlobalsAS));
2519+
VTableAddressPoint = Builder.CreatePointerBitCastOrAddrSpaceCast(
2520+
VTableAddressPoint, VTablePtrTy);
25172521

25182522
llvm::StoreInst *Store = Builder.CreateStore(VTableAddressPoint, VTableField);
25192523
TBAAAccessInfo TBAAInfo = CGM.getTBAAVTablePtrAccessInfo(VTablePtrTy);

‎clang/lib/CodeGen/CGOpenMPRuntime.cpp

+6-5
Original file line numberDiff line numberDiff line change
@@ -3075,11 +3075,12 @@ void CGOpenMPRuntime::createOffloadEntry(
30753075
llvm::GlobalValue::InternalLinkage, StrPtrInit, StringName);
30763076
Str->setUnnamedAddr(llvm::GlobalValue::UnnamedAddr::Global);
30773077

3078-
llvm::Constant *Data[] = {llvm::ConstantExpr::getBitCast(ID, CGM.VoidPtrTy),
3079-
llvm::ConstantExpr::getBitCast(Str, CGM.Int8PtrTy),
3080-
llvm::ConstantInt::get(CGM.SizeTy, Size),
3081-
llvm::ConstantInt::get(CGM.Int32Ty, Flags),
3082-
llvm::ConstantInt::get(CGM.Int32Ty, 0)};
3078+
llvm::Constant *Data[] = {
3079+
llvm::ConstantExpr::getPointerBitCastOrAddrSpaceCast(ID, CGM.VoidPtrTy),
3080+
llvm::ConstantExpr::getPointerBitCastOrAddrSpaceCast(Str, CGM.Int8PtrTy),
3081+
llvm::ConstantInt::get(CGM.SizeTy, Size),
3082+
llvm::ConstantInt::get(CGM.Int32Ty, Flags),
3083+
llvm::ConstantInt::get(CGM.Int32Ty, 0)};
30833084
std::string EntryName = getName({"omp_offloading", "entry", ""});
30843085
llvm::GlobalVariable *Entry = createGlobalStruct(
30853086
CGM, getTgtOffloadEntryQTy(), /*IsConstant=*/true, Data,

‎clang/lib/CodeGen/CGVTT.cpp

+6-7
Original file line numberDiff line numberDiff line change
@@ -42,10 +42,8 @@ CodeGenVTables::EmitVTTDefinition(llvm::GlobalVariable *VTT,
4242
llvm::GlobalVariable::LinkageTypes Linkage,
4343
const CXXRecordDecl *RD) {
4444
VTTBuilder Builder(CGM.getContext(), RD, /*GenerateDefinition=*/true);
45-
46-
llvm::Type *Int8PtrTy = CGM.Int8PtrTy, *Int32Ty = CGM.Int32Ty;
4745
llvm::ArrayType *ArrayType =
48-
llvm::ArrayType::get(Int8PtrTy, Builder.getVTTComponents().size());
46+
llvm::ArrayType::get(CGM.Int8PtrTy, Builder.getVTTComponents().size());
4947

5048
SmallVector<llvm::GlobalVariable *, 8> VTables;
5149
SmallVector<VTableAddressPointsMapTy, 8> VTableAddressPoints;
@@ -74,16 +72,17 @@ CodeGenVTables::EmitVTTDefinition(llvm::GlobalVariable *VTT,
7472
}
7573

7674
llvm::Value *Idxs[] = {
77-
llvm::ConstantInt::get(Int32Ty, 0),
78-
llvm::ConstantInt::get(Int32Ty, AddressPoint.VTableIndex),
79-
llvm::ConstantInt::get(Int32Ty, AddressPoint.AddressPointIndex),
75+
llvm::ConstantInt::get(CGM.Int32Ty, 0),
76+
llvm::ConstantInt::get(CGM.Int32Ty, AddressPoint.VTableIndex),
77+
llvm::ConstantInt::get(CGM.Int32Ty, AddressPoint.AddressPointIndex),
8078
};
8179

8280
llvm::Constant *Init = llvm::ConstantExpr::getGetElementPtr(
8381
VTable->getValueType(), VTable, Idxs, /*InBounds=*/true,
8482
/*InRangeIndex=*/1);
8583

86-
Init = llvm::ConstantExpr::getBitCast(Init, Int8PtrTy);
84+
Init = llvm::ConstantExpr::getPointerBitCastOrAddrSpaceCast(Init,
85+
CGM.Int8PtrTy);
8786

8887
VTTComponents.push_back(Init);
8988
}

‎clang/lib/CodeGen/ItaniumCXXABI.cpp

+2-1
Original file line numberDiff line numberDiff line change
@@ -2331,7 +2331,8 @@ void ItaniumCXXABI::EmitGuardedInit(CodeGenFunction &CGF,
23312331
CGM.getDataLayout().getABITypeAlignment(guardTy));
23322332
}
23332333
}
2334-
llvm::PointerType *guardPtrTy = guardTy->getPointerTo();
2334+
llvm::PointerType *guardPtrTy = guardTy->getPointerTo(
2335+
CGF.CGM.getDataLayout().getDefaultGlobalsAddressSpace());
23352336

23362337
// Create the guard variable if we don't already have it (as we
23372338
// might if we're double-emitting this function body).

‎clang/test/CodeGen/target-data.c

+4-4
Original file line numberDiff line numberDiff line change
@@ -168,20 +168,20 @@
168168

169169
// RUN: %clang_cc1 -triple r600-unknown -o - -emit-llvm %s | \
170170
// RUN: FileCheck %s -check-prefix=R600
171-
// R600: target datalayout = "e-p:32:32-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-v2048:2048-n32:64-S32-A5"
171+
// R600: target datalayout = "e-p:32:32-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-v2048:2048-n32:64-S32-A5-G1"
172172

173173
// RUN: %clang_cc1 -triple r600-unknown -target-cpu cayman -o - -emit-llvm %s \
174174
// RUN: | FileCheck %s -check-prefix=R600D
175-
// R600D: target datalayout = "e-p:32:32-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-v2048:2048-n32:64-S32-A5"
175+
// R600D: target datalayout = "e-p:32:32-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-v2048:2048-n32:64-S32-A5-G1"
176176

177177
// RUN: %clang_cc1 -triple amdgcn-unknown -target-cpu hawaii -o - -emit-llvm %s \
178178
// RUN: | FileCheck %s -check-prefix=R600SI
179-
// R600SI: target datalayout = "e-p:64:64-p1:64:64-p2:32:32-p3:32:32-p4:64:64-p5:32:32-p6:32:32-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-v2048:2048-n32:64-S32-A5-ni:7"
179+
// R600SI: target datalayout = "e-p:64:64-p1:64:64-p2:32:32-p3:32:32-p4:64:64-p5:32:32-p6:32:32-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-v2048:2048-n32:64-S32-A5-G1-ni:7"
180180

181181
// Test default -target-cpu
182182
// RUN: %clang_cc1 -triple amdgcn-unknown -o - -emit-llvm %s \
183183
// RUN: | FileCheck %s -check-prefix=R600SIDefault
184-
// R600SIDefault: target datalayout = "e-p:64:64-p1:64:64-p2:32:32-p3:32:32-p4:64:64-p5:32:32-p6:32:32-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-v2048:2048-n32:64-S32-A5-ni:7"
184+
// R600SIDefault: target datalayout = "e-p:64:64-p1:64:64-p2:32:32-p3:32:32-p4:64:64-p5:32:32-p6:32:32-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-v2048:2048-n32:64-S32-A5-G1-ni:7"
185185

186186
// RUN: %clang_cc1 -triple arm64-unknown -o - -emit-llvm %s | \
187187
// RUN: FileCheck %s -check-prefix=AARCH64

‎clang/test/CodeGenOpenCL/amdgpu-env-amdgcn.cl

+1-1
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,5 @@
11
// RUN: %clang_cc1 %s -O0 -triple amdgcn -emit-llvm -o - | FileCheck %s
22
// RUN: %clang_cc1 %s -O0 -triple amdgcn---opencl -emit-llvm -o - | FileCheck %s
33

4-
// CHECK: target datalayout = "e-p:64:64-p1:64:64-p2:32:32-p3:32:32-p4:64:64-p5:32:32-p6:32:32-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-v2048:2048-n32:64-S32-A5-ni:7"
4+
// CHECK: target datalayout = "e-p:64:64-p1:64:64-p2:32:32-p3:32:32-p4:64:64-p5:32:32-p6:32:32-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-v2048:2048-n32:64-S32-A5-G1-ni:7"
55
void foo(void) {}

‎llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp

+1-1
Original file line numberDiff line numberDiff line change
@@ -215,7 +215,7 @@ Value *OpenMPIRBuilder::getOrCreateIdent(Constant *SrcLocStr,
215215
GV->setAlignment(Align(8));
216216
Ident = GV;
217217
}
218-
return Ident;
218+
return Builder.CreatePointerCast(Ident, IdentPtr);
219219
}
220220

221221
Type *OpenMPIRBuilder::getLanemaskType() {

‎llvm/lib/IR/AutoUpgrade.cpp

+8-2
Original file line numberDiff line numberDiff line change
@@ -4380,11 +4380,17 @@ MDNode *llvm::upgradeInstructionLoopAttachment(MDNode &N) {
43804380
}
43814381

43824382
std::string llvm::UpgradeDataLayoutString(StringRef DL, StringRef TT) {
4383-
StringRef AddrSpaces = "-p270:32:32-p271:32:32-p272:64:64";
4383+
Triple T(TT);
4384+
// For AMDGPU we uprgrade older DataLayouts to include the default globals
4385+
// address space of 1.
4386+
if (T.isAMDGPU() && !DL.contains("-G") && !DL.startswith("G")) {
4387+
return DL.empty() ? std::string("G1") : (DL + "-G1").str();
4388+
}
43844389

4390+
std::string AddrSpaces = "-p270:32:32-p271:32:32-p272:64:64";
43854391
// If X86, and the datalayout matches the expected format, add pointer size
43864392
// address spaces to the datalayout.
4387-
if (!Triple(TT).isX86() || DL.contains(AddrSpaces))
4393+
if (!T.isX86() || DL.contains(AddrSpaces))
43884394
return std::string(DL);
43894395

43904396
SmallVector<StringRef, 4> Groups;

‎llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp

+4-4
Original file line numberDiff line numberDiff line change
@@ -342,15 +342,15 @@ GCNILPSchedRegistry("gcn-ilp",
342342
static StringRef computeDataLayout(const Triple &TT) {
343343
if (TT.getArch() == Triple::r600) {
344344
// 32-bit pointers.
345-
return "e-p:32:32-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128"
346-
"-v192:256-v256:256-v512:512-v1024:1024-v2048:2048-n32:64-S32-A5";
345+
return "e-p:32:32-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128"
346+
"-v192:256-v256:256-v512:512-v1024:1024-v2048:2048-n32:64-S32-A5-G1";
347347
}
348348

349349
// 32-bit private, local, and region pointers. 64-bit global, constant and
350350
// flat, non-integral buffer fat pointers.
351-
return "e-p:64:64-p1:64:64-p2:32:32-p3:32:32-p4:64:64-p5:32:32-p6:32:32"
351+
return "e-p:64:64-p1:64:64-p2:32:32-p3:32:32-p4:64:64-p5:32:32-p6:32:32"
352352
"-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128"
353-
"-v192:256-v256:256-v512:512-v1024:1024-v2048:2048-n32:64-S32-A5"
353+
"-v192:256-v256:256-v512:512-v1024:1024-v2048:2048-n32:64-S32-A5-G1"
354354
"-ni:7";
355355
}
356356

‎llvm/unittests/Bitcode/DataLayoutUpgradeTest.cpp

+15
Original file line numberDiff line numberDiff line change
@@ -27,6 +27,10 @@ TEST(DataLayoutUpgradeTest, ValidDataLayoutUpgrade) {
2727
"-f80:32-n8:16:32-S32");
2828
EXPECT_EQ(DL3, "e-m:o-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128"
2929
"-n32:64-S128");
30+
31+
// Check that AMDGPU targets add -G1 if it's not present.
32+
EXPECT_EQ(UpgradeDataLayoutString("e-p:32:32", "r600"), "e-p:32:32-G1");
33+
EXPECT_EQ(UpgradeDataLayoutString("e-p:64:64", "amdgcn"), "e-p:64:64-G1");
3034
}
3135

3236
TEST(DataLayoutUpgradeTest, NoDataLayoutUpgrade) {
@@ -46,6 +50,13 @@ TEST(DataLayoutUpgradeTest, NoDataLayoutUpgrade) {
4650
EXPECT_EQ(DL2, "e-p:32:32");
4751
EXPECT_EQ(DL3, "e-m:e-i64:64-n32:64");
4852
EXPECT_EQ(DL4, "e-m:o-i64:64-i128:128-n32:64-S128");
53+
54+
// Check that AMDGPU targets don't add -G1 if there is already a -G flag.
55+
EXPECT_EQ(UpgradeDataLayoutString("e-p:32:32-G2", "r600"), "e-p:32:32-G2");
56+
EXPECT_EQ(UpgradeDataLayoutString("G2", "r600"), "G2");
57+
EXPECT_EQ(UpgradeDataLayoutString("e-p:64:64-G2", "amdgcn"), "e-p:64:64-G2");
58+
EXPECT_EQ(UpgradeDataLayoutString("G2-e-p:64:64", "amdgcn"), "G2-e-p:64:64");
59+
EXPECT_EQ(UpgradeDataLayoutString("e-p:64:64-G0", "amdgcn"), "e-p:64:64-G0");
4960
}
5061

5162
TEST(DataLayoutUpgradeTest, EmptyDataLayout) {
@@ -54,6 +65,10 @@ TEST(DataLayoutUpgradeTest, EmptyDataLayout) {
5465
"e-m:e-p:32:32-i64:64-f80:128-n8:16:32:64-S128", "");
5566
EXPECT_EQ(DL1, "");
5667
EXPECT_EQ(DL2, "e-m:e-p:32:32-i64:64-f80:128-n8:16:32:64-S128");
68+
69+
// Check that AMDGPU targets add G1 if it's not present.
70+
EXPECT_EQ(UpgradeDataLayoutString("", "r600"), "G1");
71+
EXPECT_EQ(UpgradeDataLayoutString("", "amdgcn"), "G1");
5772
}
5873

5974
} // end namespace

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