[SPARC] Recognize and handle the %lm(sym) operator

Reviewed By: joerg

Differential Revision: https://reviews.llvm.org/D77737

Author: LemonBoy

llvm/lib/Target/Sparc/MCTargetDesc/SparcAsmBackend.cpp

@@ -52,6 +52,7 @@ static unsigned adjustFixupValue(unsigned Kind, uint64_t Value) {
   case Sparc::fixup_sparc_tls_ldm_hi22:
   case Sparc::fixup_sparc_tls_ie_hi22:
   case Sparc::fixup_sparc_hi22:
+  case Sparc::fixup_sparc_lm:
     return (Value >> 10) & 0x3fffff;
 
   case Sparc::fixup_sparc_got13:
@@ -146,6 +147,7 @@ namespace {
         { "fixup_sparc_l44",       20,     12,  0 },
         { "fixup_sparc_hh",        10,     22,  0 },
         { "fixup_sparc_hm",        22,     10,  0 },
+        { "fixup_sparc_lm",        10,     22,  0 },
         { "fixup_sparc_pc22",      10,     22,  MCFixupKindInfo::FKF_IsPCRel },
         { "fixup_sparc_pc10",      22,     10,  MCFixupKindInfo::FKF_IsPCRel },
         { "fixup_sparc_got22",     10,     22,  0 },
@@ -187,6 +189,7 @@ namespace {
         { "fixup_sparc_l44",        0,     12,  0 },
         { "fixup_sparc_hh",         0,     22,  0 },
         { "fixup_sparc_hm",         0,     10,  0 },
+        { "fixup_sparc_lm",         0,     22,  0 },
         { "fixup_sparc_pc22",       0,     22,  MCFixupKindInfo::FKF_IsPCRel },
         { "fixup_sparc_pc10",       0,     10,  MCFixupKindInfo::FKF_IsPCRel },
         { "fixup_sparc_got22",      0,     22,  0 },

llvm/lib/Target/Sparc/MCTargetDesc/SparcELFObjectWriter.cpp

@@ -86,6 +86,7 @@ unsigned SparcELFObjectWriter::getRelocType(MCContext &Ctx,
   case Sparc::fixup_sparc_l44:   return ELF::R_SPARC_L44;
   case Sparc::fixup_sparc_hh:    return ELF::R_SPARC_HH22;
   case Sparc::fixup_sparc_hm:    return ELF::R_SPARC_HM10;
+  case Sparc::fixup_sparc_lm:    return ELF::R_SPARC_LM22;
   case Sparc::fixup_sparc_got22: return ELF::R_SPARC_GOT22;
   case Sparc::fixup_sparc_got10: return ELF::R_SPARC_GOT10;
   case Sparc::fixup_sparc_got13: return ELF::R_SPARC_GOT13;

llvm/lib/Target/Sparc/MCTargetDesc/SparcFixupKinds.h

@@ -54,6 +54,9 @@ namespace llvm {
       /// fixup_sparc_hm  -  10-bit fixup corresponding to %hm(foo)
       fixup_sparc_hm,
 
+      /// fixup_sparc_lm  -  22-bit fixup corresponding to %lm(foo)
+      fixup_sparc_lm,
+
       /// fixup_sparc_pc22 - 22-bit fixup corresponding to %pc22(foo)
       fixup_sparc_pc22,
 

llvm/lib/Target/Sparc/MCTargetDesc/SparcMCExpr.cpp

@@ -50,6 +50,7 @@ bool SparcMCExpr::printVariantKind(raw_ostream &OS, VariantKind Kind)
   case VK_Sparc_L44:      OS << "%l44("; return true;
   case VK_Sparc_HH:       OS << "%hh(";  return true;
   case VK_Sparc_HM:       OS << "%hm(";  return true;
+  case VK_Sparc_LM:       OS << "%lm(";  return true;
     // FIXME: use %pc22/%pc10, if system assembler supports them.
   case VK_Sparc_PC22:     OS << "%hi("; return true;
   case VK_Sparc_PC10:     OS << "%lo("; return true;
@@ -93,6 +94,7 @@ SparcMCExpr::VariantKind SparcMCExpr::parseVariantKind(StringRef name)
     .Case("l44", VK_Sparc_L44)
     .Case("hh",  VK_Sparc_HH)
     .Case("hm",  VK_Sparc_HM)
+    .Case("lm",  VK_Sparc_LM)
     .Case("pc22",  VK_Sparc_PC22)
     .Case("pc10",  VK_Sparc_PC10)
     .Case("got22", VK_Sparc_GOT22)
@@ -130,6 +132,7 @@ Sparc::Fixups SparcMCExpr::getFixupKind(SparcMCExpr::VariantKind Kind) {
   case VK_Sparc_L44:      return Sparc::fixup_sparc_l44;
   case VK_Sparc_HH:       return Sparc::fixup_sparc_hh;
   case VK_Sparc_HM:       return Sparc::fixup_sparc_hm;
+  case VK_Sparc_LM:       return Sparc::fixup_sparc_lm;
   case VK_Sparc_PC22:     return Sparc::fixup_sparc_pc22;
   case VK_Sparc_PC10:     return Sparc::fixup_sparc_pc10;
   case VK_Sparc_GOT22:    return Sparc::fixup_sparc_got22;

llvm/lib/Target/Sparc/MCTargetDesc/SparcMCExpr.h

@@ -31,6 +31,7 @@ class SparcMCExpr : public MCTargetExpr {
     VK_Sparc_L44,
     VK_Sparc_HH,
     VK_Sparc_HM,
+    VK_Sparc_LM,
     VK_Sparc_PC22,
     VK_Sparc_PC10,
     VK_Sparc_GOT22,

llvm/lib/Target/Sparc/SparcAsmPrinter.cpp

@@ -303,6 +303,7 @@ void SparcAsmPrinter::printOperand(const MachineInstr *MI, int opNum,
       assert((TF == SparcMCExpr::VK_Sparc_HI
               || TF == SparcMCExpr::VK_Sparc_H44
               || TF == SparcMCExpr::VK_Sparc_HH
+              || TF == SparcMCExpr::VK_Sparc_LM
               || TF == SparcMCExpr::VK_Sparc_TLS_GD_HI22
               || TF == SparcMCExpr::VK_Sparc_TLS_LDM_HI22
               || TF == SparcMCExpr::VK_Sparc_TLS_LDO_HIX22

llvm/test/MC/Sparc/sparc-relocations.s

@@ -11,6 +11,7 @@
         ! CHECK-OBJ: 0x{{[0-9,A-F]+}} R_SPARC_L44 sym
         ! CHECK-OBJ: 0x{{[0-9,A-F]+}} R_SPARC_HH22 sym
         ! CHECK-OBJ: 0x{{[0-9,A-F]+}} R_SPARC_HM10 sym
+        ! CHECK-OBJ: 0x{{[0-9,A-F]+}} R_SPARC_LM22 sym
         ! CHECK-OBJ: 0x{{[0-9,A-F]+}} R_SPARC_13 sym
         ! CHECK-ELF: ]
 
@@ -46,6 +47,10 @@
         ! CHECK-NEXT:                  !   fixup A - offset: 0, value: %hm(sym), kind: fixup_sparc_hm
         or %g1, %hm(sym), %g3
 
+        ! CHECK: sethi %lm(sym), %l0  ! encoding: [0x21,0b00AAAAAA,A,A]
+        ! CHECK-NEXT:                 !   fixup A - offset: 0, value: %lm(sym), kind: fixup_sparc_lm
+        sethi %lm(sym), %l0
+
         ! CHECK: or %g1, sym, %g3 ! encoding: [0x86,0x10,0b011AAAAA,A]
         ! CHECK-NEXT:                  !   fixup A - offset: 0, value: sym, kind: fixup_sparc_13
         or %g1, sym, %g3