gerritsangel
diff --git a/‎llvm/CMakeLists.txt
+1-1 b/‎llvm/CMakeLists.txt
+1-1
diff --git a/‎llvm/autoconf/configure.ac
+3-2 b/‎llvm/autoconf/configure.ac
+3-2
diff --git a/‎llvm/configure
+3-2 b/‎llvm/configure
+3-2
diff --git a/‎llvm/docs/R600Usage.rst ‎llvm/docs/AMDGPUUsage.rst
+5-5 b/‎llvm/docs/R600Usage.rst ‎llvm/docs/AMDGPUUsage.rst
+5-5
diff --git a/‎llvm/docs/CompilerWriterInfo.rst
+2-2 b/‎llvm/docs/CompilerWriterInfo.rst
+2-2
diff --git a/‎llvm/docs/GettingStarted.rst
+1-1 b/‎llvm/docs/GettingStarted.rst
+1-1
diff --git a/‎llvm/docs/index.rst
+3-3 b/‎llvm/docs/index.rst
+3-3
diff --git a/‎llvm/lib/Target/R600/AMDGPU.h ‎llvm/lib/Target/AMDGPU/AMDGPU.h b/‎llvm/lib/Target/R600/AMDGPU.h ‎llvm/lib/Target/AMDGPU/AMDGPU.h
diff --git a/‎llvm/lib/Target/R600/AMDGPU.td ‎llvm/lib/Target/AMDGPU/AMDGPU.td b/‎llvm/lib/Target/R600/AMDGPU.td ‎llvm/lib/Target/AMDGPU/AMDGPU.td
diff --git a/‎llvm/lib/Target/R600/AMDGPUAlwaysInlinePass.cpp ‎llvm/lib/Target/AMDGPU/AMDGPUAlwaysInlinePass.cpp b/‎llvm/lib/Target/R600/AMDGPUAlwaysInlinePass.cpp ‎llvm/lib/Target/AMDGPU/AMDGPUAlwaysInlinePass.cpp
diff --git a/‎llvm/lib/Target/R600/AMDGPUAsmPrinter.cpp ‎llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
+1-1 b/‎llvm/lib/Target/R600/AMDGPUAsmPrinter.cpp ‎llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
+1-1
diff --git a/‎llvm/lib/Target/R600/AMDGPUAsmPrinter.h ‎llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.h b/‎llvm/lib/Target/R600/AMDGPUAsmPrinter.h ‎llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.h
diff --git a/‎llvm/lib/Target/R600/AMDGPUCallingConv.td ‎llvm/lib/Target/AMDGPU/AMDGPUCallingConv.td b/‎llvm/lib/Target/R600/AMDGPUCallingConv.td ‎llvm/lib/Target/AMDGPU/AMDGPUCallingConv.td
diff --git a/‎llvm/lib/Target/R600/AMDGPUFrameLowering.cpp ‎llvm/lib/Target/AMDGPU/AMDGPUFrameLowering.cpp b/‎llvm/lib/Target/R600/AMDGPUFrameLowering.cpp ‎llvm/lib/Target/AMDGPU/AMDGPUFrameLowering.cpp
diff --git a/‎llvm/lib/Target/R600/AMDGPUFrameLowering.h ‎llvm/lib/Target/AMDGPU/AMDGPUFrameLowering.h b/‎llvm/lib/Target/R600/AMDGPUFrameLowering.h ‎llvm/lib/Target/AMDGPU/AMDGPUFrameLowering.h
diff --git a/‎llvm/lib/Target/R600/AMDGPUISelDAGToDAG.cpp ‎llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp b/‎llvm/lib/Target/R600/AMDGPUISelDAGToDAG.cpp ‎llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
diff --git a/‎llvm/lib/Target/R600/AMDGPUISelLowering.cpp ‎llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp b/‎llvm/lib/Target/R600/AMDGPUISelLowering.cpp ‎llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
diff --git a/‎llvm/lib/Target/R600/AMDGPUISelLowering.h ‎llvm/lib/Target/AMDGPU/AMDGPUISelLowering.h b/‎llvm/lib/Target/R600/AMDGPUISelLowering.h ‎llvm/lib/Target/AMDGPU/AMDGPUISelLowering.h
diff --git a/‎llvm/lib/Target/R600/AMDGPUInstrInfo.cpp ‎llvm/lib/Target/AMDGPU/AMDGPUInstrInfo.cpp b/‎llvm/lib/Target/R600/AMDGPUInstrInfo.cpp ‎llvm/lib/Target/AMDGPU/AMDGPUInstrInfo.cpp
diff --git a/‎llvm/lib/Target/R600/AMDGPUInstrInfo.h ‎llvm/lib/Target/AMDGPU/AMDGPUInstrInfo.h b/‎llvm/lib/Target/R600/AMDGPUInstrInfo.h ‎llvm/lib/Target/AMDGPU/AMDGPUInstrInfo.h
diff --git a/‎llvm/lib/Target/R600/AMDGPUInstrInfo.td ‎llvm/lib/Target/AMDGPU/AMDGPUInstrInfo.td b/‎llvm/lib/Target/R600/AMDGPUInstrInfo.td ‎llvm/lib/Target/AMDGPU/AMDGPUInstrInfo.td
diff --git a/‎llvm/lib/Target/R600/AMDGPUInstructions.td ‎llvm/lib/Target/AMDGPU/AMDGPUInstructions.td b/‎llvm/lib/Target/R600/AMDGPUInstructions.td ‎llvm/lib/Target/AMDGPU/AMDGPUInstructions.td
diff --git a/‎llvm/lib/Target/R600/AMDGPUIntrinsicInfo.cpp ‎llvm/lib/Target/AMDGPU/AMDGPUIntrinsicInfo.cpp b/‎llvm/lib/Target/R600/AMDGPUIntrinsicInfo.cpp ‎llvm/lib/Target/AMDGPU/AMDGPUIntrinsicInfo.cpp
diff --git a/‎llvm/lib/Target/R600/AMDGPUIntrinsicInfo.h ‎llvm/lib/Target/AMDGPU/AMDGPUIntrinsicInfo.h b/‎llvm/lib/Target/R600/AMDGPUIntrinsicInfo.h ‎llvm/lib/Target/AMDGPU/AMDGPUIntrinsicInfo.h
diff --git a/‎llvm/lib/Target/R600/AMDGPUIntrinsics.td ‎llvm/lib/Target/AMDGPU/AMDGPUIntrinsics.td b/‎llvm/lib/Target/R600/AMDGPUIntrinsics.td ‎llvm/lib/Target/AMDGPU/AMDGPUIntrinsics.td
diff --git a/‎llvm/lib/Target/R600/AMDGPUMCInstLower.cpp ‎llvm/lib/Target/AMDGPU/AMDGPUMCInstLower.cpp b/‎llvm/lib/Target/R600/AMDGPUMCInstLower.cpp ‎llvm/lib/Target/AMDGPU/AMDGPUMCInstLower.cpp
diff --git a/‎llvm/lib/Target/R600/AMDGPUMCInstLower.h ‎llvm/lib/Target/AMDGPU/AMDGPUMCInstLower.h b/‎llvm/lib/Target/R600/AMDGPUMCInstLower.h ‎llvm/lib/Target/AMDGPU/AMDGPUMCInstLower.h
diff --git a/‎llvm/lib/Target/R600/AMDGPUMachineFunction.cpp ‎llvm/lib/Target/AMDGPU/AMDGPUMachineFunction.cpp b/‎llvm/lib/Target/R600/AMDGPUMachineFunction.cpp ‎llvm/lib/Target/AMDGPU/AMDGPUMachineFunction.cpp
diff --git a/‎llvm/lib/Target/R600/AMDGPUMachineFunction.h ‎llvm/lib/Target/AMDGPU/AMDGPUMachineFunction.h b/‎llvm/lib/Target/R600/AMDGPUMachineFunction.h ‎llvm/lib/Target/AMDGPU/AMDGPUMachineFunction.h
diff --git a/‎llvm/lib/Target/R600/AMDGPUPromoteAlloca.cpp ‎llvm/lib/Target/AMDGPU/AMDGPUPromoteAlloca.cpp b/‎llvm/lib/Target/R600/AMDGPUPromoteAlloca.cpp ‎llvm/lib/Target/AMDGPU/AMDGPUPromoteAlloca.cpp
diff --git a/‎llvm/lib/Target/R600/AMDGPURegisterInfo.cpp ‎llvm/lib/Target/AMDGPU/AMDGPURegisterInfo.cpp b/‎llvm/lib/Target/R600/AMDGPURegisterInfo.cpp ‎llvm/lib/Target/AMDGPU/AMDGPURegisterInfo.cpp
diff --git a/‎llvm/lib/Target/R600/AMDGPURegisterInfo.h ‎llvm/lib/Target/AMDGPU/AMDGPURegisterInfo.h b/‎llvm/lib/Target/R600/AMDGPURegisterInfo.h ‎llvm/lib/Target/AMDGPU/AMDGPURegisterInfo.h
diff --git a/‎llvm/lib/Target/R600/AMDGPURegisterInfo.td ‎llvm/lib/Target/AMDGPU/AMDGPURegisterInfo.td b/‎llvm/lib/Target/R600/AMDGPURegisterInfo.td ‎llvm/lib/Target/AMDGPU/AMDGPURegisterInfo.td
diff --git a/‎llvm/lib/Target/R600/AMDGPUSubtarget.cpp ‎llvm/lib/Target/AMDGPU/AMDGPUSubtarget.cpp b/‎llvm/lib/Target/R600/AMDGPUSubtarget.cpp ‎llvm/lib/Target/AMDGPU/AMDGPUSubtarget.cpp
diff --git a/‎llvm/lib/Target/R600/AMDGPUSubtarget.h ‎llvm/lib/Target/AMDGPU/AMDGPUSubtarget.h b/‎llvm/lib/Target/R600/AMDGPUSubtarget.h ‎llvm/lib/Target/AMDGPU/AMDGPUSubtarget.h
diff --git a/‎llvm/lib/Target/R600/AMDGPUTargetMachine.cpp ‎llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
+1-1 b/‎llvm/lib/Target/R600/AMDGPUTargetMachine.cpp ‎llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
+1-1
diff --git a/‎llvm/lib/Target/R600/AMDGPUTargetMachine.h ‎llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.h b/‎llvm/lib/Target/R600/AMDGPUTargetMachine.h ‎llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.h
diff --git a/‎llvm/lib/Target/R600/AMDGPUTargetTransformInfo.cpp ‎llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp b/‎llvm/lib/Target/R600/AMDGPUTargetTransformInfo.cpp ‎llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp
diff --git a/‎llvm/lib/Target/R600/AMDGPUTargetTransformInfo.h ‎llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.h b/‎llvm/lib/Target/R600/AMDGPUTargetTransformInfo.h ‎llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.h
diff --git a/‎llvm/lib/Target/R600/AMDILCFGStructurizer.cpp ‎llvm/lib/Target/AMDGPU/AMDILCFGStructurizer.cpp b/‎llvm/lib/Target/R600/AMDILCFGStructurizer.cpp ‎llvm/lib/Target/AMDGPU/AMDILCFGStructurizer.cpp
diff --git a/‎llvm/lib/Target/R600/AMDKernelCodeT.h ‎llvm/lib/Target/AMDGPU/AMDKernelCodeT.h b/‎llvm/lib/Target/R600/AMDKernelCodeT.h ‎llvm/lib/Target/AMDGPU/AMDKernelCodeT.h
diff --git a/‎llvm/lib/Target/R600/AsmParser/AMDGPUAsmParser.cpp ‎llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
+1-1 b/‎llvm/lib/Target/R600/AsmParser/AMDGPUAsmParser.cpp ‎llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
+1-1
diff --git a/‎llvm/lib/Target/AMDGPU/AsmParser/CMakeLists.txt
+3 b/‎llvm/lib/Target/AMDGPU/AsmParser/CMakeLists.txt
+3
diff --git a/‎llvm/lib/Target/R600/MCTargetDesc/LLVMBuild.txt ‎llvm/lib/Target/AMDGPU/AsmParser/LLVMBuild.txt
+5-5 b/‎llvm/lib/Target/R600/MCTargetDesc/LLVMBuild.txt ‎llvm/lib/Target/AMDGPU/AsmParser/LLVMBuild.txt
+5-5
diff --git a/‎llvm/lib/Target/R600/AsmParser/Makefile ‎llvm/lib/Target/AMDGPU/AsmParser/Makefile b/‎llvm/lib/Target/R600/AsmParser/Makefile ‎llvm/lib/Target/AMDGPU/AsmParser/Makefile
diff --git a/‎llvm/lib/Target/R600/CIInstructions.td ‎llvm/lib/Target/AMDGPU/CIInstructions.td b/‎llvm/lib/Target/R600/CIInstructions.td ‎llvm/lib/Target/AMDGPU/CIInstructions.td
diff --git a/‎llvm/lib/Target/R600/CMakeLists.txt ‎llvm/lib/Target/AMDGPU/CMakeLists.txt
+1-1 b/‎llvm/lib/Target/R600/CMakeLists.txt ‎llvm/lib/Target/AMDGPU/CMakeLists.txt
+1-1
diff --git a/‎llvm/lib/Target/R600/CaymanInstructions.td ‎llvm/lib/Target/AMDGPU/CaymanInstructions.td b/‎llvm/lib/Target/R600/CaymanInstructions.td ‎llvm/lib/Target/AMDGPU/CaymanInstructions.td
diff --git a/‎llvm/lib/Target/R600/EvergreenInstructions.td ‎llvm/lib/Target/AMDGPU/EvergreenInstructions.td b/‎llvm/lib/Target/R600/EvergreenInstructions.td ‎llvm/lib/Target/AMDGPU/EvergreenInstructions.td
diff --git a/‎llvm/lib/Target/R600/InstPrinter/AMDGPUInstPrinter.cpp ‎llvm/lib/Target/AMDGPU/InstPrinter/AMDGPUInstPrinter.cpp b/‎llvm/lib/Target/R600/InstPrinter/AMDGPUInstPrinter.cpp ‎llvm/lib/Target/AMDGPU/InstPrinter/AMDGPUInstPrinter.cpp
diff --git a/‎llvm/lib/Target/R600/InstPrinter/AMDGPUInstPrinter.h ‎llvm/lib/Target/AMDGPU/InstPrinter/AMDGPUInstPrinter.h b/‎llvm/lib/Target/R600/InstPrinter/AMDGPUInstPrinter.h ‎llvm/lib/Target/AMDGPU/InstPrinter/AMDGPUInstPrinter.h
diff --git a/‎llvm/lib/Target/AMDGPU/InstPrinter/CMakeLists.txt
+3 b/‎llvm/lib/Target/AMDGPU/InstPrinter/CMakeLists.txt
+3
diff --git a/‎llvm/lib/Target/R600/InstPrinter/LLVMBuild.txt ‎llvm/lib/Target/AMDGPU/InstPrinter/LLVMBuild.txt
+4-4 b/‎llvm/lib/Target/R600/InstPrinter/LLVMBuild.txt ‎llvm/lib/Target/AMDGPU/InstPrinter/LLVMBuild.txt
+4-4
diff --git a/‎llvm/lib/Target/R600/InstPrinter/Makefile ‎llvm/lib/Target/AMDGPU/InstPrinter/Makefile b/‎llvm/lib/Target/R600/InstPrinter/Makefile ‎llvm/lib/Target/AMDGPU/InstPrinter/Makefile
diff --git a/‎llvm/lib/Target/R600/LLVMBuild.txt ‎llvm/lib/Target/AMDGPU/LLVMBuild.txt
+5-5 b/‎llvm/lib/Target/R600/LLVMBuild.txt ‎llvm/lib/Target/AMDGPU/LLVMBuild.txt
+5-5
diff --git a/‎llvm/lib/Target/R600/MCTargetDesc/AMDGPUAsmBackend.cpp ‎llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUAsmBackend.cpp b/‎llvm/lib/Target/R600/MCTargetDesc/AMDGPUAsmBackend.cpp ‎llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUAsmBackend.cpp
diff --git a/‎llvm/lib/Target/R600/MCTargetDesc/AMDGPUELFObjectWriter.cpp ‎llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUELFObjectWriter.cpp b/‎llvm/lib/Target/R600/MCTargetDesc/AMDGPUELFObjectWriter.cpp ‎llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUELFObjectWriter.cpp
diff --git a/‎llvm/lib/Target/R600/MCTargetDesc/AMDGPUFixupKinds.h ‎llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUFixupKinds.h b/‎llvm/lib/Target/R600/MCTargetDesc/AMDGPUFixupKinds.h ‎llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUFixupKinds.h
diff --git a/‎llvm/lib/Target/R600/MCTargetDesc/AMDGPUMCAsmInfo.cpp ‎llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCAsmInfo.cpp b/‎llvm/lib/Target/R600/MCTargetDesc/AMDGPUMCAsmInfo.cpp ‎llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCAsmInfo.cpp
diff --git a/‎llvm/lib/Target/R600/MCTargetDesc/AMDGPUMCAsmInfo.h ‎llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCAsmInfo.h b/‎llvm/lib/Target/R600/MCTargetDesc/AMDGPUMCAsmInfo.h ‎llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCAsmInfo.h
diff --git a/‎llvm/lib/Target/R600/MCTargetDesc/AMDGPUMCCodeEmitter.cpp ‎llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCCodeEmitter.cpp b/‎llvm/lib/Target/R600/MCTargetDesc/AMDGPUMCCodeEmitter.cpp ‎llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCCodeEmitter.cpp
diff --git a/‎llvm/lib/Target/R600/MCTargetDesc/AMDGPUMCCodeEmitter.h ‎llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCCodeEmitter.h b/‎llvm/lib/Target/R600/MCTargetDesc/AMDGPUMCCodeEmitter.h ‎llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCCodeEmitter.h
diff --git a/‎llvm/lib/Target/R600/MCTargetDesc/AMDGPUMCTargetDesc.cpp ‎llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCTargetDesc.cpp
+1-1 b/‎llvm/lib/Target/R600/MCTargetDesc/AMDGPUMCTargetDesc.cpp ‎llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCTargetDesc.cpp
+1-1
diff --git a/‎llvm/lib/Target/R600/MCTargetDesc/AMDGPUMCTargetDesc.h ‎llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCTargetDesc.h b/‎llvm/lib/Target/R600/MCTargetDesc/AMDGPUMCTargetDesc.h ‎llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCTargetDesc.h
diff --git a/‎llvm/lib/Target/R600/MCTargetDesc/CMakeLists.txt ‎llvm/lib/Target/AMDGPU/MCTargetDesc/CMakeLists.txt
+1-1 b/‎llvm/lib/Target/R600/MCTargetDesc/CMakeLists.txt ‎llvm/lib/Target/AMDGPU/MCTargetDesc/CMakeLists.txt
+1-1
diff --git a/‎llvm/lib/Target/R600/AsmParser/LLVMBuild.txt ‎llvm/lib/Target/AMDGPU/MCTargetDesc/LLVMBuild.txt
+5-5 b/‎llvm/lib/Target/R600/AsmParser/LLVMBuild.txt ‎llvm/lib/Target/AMDGPU/MCTargetDesc/LLVMBuild.txt
+5-5
diff --git a/‎llvm/lib/Target/R600/MCTargetDesc/Makefile ‎llvm/lib/Target/AMDGPU/MCTargetDesc/Makefile b/‎llvm/lib/Target/R600/MCTargetDesc/Makefile ‎llvm/lib/Target/AMDGPU/MCTargetDesc/Makefile
diff --git a/‎llvm/lib/Target/R600/MCTargetDesc/R600MCCodeEmitter.cpp ‎llvm/lib/Target/AMDGPU/MCTargetDesc/R600MCCodeEmitter.cpp b/‎llvm/lib/Target/R600/MCTargetDesc/R600MCCodeEmitter.cpp ‎llvm/lib/Target/AMDGPU/MCTargetDesc/R600MCCodeEmitter.cpp
diff --git a/‎llvm/lib/Target/R600/MCTargetDesc/SIMCCodeEmitter.cpp ‎llvm/lib/Target/AMDGPU/MCTargetDesc/SIMCCodeEmitter.cpp b/‎llvm/lib/Target/R600/MCTargetDesc/SIMCCodeEmitter.cpp ‎llvm/lib/Target/AMDGPU/MCTargetDesc/SIMCCodeEmitter.cpp
diff --git a/‎llvm/lib/Target/R600/Makefile ‎llvm/lib/Target/AMDGPU/Makefile b/‎llvm/lib/Target/R600/Makefile ‎llvm/lib/Target/AMDGPU/Makefile
diff --git a/‎llvm/lib/Target/R600/Processors.td ‎llvm/lib/Target/AMDGPU/Processors.td b/‎llvm/lib/Target/R600/Processors.td ‎llvm/lib/Target/AMDGPU/Processors.td
diff --git a/‎llvm/lib/Target/R600/R600ClauseMergePass.cpp ‎llvm/lib/Target/AMDGPU/R600ClauseMergePass.cpp b/‎llvm/lib/Target/R600/R600ClauseMergePass.cpp ‎llvm/lib/Target/AMDGPU/R600ClauseMergePass.cpp
diff --git a/‎llvm/lib/Target/R600/R600ControlFlowFinalizer.cpp ‎llvm/lib/Target/AMDGPU/R600ControlFlowFinalizer.cpp b/‎llvm/lib/Target/R600/R600ControlFlowFinalizer.cpp ‎llvm/lib/Target/AMDGPU/R600ControlFlowFinalizer.cpp
diff --git a/‎llvm/lib/Target/R600/R600Defines.h ‎llvm/lib/Target/AMDGPU/R600Defines.h b/‎llvm/lib/Target/R600/R600Defines.h ‎llvm/lib/Target/AMDGPU/R600Defines.h
diff --git a/‎llvm/lib/Target/R600/R600EmitClauseMarkers.cpp ‎llvm/lib/Target/AMDGPU/R600EmitClauseMarkers.cpp b/‎llvm/lib/Target/R600/R600EmitClauseMarkers.cpp ‎llvm/lib/Target/AMDGPU/R600EmitClauseMarkers.cpp
diff --git a/‎llvm/lib/Target/R600/R600ExpandSpecialInstrs.cpp ‎llvm/lib/Target/AMDGPU/R600ExpandSpecialInstrs.cpp b/‎llvm/lib/Target/R600/R600ExpandSpecialInstrs.cpp ‎llvm/lib/Target/AMDGPU/R600ExpandSpecialInstrs.cpp
diff --git a/‎llvm/lib/Target/R600/R600ISelLowering.cpp ‎llvm/lib/Target/AMDGPU/R600ISelLowering.cpp b/‎llvm/lib/Target/R600/R600ISelLowering.cpp ‎llvm/lib/Target/AMDGPU/R600ISelLowering.cpp
diff --git a/‎llvm/lib/Target/R600/R600ISelLowering.h ‎llvm/lib/Target/AMDGPU/R600ISelLowering.h b/‎llvm/lib/Target/R600/R600ISelLowering.h ‎llvm/lib/Target/AMDGPU/R600ISelLowering.h
diff --git a/‎llvm/lib/Target/R600/R600InstrFormats.td ‎llvm/lib/Target/AMDGPU/R600InstrFormats.td b/‎llvm/lib/Target/R600/R600InstrFormats.td ‎llvm/lib/Target/AMDGPU/R600InstrFormats.td
diff --git a/‎llvm/lib/Target/R600/R600InstrInfo.cpp ‎llvm/lib/Target/AMDGPU/R600InstrInfo.cpp b/‎llvm/lib/Target/R600/R600InstrInfo.cpp ‎llvm/lib/Target/AMDGPU/R600InstrInfo.cpp
diff --git a/‎llvm/lib/Target/R600/R600InstrInfo.h ‎llvm/lib/Target/AMDGPU/R600InstrInfo.h b/‎llvm/lib/Target/R600/R600InstrInfo.h ‎llvm/lib/Target/AMDGPU/R600InstrInfo.h
diff --git a/‎llvm/lib/Target/R600/R600Instructions.td ‎llvm/lib/Target/AMDGPU/R600Instructions.td b/‎llvm/lib/Target/R600/R600Instructions.td ‎llvm/lib/Target/AMDGPU/R600Instructions.td
diff --git a/‎llvm/lib/Target/R600/R600Intrinsics.td ‎llvm/lib/Target/AMDGPU/R600Intrinsics.td b/‎llvm/lib/Target/R600/R600Intrinsics.td ‎llvm/lib/Target/AMDGPU/R600Intrinsics.td
diff --git a/‎llvm/lib/Target/R600/R600MachineFunctionInfo.cpp ‎llvm/lib/Target/AMDGPU/R600MachineFunctionInfo.cpp b/‎llvm/lib/Target/R600/R600MachineFunctionInfo.cpp ‎llvm/lib/Target/AMDGPU/R600MachineFunctionInfo.cpp
diff --git a/‎llvm/lib/Target/R600/R600MachineFunctionInfo.h ‎llvm/lib/Target/AMDGPU/R600MachineFunctionInfo.h b/‎llvm/lib/Target/R600/R600MachineFunctionInfo.h ‎llvm/lib/Target/AMDGPU/R600MachineFunctionInfo.h
diff --git a/‎llvm/lib/Target/R600/R600MachineScheduler.cpp ‎llvm/lib/Target/AMDGPU/R600MachineScheduler.cpp b/‎llvm/lib/Target/R600/R600MachineScheduler.cpp ‎llvm/lib/Target/AMDGPU/R600MachineScheduler.cpp
diff --git a/‎llvm/lib/Target/R600/R600MachineScheduler.h ‎llvm/lib/Target/AMDGPU/R600MachineScheduler.h b/‎llvm/lib/Target/R600/R600MachineScheduler.h ‎llvm/lib/Target/AMDGPU/R600MachineScheduler.h
diff --git a/‎llvm/lib/Target/R600/R600OptimizeVectorRegisters.cpp ‎llvm/lib/Target/AMDGPU/R600OptimizeVectorRegisters.cpp b/‎llvm/lib/Target/R600/R600OptimizeVectorRegisters.cpp ‎llvm/lib/Target/AMDGPU/R600OptimizeVectorRegisters.cpp
diff --git a/‎llvm/lib/Target/R600/R600Packetizer.cpp ‎llvm/lib/Target/AMDGPU/R600Packetizer.cpp b/‎llvm/lib/Target/R600/R600Packetizer.cpp ‎llvm/lib/Target/AMDGPU/R600Packetizer.cpp
diff --git a/‎llvm/lib/Target/R600/R600RegisterInfo.cpp ‎llvm/lib/Target/AMDGPU/R600RegisterInfo.cpp b/‎llvm/lib/Target/R600/R600RegisterInfo.cpp ‎llvm/lib/Target/AMDGPU/R600RegisterInfo.cpp
diff --git a/‎llvm/lib/Target/R600/R600RegisterInfo.h ‎llvm/lib/Target/AMDGPU/R600RegisterInfo.h b/‎llvm/lib/Target/R600/R600RegisterInfo.h ‎llvm/lib/Target/AMDGPU/R600RegisterInfo.h
diff --git a/‎llvm/lib/Target/R600/R600RegisterInfo.td ‎llvm/lib/Target/AMDGPU/R600RegisterInfo.td b/‎llvm/lib/Target/R600/R600RegisterInfo.td ‎llvm/lib/Target/AMDGPU/R600RegisterInfo.td
diff --git a/‎llvm/lib/Target/R600/R600Schedule.td ‎llvm/lib/Target/AMDGPU/R600Schedule.td b/‎llvm/lib/Target/R600/R600Schedule.td ‎llvm/lib/Target/AMDGPU/R600Schedule.td
diff --git a/‎llvm/lib/Target/R600/R600TextureIntrinsicsReplacer.cpp ‎llvm/lib/Target/AMDGPU/R600TextureIntrinsicsReplacer.cpp b/‎llvm/lib/Target/R600/R600TextureIntrinsicsReplacer.cpp ‎llvm/lib/Target/AMDGPU/R600TextureIntrinsicsReplacer.cpp
diff --git a/‎llvm/lib/Target/R600/R700Instructions.td ‎llvm/lib/Target/AMDGPU/R700Instructions.td b/‎llvm/lib/Target/R600/R700Instructions.td ‎llvm/lib/Target/AMDGPU/R700Instructions.td
diff --git a/‎llvm/lib/Target/R600/SIAnnotateControlFlow.cpp ‎llvm/lib/Target/AMDGPU/SIAnnotateControlFlow.cpp b/‎llvm/lib/Target/R600/SIAnnotateControlFlow.cpp ‎llvm/lib/Target/AMDGPU/SIAnnotateControlFlow.cpp
diff --git a/‎llvm/lib/Target/R600/SIDefines.h ‎llvm/lib/Target/AMDGPU/SIDefines.h b/‎llvm/lib/Target/R600/SIDefines.h ‎llvm/lib/Target/AMDGPU/SIDefines.h
diff --git a/‎llvm/lib/Target/R600/SIFixControlFlowLiveIntervals.cpp ‎llvm/lib/Target/AMDGPU/SIFixControlFlowLiveIntervals.cpp b/‎llvm/lib/Target/R600/SIFixControlFlowLiveIntervals.cpp ‎llvm/lib/Target/AMDGPU/SIFixControlFlowLiveIntervals.cpp
diff --git a/‎llvm/lib/Target/R600/SIFixSGPRCopies.cpp ‎llvm/lib/Target/AMDGPU/SIFixSGPRCopies.cpp b/‎llvm/lib/Target/R600/SIFixSGPRCopies.cpp ‎llvm/lib/Target/AMDGPU/SIFixSGPRCopies.cpp
diff --git a/‎llvm/lib/Target/R600/SIFixSGPRLiveRanges.cpp ‎llvm/lib/Target/AMDGPU/SIFixSGPRLiveRanges.cpp b/‎llvm/lib/Target/R600/SIFixSGPRLiveRanges.cpp ‎llvm/lib/Target/AMDGPU/SIFixSGPRLiveRanges.cpp
diff --git a/‎llvm/lib/Target/R600/SIFoldOperands.cpp ‎llvm/lib/Target/AMDGPU/SIFoldOperands.cpp b/‎llvm/lib/Target/R600/SIFoldOperands.cpp ‎llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
diff --git a/‎llvm/lib/Target/R600/SIISelLowering.cpp ‎llvm/lib/Target/AMDGPU/SIISelLowering.cpp b/‎llvm/lib/Target/R600/SIISelLowering.cpp ‎llvm/lib/Target/AMDGPU/SIISelLowering.cpp
diff --git a/‎llvm/lib/Target/R600/SIISelLowering.h ‎llvm/lib/Target/AMDGPU/SIISelLowering.h b/‎llvm/lib/Target/R600/SIISelLowering.h ‎llvm/lib/Target/AMDGPU/SIISelLowering.h
diff --git a/‎llvm/lib/Target/R600/SIInsertWaits.cpp ‎llvm/lib/Target/AMDGPU/SIInsertWaits.cpp b/‎llvm/lib/Target/R600/SIInsertWaits.cpp ‎llvm/lib/Target/AMDGPU/SIInsertWaits.cpp
diff --git a/‎llvm/lib/Target/R600/SIInstrFormats.td ‎llvm/lib/Target/AMDGPU/SIInstrFormats.td b/‎llvm/lib/Target/R600/SIInstrFormats.td ‎llvm/lib/Target/AMDGPU/SIInstrFormats.td
diff --git a/‎llvm/lib/Target/R600/SIInstrInfo.cpp ‎llvm/lib/Target/AMDGPU/SIInstrInfo.cpp b/‎llvm/lib/Target/R600/SIInstrInfo.cpp ‎llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
diff --git a/‎llvm/lib/Target/R600/SIInstrInfo.h ‎llvm/lib/Target/AMDGPU/SIInstrInfo.h b/‎llvm/lib/Target/R600/SIInstrInfo.h ‎llvm/lib/Target/AMDGPU/SIInstrInfo.h
diff --git a/‎llvm/lib/Target/R600/SIInstrInfo.td ‎llvm/lib/Target/AMDGPU/SIInstrInfo.td b/‎llvm/lib/Target/R600/SIInstrInfo.td ‎llvm/lib/Target/AMDGPU/SIInstrInfo.td
diff --git a/‎llvm/lib/Target/R600/SIInstructions.td ‎llvm/lib/Target/AMDGPU/SIInstructions.td b/‎llvm/lib/Target/R600/SIInstructions.td ‎llvm/lib/Target/AMDGPU/SIInstructions.td
diff --git a/‎llvm/lib/Target/R600/SIIntrinsics.td ‎llvm/lib/Target/AMDGPU/SIIntrinsics.td b/‎llvm/lib/Target/R600/SIIntrinsics.td ‎llvm/lib/Target/AMDGPU/SIIntrinsics.td
diff --git a/‎llvm/lib/Target/R600/SILoadStoreOptimizer.cpp ‎llvm/lib/Target/AMDGPU/SILoadStoreOptimizer.cpp b/‎llvm/lib/Target/R600/SILoadStoreOptimizer.cpp ‎llvm/lib/Target/AMDGPU/SILoadStoreOptimizer.cpp
diff --git a/‎llvm/lib/Target/R600/SILowerControlFlow.cpp ‎llvm/lib/Target/AMDGPU/SILowerControlFlow.cpp b/‎llvm/lib/Target/R600/SILowerControlFlow.cpp ‎llvm/lib/Target/AMDGPU/SILowerControlFlow.cpp
diff --git a/‎llvm/lib/Target/R600/SILowerI1Copies.cpp ‎llvm/lib/Target/AMDGPU/SILowerI1Copies.cpp b/‎llvm/lib/Target/R600/SILowerI1Copies.cpp ‎llvm/lib/Target/AMDGPU/SILowerI1Copies.cpp
diff --git a/‎llvm/lib/Target/R600/SIMachineFunctionInfo.cpp ‎llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp b/‎llvm/lib/Target/R600/SIMachineFunctionInfo.cpp ‎llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp
diff --git a/‎llvm/lib/Target/R600/SIMachineFunctionInfo.h ‎llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.h b/‎llvm/lib/Target/R600/SIMachineFunctionInfo.h ‎llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.h
diff --git a/‎llvm/lib/Target/R600/SIPrepareScratchRegs.cpp ‎llvm/lib/Target/AMDGPU/SIPrepareScratchRegs.cpp b/‎llvm/lib/Target/R600/SIPrepareScratchRegs.cpp ‎llvm/lib/Target/AMDGPU/SIPrepareScratchRegs.cpp
diff --git a/‎llvm/lib/Target/R600/SIRegisterInfo.cpp ‎llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp b/‎llvm/lib/Target/R600/SIRegisterInfo.cpp ‎llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
diff --git a/‎llvm/lib/Target/R600/SIRegisterInfo.h ‎llvm/lib/Target/AMDGPU/SIRegisterInfo.h b/‎llvm/lib/Target/R600/SIRegisterInfo.h ‎llvm/lib/Target/AMDGPU/SIRegisterInfo.h
diff --git a/‎llvm/lib/Target/R600/SIRegisterInfo.td ‎llvm/lib/Target/AMDGPU/SIRegisterInfo.td b/‎llvm/lib/Target/R600/SIRegisterInfo.td ‎llvm/lib/Target/AMDGPU/SIRegisterInfo.td
diff --git a/‎llvm/lib/Target/R600/SISchedule.td ‎llvm/lib/Target/AMDGPU/SISchedule.td b/‎llvm/lib/Target/R600/SISchedule.td ‎llvm/lib/Target/AMDGPU/SISchedule.td
diff --git a/‎llvm/lib/Target/R600/SIShrinkInstructions.cpp ‎llvm/lib/Target/AMDGPU/SIShrinkInstructions.cpp b/‎llvm/lib/Target/R600/SIShrinkInstructions.cpp ‎llvm/lib/Target/AMDGPU/SIShrinkInstructions.cpp
diff --git a/‎llvm/lib/Target/R600/SITypeRewriter.cpp ‎llvm/lib/Target/AMDGPU/SITypeRewriter.cpp b/‎llvm/lib/Target/R600/SITypeRewriter.cpp ‎llvm/lib/Target/AMDGPU/SITypeRewriter.cpp
diff --git a/‎llvm/lib/Target/R600/TargetInfo/AMDGPUTargetInfo.cpp ‎llvm/lib/Target/AMDGPU/TargetInfo/AMDGPUTargetInfo.cpp
+1-1 b/‎llvm/lib/Target/R600/TargetInfo/AMDGPUTargetInfo.cpp ‎llvm/lib/Target/AMDGPU/TargetInfo/AMDGPUTargetInfo.cpp
+1-1
diff --git a/‎llvm/lib/Target/AMDGPU/TargetInfo/CMakeLists.txt
+3 b/‎llvm/lib/Target/AMDGPU/TargetInfo/CMakeLists.txt
+3
diff --git a/‎llvm/lib/Target/R600/TargetInfo/LLVMBuild.txt ‎llvm/lib/Target/AMDGPU/TargetInfo/LLVMBuild.txt
+4-4 b/‎llvm/lib/Target/R600/TargetInfo/LLVMBuild.txt ‎llvm/lib/Target/AMDGPU/TargetInfo/LLVMBuild.txt
+4-4
diff --git a/‎llvm/lib/Target/R600/TargetInfo/Makefile ‎llvm/lib/Target/AMDGPU/TargetInfo/Makefile b/‎llvm/lib/Target/R600/TargetInfo/Makefile ‎llvm/lib/Target/AMDGPU/TargetInfo/Makefile
diff --git a/‎llvm/lib/Target/R600/VIInstrFormats.td ‎llvm/lib/Target/AMDGPU/VIInstrFormats.td b/‎llvm/lib/Target/R600/VIInstrFormats.td ‎llvm/lib/Target/AMDGPU/VIInstrFormats.td
diff --git a/‎llvm/lib/Target/R600/VIInstructions.td ‎llvm/lib/Target/AMDGPU/VIInstructions.td b/‎llvm/lib/Target/R600/VIInstructions.td ‎llvm/lib/Target/AMDGPU/VIInstructions.td
diff --git a/‎llvm/lib/Target/LLVMBuild.txt
+1-1 b/‎llvm/lib/Target/LLVMBuild.txt
+1-1
diff --git a/‎llvm/lib/Target/R600/AsmParser/CMakeLists.txt
-3 b/‎llvm/lib/Target/R600/AsmParser/CMakeLists.txt
-3
diff --git a/‎llvm/lib/Target/R600/InstPrinter/CMakeLists.txt
-3 b/‎llvm/lib/Target/R600/InstPrinter/CMakeLists.txt
-3
diff --git a/‎llvm/lib/Target/R600/TargetInfo/CMakeLists.txt
-3 b/‎llvm/lib/Target/R600/TargetInfo/CMakeLists.txt
-3
diff --git a/‎llvm/test/CodeGen/R600/32-bit-local-address-space.ll ‎llvm/test/CodeGen/AMDGPU/32-bit-local-address-space.ll b/‎llvm/test/CodeGen/R600/32-bit-local-address-space.ll ‎llvm/test/CodeGen/AMDGPU/32-bit-local-address-space.ll
diff --git a/‎llvm/test/CodeGen/R600/README ‎llvm/test/CodeGen/AMDGPU/README b/‎llvm/test/CodeGen/R600/README ‎llvm/test/CodeGen/AMDGPU/README
diff --git a/‎llvm/test/CodeGen/R600/add-debug.ll ‎llvm/test/CodeGen/AMDGPU/add-debug.ll b/‎llvm/test/CodeGen/R600/add-debug.ll ‎llvm/test/CodeGen/AMDGPU/add-debug.ll
diff --git a/‎llvm/test/CodeGen/R600/add.ll ‎llvm/test/CodeGen/AMDGPU/add.ll b/‎llvm/test/CodeGen/R600/add.ll ‎llvm/test/CodeGen/AMDGPU/add.ll
diff --git a/‎llvm/test/CodeGen/R600/add_i64.ll ‎llvm/test/CodeGen/AMDGPU/add_i64.ll b/‎llvm/test/CodeGen/R600/add_i64.ll ‎llvm/test/CodeGen/AMDGPU/add_i64.ll
diff --git a/‎llvm/test/CodeGen/R600/address-space.ll ‎llvm/test/CodeGen/AMDGPU/address-space.ll b/‎llvm/test/CodeGen/R600/address-space.ll ‎llvm/test/CodeGen/AMDGPU/address-space.ll
diff --git a/‎llvm/test/CodeGen/R600/and.ll ‎llvm/test/CodeGen/AMDGPU/and.ll b/‎llvm/test/CodeGen/R600/and.ll ‎llvm/test/CodeGen/AMDGPU/and.ll
diff --git a/‎llvm/test/CodeGen/R600/anyext.ll ‎llvm/test/CodeGen/AMDGPU/anyext.ll b/‎llvm/test/CodeGen/R600/anyext.ll ‎llvm/test/CodeGen/AMDGPU/anyext.ll
diff --git a/‎llvm/test/CodeGen/R600/array-ptr-calc-i32.ll ‎llvm/test/CodeGen/AMDGPU/array-ptr-calc-i32.ll b/‎llvm/test/CodeGen/R600/array-ptr-calc-i32.ll ‎llvm/test/CodeGen/AMDGPU/array-ptr-calc-i32.ll
diff --git a/‎llvm/test/CodeGen/R600/array-ptr-calc-i64.ll ‎llvm/test/CodeGen/AMDGPU/array-ptr-calc-i64.ll b/‎llvm/test/CodeGen/R600/array-ptr-calc-i64.ll ‎llvm/test/CodeGen/AMDGPU/array-ptr-calc-i64.ll
diff --git a/‎llvm/test/CodeGen/R600/atomic_cmp_swap_local.ll ‎llvm/test/CodeGen/AMDGPU/atomic_cmp_swap_local.ll b/‎llvm/test/CodeGen/R600/atomic_cmp_swap_local.ll ‎llvm/test/CodeGen/AMDGPU/atomic_cmp_swap_local.ll
diff --git a/‎llvm/test/CodeGen/R600/atomic_load_add.ll ‎llvm/test/CodeGen/AMDGPU/atomic_load_add.ll b/‎llvm/test/CodeGen/R600/atomic_load_add.ll ‎llvm/test/CodeGen/AMDGPU/atomic_load_add.ll
diff --git a/‎llvm/test/CodeGen/R600/atomic_load_sub.ll ‎llvm/test/CodeGen/AMDGPU/atomic_load_sub.ll b/‎llvm/test/CodeGen/R600/atomic_load_sub.ll ‎llvm/test/CodeGen/AMDGPU/atomic_load_sub.ll
diff --git a/‎llvm/test/CodeGen/R600/basic-branch.ll ‎llvm/test/CodeGen/AMDGPU/basic-branch.ll b/‎llvm/test/CodeGen/R600/basic-branch.ll ‎llvm/test/CodeGen/AMDGPU/basic-branch.ll
diff --git a/‎llvm/test/CodeGen/R600/basic-loop.ll ‎llvm/test/CodeGen/AMDGPU/basic-loop.ll b/‎llvm/test/CodeGen/R600/basic-loop.ll ‎llvm/test/CodeGen/AMDGPU/basic-loop.ll
diff --git a/‎llvm/test/CodeGen/R600/bfe_uint.ll ‎llvm/test/CodeGen/AMDGPU/bfe_uint.ll b/‎llvm/test/CodeGen/R600/bfe_uint.ll ‎llvm/test/CodeGen/AMDGPU/bfe_uint.ll
diff --git a/‎llvm/test/CodeGen/R600/bfi_int.ll ‎llvm/test/CodeGen/AMDGPU/bfi_int.ll b/‎llvm/test/CodeGen/R600/bfi_int.ll ‎llvm/test/CodeGen/AMDGPU/bfi_int.ll
diff --git a/‎llvm/test/CodeGen/R600/big_alu.ll ‎llvm/test/CodeGen/AMDGPU/big_alu.ll b/‎llvm/test/CodeGen/R600/big_alu.ll ‎llvm/test/CodeGen/AMDGPU/big_alu.ll
diff --git a/‎llvm/test/CodeGen/R600/bitcast.ll ‎llvm/test/CodeGen/AMDGPU/bitcast.ll b/‎llvm/test/CodeGen/R600/bitcast.ll ‎llvm/test/CodeGen/AMDGPU/bitcast.ll
diff --git a/‎llvm/test/CodeGen/R600/bswap.ll ‎llvm/test/CodeGen/AMDGPU/bswap.ll b/‎llvm/test/CodeGen/R600/bswap.ll ‎llvm/test/CodeGen/AMDGPU/bswap.ll
diff --git a/‎llvm/test/CodeGen/R600/build_vector.ll ‎llvm/test/CodeGen/AMDGPU/build_vector.ll b/‎llvm/test/CodeGen/R600/build_vector.ll ‎llvm/test/CodeGen/AMDGPU/build_vector.ll
diff --git a/‎llvm/test/CodeGen/R600/call.ll ‎llvm/test/CodeGen/AMDGPU/call.ll b/‎llvm/test/CodeGen/R600/call.ll ‎llvm/test/CodeGen/AMDGPU/call.ll
diff --git a/‎llvm/test/CodeGen/R600/call_fs.ll ‎llvm/test/CodeGen/AMDGPU/call_fs.ll b/‎llvm/test/CodeGen/R600/call_fs.ll ‎llvm/test/CodeGen/AMDGPU/call_fs.ll
diff --git a/‎llvm/test/CodeGen/R600/cayman-loop-bug.ll ‎llvm/test/CodeGen/AMDGPU/cayman-loop-bug.ll b/‎llvm/test/CodeGen/R600/cayman-loop-bug.ll ‎llvm/test/CodeGen/AMDGPU/cayman-loop-bug.ll
diff --git a/‎llvm/test/CodeGen/R600/cf-stack-bug.ll ‎llvm/test/CodeGen/AMDGPU/cf-stack-bug.ll b/‎llvm/test/CodeGen/R600/cf-stack-bug.ll ‎llvm/test/CodeGen/AMDGPU/cf-stack-bug.ll
diff --git a/‎llvm/test/CodeGen/R600/cf_end.ll ‎llvm/test/CodeGen/AMDGPU/cf_end.ll b/‎llvm/test/CodeGen/R600/cf_end.ll ‎llvm/test/CodeGen/AMDGPU/cf_end.ll
diff --git a/‎llvm/test/CodeGen/R600/cgp-addressing-modes.ll ‎llvm/test/CodeGen/AMDGPU/cgp-addressing-modes.ll b/‎llvm/test/CodeGen/R600/cgp-addressing-modes.ll ‎llvm/test/CodeGen/AMDGPU/cgp-addressing-modes.ll
diff --git a/‎llvm/test/CodeGen/R600/coalescer_remat.ll ‎llvm/test/CodeGen/AMDGPU/coalescer_remat.ll b/‎llvm/test/CodeGen/R600/coalescer_remat.ll ‎llvm/test/CodeGen/AMDGPU/coalescer_remat.ll
diff --git a/‎llvm/test/CodeGen/R600/codegen-prepare-addrmode-sext.ll ‎llvm/test/CodeGen/AMDGPU/codegen-prepare-addrmode-sext.ll b/‎llvm/test/CodeGen/R600/codegen-prepare-addrmode-sext.ll ‎llvm/test/CodeGen/AMDGPU/codegen-prepare-addrmode-sext.ll
diff --git a/‎llvm/test/CodeGen/R600/combine_vloads.ll ‎llvm/test/CodeGen/AMDGPU/combine_vloads.ll b/‎llvm/test/CodeGen/R600/combine_vloads.ll ‎llvm/test/CodeGen/AMDGPU/combine_vloads.ll
diff --git a/‎llvm/test/CodeGen/R600/commute-compares.ll ‎llvm/test/CodeGen/AMDGPU/commute-compares.ll b/‎llvm/test/CodeGen/R600/commute-compares.ll ‎llvm/test/CodeGen/AMDGPU/commute-compares.ll
diff --git a/‎llvm/test/CodeGen/R600/commute_modifiers.ll ‎llvm/test/CodeGen/AMDGPU/commute_modifiers.ll b/‎llvm/test/CodeGen/R600/commute_modifiers.ll ‎llvm/test/CodeGen/AMDGPU/commute_modifiers.ll
diff --git a/‎llvm/test/CodeGen/R600/complex-folding.ll ‎llvm/test/CodeGen/AMDGPU/complex-folding.ll b/‎llvm/test/CodeGen/R600/complex-folding.ll ‎llvm/test/CodeGen/AMDGPU/complex-folding.ll
diff --git a/‎llvm/test/CodeGen/R600/concat_vectors.ll ‎llvm/test/CodeGen/AMDGPU/concat_vectors.ll b/‎llvm/test/CodeGen/R600/concat_vectors.ll ‎llvm/test/CodeGen/AMDGPU/concat_vectors.ll
diff --git a/‎llvm/test/CodeGen/R600/copy-illegal-type.ll ‎llvm/test/CodeGen/AMDGPU/copy-illegal-type.ll b/‎llvm/test/CodeGen/R600/copy-illegal-type.ll ‎llvm/test/CodeGen/AMDGPU/copy-illegal-type.ll
diff --git a/‎llvm/test/CodeGen/R600/copy-to-reg.ll ‎llvm/test/CodeGen/AMDGPU/copy-to-reg.ll b/‎llvm/test/CodeGen/R600/copy-to-reg.ll ‎llvm/test/CodeGen/AMDGPU/copy-to-reg.ll
diff --git a/‎llvm/test/CodeGen/R600/ctlz_zero_undef.ll ‎llvm/test/CodeGen/AMDGPU/ctlz_zero_undef.ll b/‎llvm/test/CodeGen/R600/ctlz_zero_undef.ll ‎llvm/test/CodeGen/AMDGPU/ctlz_zero_undef.ll
diff --git a/‎llvm/test/CodeGen/R600/ctpop.ll ‎llvm/test/CodeGen/AMDGPU/ctpop.ll b/‎llvm/test/CodeGen/R600/ctpop.ll ‎llvm/test/CodeGen/AMDGPU/ctpop.ll
diff --git a/‎llvm/test/CodeGen/R600/ctpop64.ll ‎llvm/test/CodeGen/AMDGPU/ctpop64.ll b/‎llvm/test/CodeGen/R600/ctpop64.ll ‎llvm/test/CodeGen/AMDGPU/ctpop64.ll
diff --git a/‎llvm/test/CodeGen/R600/cttz_zero_undef.ll ‎llvm/test/CodeGen/AMDGPU/cttz_zero_undef.ll b/‎llvm/test/CodeGen/R600/cttz_zero_undef.ll ‎llvm/test/CodeGen/AMDGPU/cttz_zero_undef.ll
diff --git a/‎llvm/test/CodeGen/R600/cvt_f32_ubyte.ll ‎llvm/test/CodeGen/AMDGPU/cvt_f32_ubyte.ll b/‎llvm/test/CodeGen/R600/cvt_f32_ubyte.ll ‎llvm/test/CodeGen/AMDGPU/cvt_f32_ubyte.ll
diff --git a/‎llvm/test/CodeGen/R600/cvt_flr_i32_f32.ll ‎llvm/test/CodeGen/AMDGPU/cvt_flr_i32_f32.ll b/‎llvm/test/CodeGen/R600/cvt_flr_i32_f32.ll ‎llvm/test/CodeGen/AMDGPU/cvt_flr_i32_f32.ll
diff --git a/‎llvm/test/CodeGen/R600/cvt_rpi_i32_f32.ll ‎llvm/test/CodeGen/AMDGPU/cvt_rpi_i32_f32.ll b/‎llvm/test/CodeGen/R600/cvt_rpi_i32_f32.ll ‎llvm/test/CodeGen/AMDGPU/cvt_rpi_i32_f32.ll
diff --git a/‎llvm/test/CodeGen/R600/dagcombiner-bug-illegal-vec4-int-to-fp.ll ‎llvm/test/CodeGen/AMDGPU/dagcombiner-bug-illegal-vec4-int-to-fp.ll b/‎llvm/test/CodeGen/R600/dagcombiner-bug-illegal-vec4-int-to-fp.ll ‎llvm/test/CodeGen/AMDGPU/dagcombiner-bug-illegal-vec4-int-to-fp.ll
diff --git a/‎llvm/test/CodeGen/R600/debug.ll ‎llvm/test/CodeGen/AMDGPU/debug.ll b/‎llvm/test/CodeGen/R600/debug.ll ‎llvm/test/CodeGen/AMDGPU/debug.ll
diff --git a/‎llvm/test/CodeGen/R600/default-fp-mode.ll ‎llvm/test/CodeGen/AMDGPU/default-fp-mode.ll b/‎llvm/test/CodeGen/R600/default-fp-mode.ll ‎llvm/test/CodeGen/AMDGPU/default-fp-mode.ll
diff --git a/‎llvm/test/CodeGen/R600/disconnected-predset-break-bug.ll ‎llvm/test/CodeGen/AMDGPU/disconnected-predset-break-bug.ll b/‎llvm/test/CodeGen/R600/disconnected-predset-break-bug.ll ‎llvm/test/CodeGen/AMDGPU/disconnected-predset-break-bug.ll
diff --git a/‎llvm/test/CodeGen/R600/dot4-folding.ll ‎llvm/test/CodeGen/AMDGPU/dot4-folding.ll b/‎llvm/test/CodeGen/R600/dot4-folding.ll ‎llvm/test/CodeGen/AMDGPU/dot4-folding.ll
diff --git a/‎llvm/test/CodeGen/R600/ds-negative-offset-addressing-mode-loop.ll ‎llvm/test/CodeGen/AMDGPU/ds-negative-offset-addressing-mode-loop.ll b/‎llvm/test/CodeGen/R600/ds-negative-offset-addressing-mode-loop.ll ‎llvm/test/CodeGen/AMDGPU/ds-negative-offset-addressing-mode-loop.ll
diff --git a/‎llvm/test/CodeGen/R600/ds_read2.ll ‎llvm/test/CodeGen/AMDGPU/ds_read2.ll b/‎llvm/test/CodeGen/R600/ds_read2.ll ‎llvm/test/CodeGen/AMDGPU/ds_read2.ll
diff --git a/‎llvm/test/CodeGen/R600/ds_read2_offset_order.ll ‎llvm/test/CodeGen/AMDGPU/ds_read2_offset_order.ll b/‎llvm/test/CodeGen/R600/ds_read2_offset_order.ll ‎llvm/test/CodeGen/AMDGPU/ds_read2_offset_order.ll
diff --git a/‎llvm/test/CodeGen/R600/ds_read2st64.ll ‎llvm/test/CodeGen/AMDGPU/ds_read2st64.ll b/‎llvm/test/CodeGen/R600/ds_read2st64.ll ‎llvm/test/CodeGen/AMDGPU/ds_read2st64.ll
diff --git a/‎llvm/test/CodeGen/R600/ds_write2.ll ‎llvm/test/CodeGen/AMDGPU/ds_write2.ll b/‎llvm/test/CodeGen/R600/ds_write2.ll ‎llvm/test/CodeGen/AMDGPU/ds_write2.ll
diff --git a/‎llvm/test/CodeGen/R600/ds_write2st64.ll ‎llvm/test/CodeGen/AMDGPU/ds_write2st64.ll b/‎llvm/test/CodeGen/R600/ds_write2st64.ll ‎llvm/test/CodeGen/AMDGPU/ds_write2st64.ll
diff --git a/‎llvm/test/CodeGen/R600/elf.ll ‎llvm/test/CodeGen/AMDGPU/elf.ll b/‎llvm/test/CodeGen/R600/elf.ll ‎llvm/test/CodeGen/AMDGPU/elf.ll
diff --git a/‎llvm/test/CodeGen/R600/elf.r600.ll ‎llvm/test/CodeGen/AMDGPU/elf.r600.ll b/‎llvm/test/CodeGen/R600/elf.r600.ll ‎llvm/test/CodeGen/AMDGPU/elf.r600.ll
diff --git a/‎llvm/test/CodeGen/R600/empty-function.ll ‎llvm/test/CodeGen/AMDGPU/empty-function.ll b/‎llvm/test/CodeGen/R600/empty-function.ll ‎llvm/test/CodeGen/AMDGPU/empty-function.ll
diff --git a/‎llvm/test/CodeGen/R600/endcf-loop-header.ll ‎llvm/test/CodeGen/AMDGPU/endcf-loop-header.ll b/‎llvm/test/CodeGen/R600/endcf-loop-header.ll ‎llvm/test/CodeGen/AMDGPU/endcf-loop-header.ll
diff --git a/‎llvm/test/CodeGen/R600/extload-private.ll ‎llvm/test/CodeGen/AMDGPU/extload-private.ll b/‎llvm/test/CodeGen/R600/extload-private.ll ‎llvm/test/CodeGen/AMDGPU/extload-private.ll
diff --git a/‎llvm/test/CodeGen/R600/extload.ll ‎llvm/test/CodeGen/AMDGPU/extload.ll b/‎llvm/test/CodeGen/R600/extload.ll ‎llvm/test/CodeGen/AMDGPU/extload.ll
diff --git a/‎llvm/test/CodeGen/R600/extract_vector_elt_i16.ll ‎llvm/test/CodeGen/AMDGPU/extract_vector_elt_i16.ll b/‎llvm/test/CodeGen/R600/extract_vector_elt_i16.ll ‎llvm/test/CodeGen/AMDGPU/extract_vector_elt_i16.ll
diff --git a/‎llvm/test/CodeGen/R600/fabs.f64.ll ‎llvm/test/CodeGen/AMDGPU/fabs.f64.ll b/‎llvm/test/CodeGen/R600/fabs.f64.ll ‎llvm/test/CodeGen/AMDGPU/fabs.f64.ll
diff --git a/‎llvm/test/CodeGen/R600/fabs.ll ‎llvm/test/CodeGen/AMDGPU/fabs.ll b/‎llvm/test/CodeGen/R600/fabs.ll ‎llvm/test/CodeGen/AMDGPU/fabs.ll
diff --git a/‎llvm/test/CodeGen/R600/fadd.ll ‎llvm/test/CodeGen/AMDGPU/fadd.ll b/‎llvm/test/CodeGen/R600/fadd.ll ‎llvm/test/CodeGen/AMDGPU/fadd.ll
diff --git a/‎llvm/test/CodeGen/R600/fadd64.ll ‎llvm/test/CodeGen/AMDGPU/fadd64.ll b/‎llvm/test/CodeGen/R600/fadd64.ll ‎llvm/test/CodeGen/AMDGPU/fadd64.ll
diff --git a/‎llvm/test/CodeGen/R600/fceil.ll ‎llvm/test/CodeGen/AMDGPU/fceil.ll b/‎llvm/test/CodeGen/R600/fceil.ll ‎llvm/test/CodeGen/AMDGPU/fceil.ll
diff --git a/‎llvm/test/CodeGen/R600/fceil64.ll ‎llvm/test/CodeGen/AMDGPU/fceil64.ll b/‎llvm/test/CodeGen/R600/fceil64.ll ‎llvm/test/CodeGen/AMDGPU/fceil64.ll
diff --git a/‎llvm/test/CodeGen/R600/fcmp-cnd.ll ‎llvm/test/CodeGen/AMDGPU/fcmp-cnd.ll b/‎llvm/test/CodeGen/R600/fcmp-cnd.ll ‎llvm/test/CodeGen/AMDGPU/fcmp-cnd.ll
diff --git a/‎llvm/test/CodeGen/R600/fcmp-cnde-int-args.ll ‎llvm/test/CodeGen/AMDGPU/fcmp-cnde-int-args.ll b/‎llvm/test/CodeGen/R600/fcmp-cnde-int-args.ll ‎llvm/test/CodeGen/AMDGPU/fcmp-cnde-int-args.ll
diff --git a/‎llvm/test/CodeGen/R600/fcmp.ll ‎llvm/test/CodeGen/AMDGPU/fcmp.ll b/‎llvm/test/CodeGen/R600/fcmp.ll ‎llvm/test/CodeGen/AMDGPU/fcmp.ll
diff --git a/‎llvm/test/CodeGen/R600/fcmp64.ll ‎llvm/test/CodeGen/AMDGPU/fcmp64.ll b/‎llvm/test/CodeGen/R600/fcmp64.ll ‎llvm/test/CodeGen/AMDGPU/fcmp64.ll
diff --git a/‎llvm/test/CodeGen/R600/fconst64.ll ‎llvm/test/CodeGen/AMDGPU/fconst64.ll b/‎llvm/test/CodeGen/R600/fconst64.ll ‎llvm/test/CodeGen/AMDGPU/fconst64.ll
diff --git a/‎llvm/test/CodeGen/R600/fcopysign.f32.ll ‎llvm/test/CodeGen/AMDGPU/fcopysign.f32.ll b/‎llvm/test/CodeGen/R600/fcopysign.f32.ll ‎llvm/test/CodeGen/AMDGPU/fcopysign.f32.ll
diff --git a/‎llvm/test/CodeGen/R600/fcopysign.f64.ll ‎llvm/test/CodeGen/AMDGPU/fcopysign.f64.ll b/‎llvm/test/CodeGen/R600/fcopysign.f64.ll ‎llvm/test/CodeGen/AMDGPU/fcopysign.f64.ll
diff --git a/‎llvm/test/CodeGen/R600/fdiv.f64.ll ‎llvm/test/CodeGen/AMDGPU/fdiv.f64.ll b/‎llvm/test/CodeGen/R600/fdiv.f64.ll ‎llvm/test/CodeGen/AMDGPU/fdiv.f64.ll
diff --git a/‎llvm/test/CodeGen/R600/fdiv.ll ‎llvm/test/CodeGen/AMDGPU/fdiv.ll b/‎llvm/test/CodeGen/R600/fdiv.ll ‎llvm/test/CodeGen/AMDGPU/fdiv.ll
diff --git a/‎llvm/test/CodeGen/R600/fetch-limits.r600.ll ‎llvm/test/CodeGen/AMDGPU/fetch-limits.r600.ll b/‎llvm/test/CodeGen/R600/fetch-limits.r600.ll ‎llvm/test/CodeGen/AMDGPU/fetch-limits.r600.ll
diff --git a/‎llvm/test/CodeGen/R600/fetch-limits.r700+.ll ‎llvm/test/CodeGen/AMDGPU/fetch-limits.r700+.ll b/‎llvm/test/CodeGen/R600/fetch-limits.r700+.ll ‎llvm/test/CodeGen/AMDGPU/fetch-limits.r700+.ll
diff --git a/‎llvm/test/CodeGen/R600/ffloor.f64.ll ‎llvm/test/CodeGen/AMDGPU/ffloor.f64.ll b/‎llvm/test/CodeGen/R600/ffloor.f64.ll ‎llvm/test/CodeGen/AMDGPU/ffloor.f64.ll
diff --git a/‎llvm/test/CodeGen/R600/ffloor.ll ‎llvm/test/CodeGen/AMDGPU/ffloor.ll b/‎llvm/test/CodeGen/R600/ffloor.ll ‎llvm/test/CodeGen/AMDGPU/ffloor.ll
diff --git a/‎llvm/test/CodeGen/R600/flat-address-space.ll ‎llvm/test/CodeGen/AMDGPU/flat-address-space.ll b/‎llvm/test/CodeGen/R600/flat-address-space.ll ‎llvm/test/CodeGen/AMDGPU/flat-address-space.ll
diff --git a/‎llvm/test/CodeGen/R600/floor.ll ‎llvm/test/CodeGen/AMDGPU/floor.ll b/‎llvm/test/CodeGen/R600/floor.ll ‎llvm/test/CodeGen/AMDGPU/floor.ll
diff --git a/‎llvm/test/CodeGen/R600/fma-combine.ll ‎llvm/test/CodeGen/AMDGPU/fma-combine.ll b/‎llvm/test/CodeGen/R600/fma-combine.ll ‎llvm/test/CodeGen/AMDGPU/fma-combine.ll
diff --git a/‎llvm/test/CodeGen/R600/fma.f64.ll ‎llvm/test/CodeGen/AMDGPU/fma.f64.ll b/‎llvm/test/CodeGen/R600/fma.f64.ll ‎llvm/test/CodeGen/AMDGPU/fma.f64.ll
diff --git a/‎llvm/test/CodeGen/R600/fma.ll ‎llvm/test/CodeGen/AMDGPU/fma.ll b/‎llvm/test/CodeGen/R600/fma.ll ‎llvm/test/CodeGen/AMDGPU/fma.ll
diff --git a/‎llvm/test/CodeGen/R600/fmad.ll ‎llvm/test/CodeGen/AMDGPU/fmad.ll b/‎llvm/test/CodeGen/R600/fmad.ll ‎llvm/test/CodeGen/AMDGPU/fmad.ll
diff --git a/‎llvm/test/CodeGen/R600/fmax.ll ‎llvm/test/CodeGen/AMDGPU/fmax.ll b/‎llvm/test/CodeGen/R600/fmax.ll ‎llvm/test/CodeGen/AMDGPU/fmax.ll
diff --git a/‎llvm/test/CodeGen/R600/fmax3.f64.ll ‎llvm/test/CodeGen/AMDGPU/fmax3.f64.ll b/‎llvm/test/CodeGen/R600/fmax3.f64.ll ‎llvm/test/CodeGen/AMDGPU/fmax3.f64.ll
diff --git a/‎llvm/test/CodeGen/R600/fmax3.ll ‎llvm/test/CodeGen/AMDGPU/fmax3.ll b/‎llvm/test/CodeGen/R600/fmax3.ll ‎llvm/test/CodeGen/AMDGPU/fmax3.ll
diff --git a/‎llvm/test/CodeGen/R600/fmax_legacy.f64.ll ‎llvm/test/CodeGen/AMDGPU/fmax_legacy.f64.ll b/‎llvm/test/CodeGen/R600/fmax_legacy.f64.ll ‎llvm/test/CodeGen/AMDGPU/fmax_legacy.f64.ll
diff --git a/‎llvm/test/CodeGen/R600/fmax_legacy.ll ‎llvm/test/CodeGen/AMDGPU/fmax_legacy.ll b/‎llvm/test/CodeGen/R600/fmax_legacy.ll ‎llvm/test/CodeGen/AMDGPU/fmax_legacy.ll
diff --git a/‎llvm/test/CodeGen/R600/fmaxnum.f64.ll ‎llvm/test/CodeGen/AMDGPU/fmaxnum.f64.ll b/‎llvm/test/CodeGen/R600/fmaxnum.f64.ll ‎llvm/test/CodeGen/AMDGPU/fmaxnum.f64.ll
diff --git a/‎llvm/test/CodeGen/R600/fmaxnum.ll ‎llvm/test/CodeGen/AMDGPU/fmaxnum.ll b/‎llvm/test/CodeGen/R600/fmaxnum.ll ‎llvm/test/CodeGen/AMDGPU/fmaxnum.ll
diff --git a/‎llvm/test/CodeGen/R600/fmin.ll ‎llvm/test/CodeGen/AMDGPU/fmin.ll b/‎llvm/test/CodeGen/R600/fmin.ll ‎llvm/test/CodeGen/AMDGPU/fmin.ll
diff --git a/‎llvm/test/CodeGen/R600/fmin3.ll ‎llvm/test/CodeGen/AMDGPU/fmin3.ll b/‎llvm/test/CodeGen/R600/fmin3.ll ‎llvm/test/CodeGen/AMDGPU/fmin3.ll
diff --git a/‎llvm/test/CodeGen/R600/fmin_legacy.f64.ll ‎llvm/test/CodeGen/AMDGPU/fmin_legacy.f64.ll b/‎llvm/test/CodeGen/R600/fmin_legacy.f64.ll ‎llvm/test/CodeGen/AMDGPU/fmin_legacy.f64.ll
diff --git a/‎llvm/test/CodeGen/R600/fmin_legacy.ll ‎llvm/test/CodeGen/AMDGPU/fmin_legacy.ll b/‎llvm/test/CodeGen/R600/fmin_legacy.ll ‎llvm/test/CodeGen/AMDGPU/fmin_legacy.ll
diff --git a/‎llvm/test/CodeGen/R600/fminnum.f64.ll ‎llvm/test/CodeGen/AMDGPU/fminnum.f64.ll b/‎llvm/test/CodeGen/R600/fminnum.f64.ll ‎llvm/test/CodeGen/AMDGPU/fminnum.f64.ll
diff --git a/‎llvm/test/CodeGen/R600/fminnum.ll ‎llvm/test/CodeGen/AMDGPU/fminnum.ll b/‎llvm/test/CodeGen/R600/fminnum.ll ‎llvm/test/CodeGen/AMDGPU/fminnum.ll
diff --git a/‎llvm/test/CodeGen/R600/fmul.ll ‎llvm/test/CodeGen/AMDGPU/fmul.ll b/‎llvm/test/CodeGen/R600/fmul.ll ‎llvm/test/CodeGen/AMDGPU/fmul.ll
diff --git a/‎llvm/test/CodeGen/R600/fmul64.ll ‎llvm/test/CodeGen/AMDGPU/fmul64.ll b/‎llvm/test/CodeGen/R600/fmul64.ll ‎llvm/test/CodeGen/AMDGPU/fmul64.ll
diff --git a/‎llvm/test/CodeGen/R600/fmuladd.ll ‎llvm/test/CodeGen/AMDGPU/fmuladd.ll b/‎llvm/test/CodeGen/R600/fmuladd.ll ‎llvm/test/CodeGen/AMDGPU/fmuladd.ll
diff --git a/‎llvm/test/CodeGen/R600/fnearbyint.ll ‎llvm/test/CodeGen/AMDGPU/fnearbyint.ll b/‎llvm/test/CodeGen/R600/fnearbyint.ll ‎llvm/test/CodeGen/AMDGPU/fnearbyint.ll
diff --git a/‎llvm/test/CodeGen/R600/fneg-fabs.f64.ll ‎llvm/test/CodeGen/AMDGPU/fneg-fabs.f64.ll b/‎llvm/test/CodeGen/R600/fneg-fabs.f64.ll ‎llvm/test/CodeGen/AMDGPU/fneg-fabs.f64.ll
diff --git a/‎llvm/test/CodeGen/R600/fneg-fabs.ll ‎llvm/test/CodeGen/AMDGPU/fneg-fabs.ll b/‎llvm/test/CodeGen/R600/fneg-fabs.ll ‎llvm/test/CodeGen/AMDGPU/fneg-fabs.ll
diff --git a/‎llvm/test/CodeGen/R600/fneg.f64.ll ‎llvm/test/CodeGen/AMDGPU/fneg.f64.ll b/‎llvm/test/CodeGen/R600/fneg.f64.ll ‎llvm/test/CodeGen/AMDGPU/fneg.f64.ll
diff --git a/‎llvm/test/CodeGen/R600/fneg.ll ‎llvm/test/CodeGen/AMDGPU/fneg.ll b/‎llvm/test/CodeGen/R600/fneg.ll ‎llvm/test/CodeGen/AMDGPU/fneg.ll
diff --git a/‎llvm/test/CodeGen/R600/fp-classify.ll ‎llvm/test/CodeGen/AMDGPU/fp-classify.ll b/‎llvm/test/CodeGen/R600/fp-classify.ll ‎llvm/test/CodeGen/AMDGPU/fp-classify.ll
diff --git a/‎llvm/test/CodeGen/R600/fp16_to_fp.ll ‎llvm/test/CodeGen/AMDGPU/fp16_to_fp.ll b/‎llvm/test/CodeGen/R600/fp16_to_fp.ll ‎llvm/test/CodeGen/AMDGPU/fp16_to_fp.ll
diff --git a/‎llvm/test/CodeGen/R600/fp32_to_fp16.ll ‎llvm/test/CodeGen/AMDGPU/fp32_to_fp16.ll b/‎llvm/test/CodeGen/R600/fp32_to_fp16.ll ‎llvm/test/CodeGen/AMDGPU/fp32_to_fp16.ll
diff --git a/‎llvm/test/CodeGen/R600/fp_to_sint.f64.ll ‎llvm/test/CodeGen/AMDGPU/fp_to_sint.f64.ll b/‎llvm/test/CodeGen/R600/fp_to_sint.f64.ll ‎llvm/test/CodeGen/AMDGPU/fp_to_sint.f64.ll
diff --git a/‎llvm/test/CodeGen/R600/fp_to_sint.ll ‎llvm/test/CodeGen/AMDGPU/fp_to_sint.ll b/‎llvm/test/CodeGen/R600/fp_to_sint.ll ‎llvm/test/CodeGen/AMDGPU/fp_to_sint.ll
diff --git a/‎llvm/test/CodeGen/R600/fp_to_uint.f64.ll ‎llvm/test/CodeGen/AMDGPU/fp_to_uint.f64.ll b/‎llvm/test/CodeGen/R600/fp_to_uint.f64.ll ‎llvm/test/CodeGen/AMDGPU/fp_to_uint.f64.ll
diff --git a/‎llvm/test/CodeGen/R600/fp_to_uint.ll ‎llvm/test/CodeGen/AMDGPU/fp_to_uint.ll b/‎llvm/test/CodeGen/R600/fp_to_uint.ll ‎llvm/test/CodeGen/AMDGPU/fp_to_uint.ll
diff --git a/‎llvm/test/CodeGen/R600/fpext.ll ‎llvm/test/CodeGen/AMDGPU/fpext.ll b/‎llvm/test/CodeGen/R600/fpext.ll ‎llvm/test/CodeGen/AMDGPU/fpext.ll
diff --git a/‎llvm/test/CodeGen/R600/fptrunc.ll ‎llvm/test/CodeGen/AMDGPU/fptrunc.ll b/‎llvm/test/CodeGen/R600/fptrunc.ll ‎llvm/test/CodeGen/AMDGPU/fptrunc.ll
diff --git a/‎llvm/test/CodeGen/R600/frem.ll ‎llvm/test/CodeGen/AMDGPU/frem.ll b/‎llvm/test/CodeGen/R600/frem.ll ‎llvm/test/CodeGen/AMDGPU/frem.ll
diff --git a/‎llvm/test/CodeGen/R600/fsqrt.ll ‎llvm/test/CodeGen/AMDGPU/fsqrt.ll b/‎llvm/test/CodeGen/R600/fsqrt.ll ‎llvm/test/CodeGen/AMDGPU/fsqrt.ll
diff --git a/‎llvm/test/CodeGen/R600/fsub.ll ‎llvm/test/CodeGen/AMDGPU/fsub.ll b/‎llvm/test/CodeGen/R600/fsub.ll ‎llvm/test/CodeGen/AMDGPU/fsub.ll
diff --git a/‎llvm/test/CodeGen/R600/fsub64.ll ‎llvm/test/CodeGen/AMDGPU/fsub64.ll b/‎llvm/test/CodeGen/R600/fsub64.ll ‎llvm/test/CodeGen/AMDGPU/fsub64.ll
diff --git a/‎llvm/test/CodeGen/R600/ftrunc.f64.ll ‎llvm/test/CodeGen/AMDGPU/ftrunc.f64.ll b/‎llvm/test/CodeGen/R600/ftrunc.f64.ll ‎llvm/test/CodeGen/AMDGPU/ftrunc.f64.ll
diff --git a/‎llvm/test/CodeGen/R600/ftrunc.ll ‎llvm/test/CodeGen/AMDGPU/ftrunc.ll b/‎llvm/test/CodeGen/R600/ftrunc.ll ‎llvm/test/CodeGen/AMDGPU/ftrunc.ll
diff --git a/‎llvm/test/CodeGen/R600/gep-address-space.ll ‎llvm/test/CodeGen/AMDGPU/gep-address-space.ll b/‎llvm/test/CodeGen/R600/gep-address-space.ll ‎llvm/test/CodeGen/AMDGPU/gep-address-space.ll
diff --git a/‎llvm/test/CodeGen/R600/global-directive.ll ‎llvm/test/CodeGen/AMDGPU/global-directive.ll b/‎llvm/test/CodeGen/R600/global-directive.ll ‎llvm/test/CodeGen/AMDGPU/global-directive.ll
diff --git a/‎llvm/test/CodeGen/R600/global-extload-i1.ll ‎llvm/test/CodeGen/AMDGPU/global-extload-i1.ll b/‎llvm/test/CodeGen/R600/global-extload-i1.ll ‎llvm/test/CodeGen/AMDGPU/global-extload-i1.ll
diff --git a/‎llvm/test/CodeGen/R600/global-extload-i16.ll ‎llvm/test/CodeGen/AMDGPU/global-extload-i16.ll b/‎llvm/test/CodeGen/R600/global-extload-i16.ll ‎llvm/test/CodeGen/AMDGPU/global-extload-i16.ll
diff --git a/‎llvm/test/CodeGen/R600/global-extload-i32.ll ‎llvm/test/CodeGen/AMDGPU/global-extload-i32.ll b/‎llvm/test/CodeGen/R600/global-extload-i32.ll ‎llvm/test/CodeGen/AMDGPU/global-extload-i32.ll
diff --git a/‎llvm/test/CodeGen/R600/global-extload-i8.ll ‎llvm/test/CodeGen/AMDGPU/global-extload-i8.ll b/‎llvm/test/CodeGen/R600/global-extload-i8.ll ‎llvm/test/CodeGen/AMDGPU/global-extload-i8.ll
diff --git a/‎llvm/test/CodeGen/R600/global-zero-initializer.ll ‎llvm/test/CodeGen/AMDGPU/global-zero-initializer.ll b/‎llvm/test/CodeGen/R600/global-zero-initializer.ll ‎llvm/test/CodeGen/AMDGPU/global-zero-initializer.ll
diff --git a/‎llvm/test/CodeGen/R600/global_atomics.ll ‎llvm/test/CodeGen/AMDGPU/global_atomics.ll b/‎llvm/test/CodeGen/R600/global_atomics.ll ‎llvm/test/CodeGen/AMDGPU/global_atomics.ll
diff --git a/‎llvm/test/CodeGen/R600/gv-const-addrspace-fail.ll ‎llvm/test/CodeGen/AMDGPU/gv-const-addrspace-fail.ll b/‎llvm/test/CodeGen/R600/gv-const-addrspace-fail.ll ‎llvm/test/CodeGen/AMDGPU/gv-const-addrspace-fail.ll
diff --git a/‎llvm/test/CodeGen/R600/gv-const-addrspace.ll ‎llvm/test/CodeGen/AMDGPU/gv-const-addrspace.ll b/‎llvm/test/CodeGen/R600/gv-const-addrspace.ll ‎llvm/test/CodeGen/AMDGPU/gv-const-addrspace.ll
diff --git a/‎llvm/test/CodeGen/R600/half.ll ‎llvm/test/CodeGen/AMDGPU/half.ll b/‎llvm/test/CodeGen/R600/half.ll ‎llvm/test/CodeGen/AMDGPU/half.ll
diff --git a/‎llvm/test/CodeGen/R600/hsa.ll ‎llvm/test/CodeGen/AMDGPU/hsa.ll b/‎llvm/test/CodeGen/R600/hsa.ll ‎llvm/test/CodeGen/AMDGPU/hsa.ll
diff --git a/‎llvm/test/CodeGen/R600/i1-copy-implicit-def.ll ‎llvm/test/CodeGen/AMDGPU/i1-copy-implicit-def.ll b/‎llvm/test/CodeGen/R600/i1-copy-implicit-def.ll ‎llvm/test/CodeGen/AMDGPU/i1-copy-implicit-def.ll
diff --git a/‎llvm/test/CodeGen/R600/i1-copy-phi.ll ‎llvm/test/CodeGen/AMDGPU/i1-copy-phi.ll b/‎llvm/test/CodeGen/R600/i1-copy-phi.ll ‎llvm/test/CodeGen/AMDGPU/i1-copy-phi.ll
diff --git a/‎llvm/test/CodeGen/R600/i8-to-double-to-float.ll ‎llvm/test/CodeGen/AMDGPU/i8-to-double-to-float.ll b/‎llvm/test/CodeGen/R600/i8-to-double-to-float.ll ‎llvm/test/CodeGen/AMDGPU/i8-to-double-to-float.ll
diff --git a/‎llvm/test/CodeGen/R600/icmp-select-sete-reverse-args.ll ‎llvm/test/CodeGen/AMDGPU/icmp-select-sete-reverse-args.ll b/‎llvm/test/CodeGen/R600/icmp-select-sete-reverse-args.ll ‎llvm/test/CodeGen/AMDGPU/icmp-select-sete-reverse-args.ll
diff --git a/‎llvm/test/CodeGen/R600/icmp64.ll ‎llvm/test/CodeGen/AMDGPU/icmp64.ll b/‎llvm/test/CodeGen/R600/icmp64.ll ‎llvm/test/CodeGen/AMDGPU/icmp64.ll
diff --git a/‎llvm/test/CodeGen/R600/imm.ll ‎llvm/test/CodeGen/AMDGPU/imm.ll b/‎llvm/test/CodeGen/R600/imm.ll ‎llvm/test/CodeGen/AMDGPU/imm.ll
diff --git a/‎llvm/test/CodeGen/R600/indirect-addressing-si.ll ‎llvm/test/CodeGen/AMDGPU/indirect-addressing-si.ll b/‎llvm/test/CodeGen/R600/indirect-addressing-si.ll ‎llvm/test/CodeGen/AMDGPU/indirect-addressing-si.ll
diff --git a/‎llvm/test/CodeGen/R600/indirect-private-64.ll ‎llvm/test/CodeGen/AMDGPU/indirect-private-64.ll b/‎llvm/test/CodeGen/R600/indirect-private-64.ll ‎llvm/test/CodeGen/AMDGPU/indirect-private-64.ll
diff --git a/‎llvm/test/CodeGen/R600/infinite-loop-evergreen.ll ‎llvm/test/CodeGen/AMDGPU/infinite-loop-evergreen.ll b/‎llvm/test/CodeGen/R600/infinite-loop-evergreen.ll ‎llvm/test/CodeGen/AMDGPU/infinite-loop-evergreen.ll
diff --git a/‎llvm/test/CodeGen/R600/infinite-loop.ll ‎llvm/test/CodeGen/AMDGPU/infinite-loop.ll b/‎llvm/test/CodeGen/R600/infinite-loop.ll ‎llvm/test/CodeGen/AMDGPU/infinite-loop.ll
diff --git a/‎llvm/test/CodeGen/R600/inline-asm.ll ‎llvm/test/CodeGen/AMDGPU/inline-asm.ll b/‎llvm/test/CodeGen/R600/inline-asm.ll ‎llvm/test/CodeGen/AMDGPU/inline-asm.ll
diff --git a/‎llvm/test/CodeGen/R600/inline-calls.ll ‎llvm/test/CodeGen/AMDGPU/inline-calls.ll b/‎llvm/test/CodeGen/R600/inline-calls.ll ‎llvm/test/CodeGen/AMDGPU/inline-calls.ll
diff --git a/‎llvm/test/CodeGen/R600/input-mods.ll ‎llvm/test/CodeGen/AMDGPU/input-mods.ll b/‎llvm/test/CodeGen/R600/input-mods.ll ‎llvm/test/CodeGen/AMDGPU/input-mods.ll
diff --git a/‎llvm/test/CodeGen/R600/insert_subreg.ll ‎llvm/test/CodeGen/AMDGPU/insert_subreg.ll b/‎llvm/test/CodeGen/R600/insert_subreg.ll ‎llvm/test/CodeGen/AMDGPU/insert_subreg.ll
diff --git a/‎llvm/test/CodeGen/R600/insert_vector_elt.ll ‎llvm/test/CodeGen/AMDGPU/insert_vector_elt.ll b/‎llvm/test/CodeGen/R600/insert_vector_elt.ll ‎llvm/test/CodeGen/AMDGPU/insert_vector_elt.ll
diff --git a/‎llvm/test/CodeGen/R600/jump-address.ll ‎llvm/test/CodeGen/AMDGPU/jump-address.ll b/‎llvm/test/CodeGen/R600/jump-address.ll ‎llvm/test/CodeGen/AMDGPU/jump-address.ll
diff --git a/‎llvm/test/CodeGen/R600/kcache-fold.ll ‎llvm/test/CodeGen/AMDGPU/kcache-fold.ll b/‎llvm/test/CodeGen/R600/kcache-fold.ll ‎llvm/test/CodeGen/AMDGPU/kcache-fold.ll
diff --git a/‎llvm/test/CodeGen/R600/kernel-args.ll ‎llvm/test/CodeGen/AMDGPU/kernel-args.ll b/‎llvm/test/CodeGen/R600/kernel-args.ll ‎llvm/test/CodeGen/AMDGPU/kernel-args.ll
diff --git a/‎llvm/test/CodeGen/R600/large-alloca.ll ‎llvm/test/CodeGen/AMDGPU/large-alloca.ll b/‎llvm/test/CodeGen/R600/large-alloca.ll ‎llvm/test/CodeGen/AMDGPU/large-alloca.ll
diff --git a/‎llvm/test/CodeGen/R600/large-constant-initializer.ll ‎llvm/test/CodeGen/AMDGPU/large-constant-initializer.ll b/‎llvm/test/CodeGen/R600/large-constant-initializer.ll ‎llvm/test/CodeGen/AMDGPU/large-constant-initializer.ll
diff --git a/‎llvm/test/CodeGen/R600/lds-initializer.ll ‎llvm/test/CodeGen/AMDGPU/lds-initializer.ll b/‎llvm/test/CodeGen/R600/lds-initializer.ll ‎llvm/test/CodeGen/AMDGPU/lds-initializer.ll
diff --git a/‎llvm/test/CodeGen/R600/lds-oqap-crash.ll ‎llvm/test/CodeGen/AMDGPU/lds-oqap-crash.ll b/‎llvm/test/CodeGen/R600/lds-oqap-crash.ll ‎llvm/test/CodeGen/AMDGPU/lds-oqap-crash.ll
diff --git a/‎llvm/test/CodeGen/R600/lds-output-queue.ll ‎llvm/test/CodeGen/AMDGPU/lds-output-queue.ll b/‎llvm/test/CodeGen/R600/lds-output-queue.ll ‎llvm/test/CodeGen/AMDGPU/lds-output-queue.ll
diff --git a/‎llvm/test/CodeGen/R600/lds-size.ll ‎llvm/test/CodeGen/AMDGPU/lds-size.ll b/‎llvm/test/CodeGen/R600/lds-size.ll ‎llvm/test/CodeGen/AMDGPU/lds-size.ll
diff --git a/‎llvm/test/CodeGen/R600/lds-zero-initializer.ll ‎llvm/test/CodeGen/AMDGPU/lds-zero-initializer.ll b/‎llvm/test/CodeGen/R600/lds-zero-initializer.ll ‎llvm/test/CodeGen/AMDGPU/lds-zero-initializer.ll
diff --git a/‎llvm/test/CodeGen/R600/legalizedag-bug-expand-setcc.ll ‎llvm/test/CodeGen/AMDGPU/legalizedag-bug-expand-setcc.ll b/‎llvm/test/CodeGen/R600/legalizedag-bug-expand-setcc.ll ‎llvm/test/CodeGen/AMDGPU/legalizedag-bug-expand-setcc.ll
diff --git a/‎llvm/test/CodeGen/AMDGPU/lit.local.cfg
+2 b/‎llvm/test/CodeGen/AMDGPU/lit.local.cfg
+2
diff --git a/‎llvm/test/CodeGen/R600/literals.ll ‎llvm/test/CodeGen/AMDGPU/literals.ll b/‎llvm/test/CodeGen/R600/literals.ll ‎llvm/test/CodeGen/AMDGPU/literals.ll
diff --git a/‎llvm/test/CodeGen/R600/llvm.AMDGPU.abs.ll ‎llvm/test/CodeGen/AMDGPU/llvm.AMDGPU.abs.ll b/‎llvm/test/CodeGen/R600/llvm.AMDGPU.abs.ll ‎llvm/test/CodeGen/AMDGPU/llvm.AMDGPU.abs.ll
diff --git a/‎llvm/test/CodeGen/R600/llvm.AMDGPU.barrier.global.ll ‎llvm/test/CodeGen/AMDGPU/llvm.AMDGPU.barrier.global.ll b/‎llvm/test/CodeGen/R600/llvm.AMDGPU.barrier.global.ll ‎llvm/test/CodeGen/AMDGPU/llvm.AMDGPU.barrier.global.ll
diff --git a/‎llvm/test/CodeGen/R600/llvm.AMDGPU.barrier.local.ll ‎llvm/test/CodeGen/AMDGPU/llvm.AMDGPU.barrier.local.ll b/‎llvm/test/CodeGen/R600/llvm.AMDGPU.barrier.local.ll ‎llvm/test/CodeGen/AMDGPU/llvm.AMDGPU.barrier.local.ll
diff --git a/‎llvm/test/CodeGen/R600/llvm.AMDGPU.bfe.i32.ll ‎llvm/test/CodeGen/AMDGPU/llvm.AMDGPU.bfe.i32.ll b/‎llvm/test/CodeGen/R600/llvm.AMDGPU.bfe.i32.ll ‎llvm/test/CodeGen/AMDGPU/llvm.AMDGPU.bfe.i32.ll
diff --git a/‎llvm/test/CodeGen/R600/llvm.AMDGPU.bfe.u32.ll ‎llvm/test/CodeGen/AMDGPU/llvm.AMDGPU.bfe.u32.ll b/‎llvm/test/CodeGen/R600/llvm.AMDGPU.bfe.u32.ll ‎llvm/test/CodeGen/AMDGPU/llvm.AMDGPU.bfe.u32.ll
diff --git a/‎llvm/test/CodeGen/R600/llvm.AMDGPU.bfi.ll ‎llvm/test/CodeGen/AMDGPU/llvm.AMDGPU.bfi.ll b/‎llvm/test/CodeGen/R600/llvm.AMDGPU.bfi.ll ‎llvm/test/CodeGen/AMDGPU/llvm.AMDGPU.bfi.ll
@@ -176,6 +176,7 @@ set(LLVM_INCLUDE_DIR ${CMAKE_CURRENT_BINARY_DIR}/include)
 
 set(LLVM_ALL_TARGETS
   AArch64
+  AMDGPU
   ARM
   BPF
   CppBackend
@@ -184,7 +185,6 @@ set(LLVM_ALL_TARGETS
   MSP430
   NVPTX
   PowerPC
-  R600
   Sparc
   SystemZ
   X86
 
@@ -1097,7 +1097,7 @@ if test "$llvm_cv_enable_crash_overrides" = "yes" ; then
 fi
 
 dnl List all possible targets
-ALL_TARGETS="X86 Sparc PowerPC ARM AArch64 Mips XCore MSP430 CppBackend NVPTX Hexagon SystemZ R600 BPF"
+ALL_TARGETS="X86 Sparc PowerPC ARM AArch64 Mips XCore MSP430 CppBackend NVPTX Hexagon SystemZ AMDGPU BPF"
 AC_SUBST(ALL_TARGETS,$ALL_TARGETS)
 
 dnl Allow specific targets to be specified for building (or not)
@@ -1132,7 +1132,8 @@ case "$enableval" in
         hexagon)  TARGETS_TO_BUILD="Hexagon $TARGETS_TO_BUILD" ;;
         nvptx)    TARGETS_TO_BUILD="NVPTX $TARGETS_TO_BUILD" ;;
         systemz)  TARGETS_TO_BUILD="SystemZ $TARGETS_TO_BUILD" ;;
-        r600)     TARGETS_TO_BUILD="R600 $TARGETS_TO_BUILD" ;;
+        amdgpu)  ;&
+        r600)     TARGETS_TO_BUILD="AMDGPU $TARGETS_TO_BUILD" ;;
         host) case "$llvm_cv_target_arch" in
             x86)         TARGETS_TO_BUILD="X86 $TARGETS_TO_BUILD" ;;
             x86_64)      TARGETS_TO_BUILD="X86 $TARGETS_TO_BUILD" ;;
 
@@ -5628,7 +5628,7 @@ _ACEOF
 
 fi
 
-ALL_TARGETS="X86 Sparc PowerPC ARM AArch64 Mips XCore MSP430 CppBackend NVPTX Hexagon SystemZ R600 BPF"
+ALL_TARGETS="X86 Sparc PowerPC ARM AArch64 Mips XCore MSP430 CppBackend NVPTX Hexagon SystemZ AMDGPU BPF"
 ALL_TARGETS=$ALL_TARGETS
 
 
@@ -5665,7 +5665,8 @@ case "$enableval" in
         hexagon)  TARGETS_TO_BUILD="Hexagon $TARGETS_TO_BUILD" ;;
         nvptx)    TARGETS_TO_BUILD="NVPTX $TARGETS_TO_BUILD" ;;
         systemz)  TARGETS_TO_BUILD="SystemZ $TARGETS_TO_BUILD" ;;
-        r600)     TARGETS_TO_BUILD="R600 $TARGETS_TO_BUILD" ;;
+        amdgpu)  ;&
+        r600)     TARGETS_TO_BUILD="AMDGPU $TARGETS_TO_BUILD" ;;
         host) case "$llvm_cv_target_arch" in
             x86)         TARGETS_TO_BUILD="X86 $TARGETS_TO_BUILD" ;;
             x86_64)      TARGETS_TO_BUILD="X86 $TARGETS_TO_BUILD" ;;
 
@@ -80,7 +80,7 @@ createAMDGPUAsmPrinterPass(TargetMachine &tm,
   return new AMDGPUAsmPrinter(tm, std::move(Streamer));
 }
 
-extern "C" void LLVMInitializeR600AsmPrinter() {
+extern "C" void LLVMInitializeAMDGPUAsmPrinter() {
   TargetRegistry::RegisterAsmPrinter(TheAMDGPUTarget, createAMDGPUAsmPrinterPass);
   TargetRegistry::RegisterAsmPrinter(TheGCNTarget, createAMDGPUAsmPrinterPass);
 }
 
@@ -37,7 +37,7 @@
 
 using namespace llvm;
 
-extern "C" void LLVMInitializeR600Target() {
+extern "C" void LLVMInitializeAMDGPUTarget() {
   // Register the target
   RegisterTargetMachine<R600TargetMachine> X(TheAMDGPUTarget);
   RegisterTargetMachine<GCNTargetMachine> Y(TheGCNTarget);
 
@@ -1369,7 +1369,7 @@ void AMDGPUAsmParser::cvtVOP3(MCInst &Inst, const OperandVector &Operands) {
 }
 
 /// Force static initialization.
-extern "C" void LLVMInitializeR600AsmParser() {
+extern "C" void LLVMInitializeAMDGPUAsmParser() {
   RegisterMCAsmParser<AMDGPUAsmParser> A(TheAMDGPUTarget);
   RegisterMCAsmParser<AMDGPUAsmParser> B(TheGCNTarget);
 }
 
@@ -0,0 +1,3 @@
+add_llvm_library(LLVMAMDGPUAsmParser
+  AMDGPUAsmParser.cpp
+  )
@@ -1,4 +1,4 @@
-;===- ./lib/Target/R600/MCTargetDesc/LLVMBuild.txt -------------*- Conf -*--===;
+;===- ./lib/Target/AMDGPU/AsmParser/LLVMBuild.txt -------------*- Conf -*--===;
 ;
 ;                     The LLVM Compiler Infrastructure
 ;
@@ -17,7 +17,7 @@
 
 [component_0]
 type = Library
-name = R600Desc
-parent = R600
-required_libraries = MC R600AsmPrinter R600Info Support
-add_to_library_groups = R600
+name = AMDGPUAsmParser
+parent = AMDGPU
+required_libraries = MC MCParser AMDGPUDesc AMDGPUInfo Support
+add_to_library_groups = AMDGPU
@@ -12,7 +12,7 @@ tablegen(LLVM AMDGPUGenAsmWriter.inc -gen-asm-writer)
 tablegen(LLVM AMDGPUGenAsmMatcher.inc -gen-asm-matcher)
 add_public_tablegen_target(AMDGPUCommonTableGen)
 
-add_llvm_target(R600CodeGen
+add_llvm_target(AMDGPUCodeGen
   AMDILCFGStructurizer.cpp
   AMDGPUAlwaysInlinePass.cpp
   AMDGPUAsmPrinter.cpp
 
@@ -0,0 +1,3 @@
+add_llvm_library(LLVMAMDGPUAsmPrinter
+  AMDGPUInstPrinter.cpp
+  )
@@ -1,4 +1,4 @@
-;===- ./lib/Target/R600/InstPrinter/LLVMBuild.txt -----------*- Conf -*--===;
+;===- ./lib/Target/AMDGPU/InstPrinter/LLVMBuild.txt -----------*- Conf -*--===;
 ;
 ;                     The LLVM Compiler Infrastructure
 ;
@@ -17,8 +17,8 @@
 
 [component_0]
 type = Library
-name = R600AsmPrinter
-parent = R600
+name = AMDGPUAsmPrinter
+parent = AMDGPU
 required_libraries = MC Support
-add_to_library_groups = R600
+add_to_library_groups = AMDGPU
 
@@ -20,14 +20,14 @@ subdirectories = AsmParser InstPrinter MCTargetDesc TargetInfo
 
 [component_0]
 type = TargetGroup
-name = R600
+name = AMDGPU
 parent = Target
 has_asmparser = 1
 has_asmprinter = 1
 
 [component_1]
 type = Library
-name = R600CodeGen
-parent = R600
-required_libraries = Analysis AsmPrinter CodeGen Core IPO MC R600AsmParser R600AsmPrinter R600Desc R600Info Scalar SelectionDAG Support Target TransformUtils
-add_to_library_groups = R600
+name = AMDGPUCodeGen
+parent = AMDGPU
+required_libraries = Analysis AsmPrinter CodeGen Core IPO MC AMDGPUAsmParser AMDGPUAsmPrinter AMDGPUDesc AMDGPUInfo Scalar SelectionDAG Support Target TransformUtils
+add_to_library_groups = AMDGPU
@@ -72,7 +72,7 @@ static MCInstPrinter *createAMDGPUMCInstPrinter(const Triple &T,
   return new AMDGPUInstPrinter(MAI, MII, MRI);
 }
 
-extern "C" void LLVMInitializeR600TargetMC() {
+extern "C" void LLVMInitializeAMDGPUTargetMC() {
   for (Target *T : {&TheAMDGPUTarget, &TheGCNTarget}) {
     RegisterMCAsmInfo<AMDGPUMCAsmInfo> X(*T);
 
 
@@ -1,5 +1,5 @@
 
-add_llvm_library(LLVMR600Desc
+add_llvm_library(LLVMAMDGPUDesc
   AMDGPUAsmBackend.cpp
   AMDGPUELFObjectWriter.cpp
   AMDGPUMCCodeEmitter.cpp
 
@@ -1,4 +1,4 @@
-;===- ./lib/Target/R600/AsmParser/LLVMBuild.txt -------------*- Conf -*--===;
+;===- ./lib/Target/AMDGPU/MCTargetDesc/LLVMBuild.txt -------------*- Conf -*--===;
 ;
 ;                     The LLVM Compiler Infrastructure
 ;
@@ -17,7 +17,7 @@
 
 [component_0]
 type = Library
-name = R600AsmParser
-parent = R600
-required_libraries = MC MCParser R600Desc R600Info Support
-add_to_library_groups = R600
+name = AMDGPUDesc
+parent = AMDGPU
+required_libraries = MC AMDGPUAsmPrinter AMDGPUInfo Support
+add_to_library_groups = AMDGPU
@@ -23,7 +23,7 @@ Target llvm::TheAMDGPUTarget;
 Target llvm::TheGCNTarget;
 
 /// \brief Extern function to initialize the targets for the AMDGPU backend
-extern "C" void LLVMInitializeR600TargetInfo() {
+extern "C" void LLVMInitializeAMDGPUTargetInfo() {
   RegisterTarget<Triple::r600, false>
     R600(TheAMDGPUTarget, "r600", "AMD GPUs HD2XXX-HD6XXX");
   RegisterTarget<Triple::amdgcn, false> GCN(TheGCNTarget, "amdgcn", "AMD GCN GPUs");
 
@@ -0,0 +1,3 @@
+add_llvm_library(LLVMAMDGPUInfo
+  AMDGPUTargetInfo.cpp
+  )
@@ -1,4 +1,4 @@
-;===- ./lib/Target/R600/TargetInfo/LLVMBuild.txt --------------*- Conf -*--===;
+;===- ./lib/Target/AMDGPU/TargetInfo/LLVMBuild.txt --------------*- Conf -*--===;
 ;
 ;                     The LLVM Compiler Infrastructure
 ;
@@ -17,7 +17,7 @@
 
 [component_0]
 type = Library
-name = R600Info
-parent = R600
+name = AMDGPUInfo
+parent = AMDGPU
 required_libraries = Support
-add_to_library_groups = R600
+add_to_library_groups = AMDGPU
@@ -19,6 +19,7 @@
 ; will typically require only insertion of a line.
 [common]
 subdirectories =
+ AMDGPU
  ARM
  AArch64
  BPF
@@ -28,7 +29,6 @@ subdirectories =
  NVPTX
  Mips
  PowerPC
- R600
  Sparc
  SystemZ
  X86
 
@@ -0,0 +1,2 @@
+if not 'AMDGPU' in config.root.targets:
+    config.unsupported = True
Original file line number	Diff line number	Diff line change
`@@ -80,7 +80,7 @@ createAMDGPUAsmPrinterPass(TargetMachine &tm,`
`80`	`80`	`return new AMDGPUAsmPrinter(tm, std::move(Streamer));`
`81`	`81`	`}`
`82`	`82`
`83`		`-extern "C" void LLVMInitializeR600AsmPrinter() {`
	`83`	`+extern "C" void LLVMInitializeAMDGPUAsmPrinter() {`
`84`	`84`	`TargetRegistry::RegisterAsmPrinter(TheAMDGPUTarget, createAMDGPUAsmPrinterPass);`
`85`	`85`	`TargetRegistry::RegisterAsmPrinter(TheGCNTarget, createAMDGPUAsmPrinterPass);`
`86`	`86`	`}`
Original file line number	Diff line number	Diff line change
`@@ -1369,7 +1369,7 @@ void AMDGPUAsmParser::cvtVOP3(MCInst &Inst, const OperandVector &Operands) {`
`1369`	`1369`	`}`
`1370`	`1370`
`1371`	`1371`	`/// Force static initialization.`
`1372`		`-extern "C" void LLVMInitializeR600AsmParser() {`
	`1372`	`+extern "C" void LLVMInitializeAMDGPUAsmParser() {`
`1373`	`1373`	`RegisterMCAsmParser<AMDGPUAsmParser> A(TheAMDGPUTarget);`
`1374`	`1374`	`RegisterMCAsmParser<AMDGPUAsmParser> B(TheGCNTarget);`
`1375`	`1375`	`}`
Original file line number	Diff line number	Diff line change
`@@ -0,0 +1,3 @@`
	`1`	`+add_llvm_library(LLVMAMDGPUAsmParser`
	`2`	`+ AMDGPUAsmParser.cpp`
	`3`	`+ )`
Original file line number	Diff line number	Diff line change
`@@ -0,0 +1,3 @@`
	`1`	`+add_llvm_library(LLVMAMDGPUAsmPrinter`
	`2`	`+ AMDGPUInstPrinter.cpp`
	`3`	`+ )`
Original file line number	Diff line number	Diff line change
`@@ -72,7 +72,7 @@ static MCInstPrinter *createAMDGPUMCInstPrinter(const Triple &T,`
`72`	`72`	`return new AMDGPUInstPrinter(MAI, MII, MRI);`
`73`	`73`	`}`
`74`	`74`
`75`		`-extern "C" void LLVMInitializeR600TargetMC() {`
	`75`	`+extern "C" void LLVMInitializeAMDGPUTargetMC() {`
`76`	`76`	`for (Target *T : {&TheAMDGPUTarget, &TheGCNTarget}) {`
`77`	`77`	`RegisterMCAsmInfo<AMDGPUMCAsmInfo> X(*T);`
`78`	`78`
Original file line number	Diff line number	Diff line change
`@@ -0,0 +1,3 @@`
	`1`	`+add_llvm_library(LLVMAMDGPUInfo`
	`2`	`+ AMDGPUTargetInfo.cpp`
	`3`	`+ )`
Original file line number	Diff line number	Diff line change
`@@ -0,0 +1,2 @@`
	`1`	`+if not 'AMDGPU' in config.root.targets:`
	`2`	`+ config.unsupported = True`