This is an f32 or f16 operand depending on instruction modifiers:
- Operand size is controlled by :ref:`m_op_sel_hi<amdgpu_synid_mad_mix_op_sel_hi>`.
- Location of 16-bit operand is controlled by :ref:`m_op_sel<amdgpu_synid_mad_mix_op_sel>`.
This is an f32 or f16 operand depending on instruction modifiers: