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Fix a few typos
Signed-off-by: Keith W. Campbell <keithc@ca.ibm.com>
1 parent 5eb8d0f commit f9945bb

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3 files changed

+7
-7
lines changed

3 files changed

+7
-7
lines changed

runtime/compiler/optimizer/TreeLowering.cpp

+1-1
Original file line numberDiff line numberDiff line change
@@ -155,7 +155,7 @@ TR::TreeLowering::Transformer::splitForFastpath(TR::Block* const block, TR::Tree
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* (substituted). That is, if a register dependency is found under `sourceNode`
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* for the same register that is set on `substituteNode`, then `substituteNode`
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* will be used instead of the dependency from `sourceNode`. Note that the
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* reference of of `substituteNode` is incremented if/when it gets added. If
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* reference of `substituteNode` is incremented if/when it gets added. If
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* `substituteNode` is NULL the no substitution will be attempted.
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*
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* @param targetNode is the GlRegDeps node that reg deps are copied to

runtime/compiler/x/codegen/J9TreeEvaluator.cpp

+3-3
Original file line numberDiff line numberDiff line change
@@ -7479,7 +7479,7 @@ static void handleOffHeapDataForArrays(
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TR::Register *discontiguousDataAddrOffsetReg = srm->findOrCreateScratchRegister();
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generateRegRegInstruction(TR::InstOpCode::XOR4RegReg, node, discontiguousDataAddrOffsetReg, discontiguousDataAddrOffsetReg, cg);
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// Since array size is capped at 32 bits, we only need to check lower half (0-31 bits) of of sizeReg.
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// Since array size is capped at 32 bits, we only need to check lower half (0-31 bits) of sizeReg.
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generateRegImmInstruction(TR::InstOpCode::CMP4RegImm4, node, sizeReg, 1, cg);
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generateRegImmInstruction(TR::InstOpCode::ADCRegImm4(), node, discontiguousDataAddrOffsetReg, 0, cg);
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@@ -7491,7 +7491,7 @@ static void handleOffHeapDataForArrays(
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// Clear out tempReg if dealing with 0 length array
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zeroReg = srm->findOrCreateScratchRegister();
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generateRegRegInstruction(TR::InstOpCode::XOR4RegReg, node, zeroReg, zeroReg, cg);
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// Since array size is capped at 32 bits, we only need to check lower half (0-31 bits) of of sizeReg.
7494+
// Since array size is capped at 32 bits, we only need to check lower half (0-31 bits) of sizeReg.
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generateRegRegInstruction(TR::InstOpCode::TEST4RegReg, node, sizeReg, sizeReg, cg);
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generateRegRegInstruction(TR::InstOpCode::CMOVERegReg(), node, tempReg, zeroReg, cg);
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srm->reclaimScratchRegister(zeroReg);
@@ -7536,7 +7536,7 @@ static void handleOffHeapDataForArrays(
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// Clear out tempReg if dealing with 0 length array
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zeroReg = srm->findOrCreateScratchRegister();
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generateRegRegInstruction(TR::InstOpCode::XORRegReg(), node, zeroReg, zeroReg, cg);
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// Since array size is capped at 32 bits, we only need to check lower half (0-31 bits) of of sizeReg.
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// Since array size is capped at 32 bits, we only need to check lower half (0-31 bits) of sizeReg.
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generateRegRegInstruction(TR::InstOpCode::TEST4RegReg, node, sizeReg, sizeReg, cg);
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generateRegRegInstruction(TR::InstOpCode::CMOVERegReg(), node, tempReg, zeroReg, cg);
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srm->reclaimScratchRegister(zeroReg);

runtime/libffi/arm/gentramp.sh

+3-3
Original file line numberDiff line numberDiff line change
@@ -2,7 +2,7 @@
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# -----------------------------------------------------------------------
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# gentramp.sh - Copyright (c) 2010, Plausible Labs Cooperative, Inc.
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#
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#
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# ARM Trampoline Page Generator
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#
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# Permission is hereby granted, free of charge, to any person obtaining
@@ -41,7 +41,7 @@ PAGE_SIZE=4096
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# are unreachable due to our maximum pc-relative ldr offset.
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PAGE_AVAIL=`expr $PAGE_SIZE - 16`
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# Compute the number of of available trampolines.
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# Compute the number of available trampolines.
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TRAMPOLINE_COUNT=`expr $PAGE_AVAIL / $TRAMPOLINE_SIZE`
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header () {
@@ -52,7 +52,7 @@ header () {
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# Write out the license header
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cat << EOF
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# Copyright (c) 2010, Plausible Labs Cooperative, Inc.
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#
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#
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# Permission is hereby granted, free of charge, to any person obtaining
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# a copy of this software and associated documentation files (the
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# ``Software''), to deal in the Software without restriction, including

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