We read every piece of feedback, and take your input very seriously.
To see all available qualifiers, see our documentation.
There was an error while loading. Please reload this page.
1 parent 0f9ca74 commit f71eea5Copy full SHA for f71eea5
configs/defconfig.esp32s3
@@ -9,6 +9,8 @@ CONFIG_ESP32S3_UNIVERSAL_MAC_ADDRESSES_TWO=y
9
CONFIG_FREERTOS_WATCHPOINT_END_OF_STACK=y
10
CONFIG_FREERTOS_TIMER_TASK_STACK_DEPTH=3120
11
CONFIG_ESP_SYSTEM_MEMPROT_FEATURE=n
12
+# CUSTOM partition-table offset, moved from 0x8000 to 0xA000 to accomodatelarger 2.stage bootloader:
13
+CONFIG_PARTITION_TABLE_OFFSET=0xA000
14
15
# ULP Setting for IDF 5.x
16
CONFIG_ULP_COPROC_ENABLED=y
0 commit comments