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2 parents cf4b268 + 9b75c65 commit a3b5525

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5 files changed

+97
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‎.github/workflows/push.yml

Lines changed: 9 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -19,6 +19,9 @@ jobs:
1919

2020
steps:
2121
- uses: actions/checkout@v1
22+
- uses: actions/setup-python@v1
23+
with:
24+
python-version: '3.x'
2225
- name: Build Sketches
2326
run: bash ./.github/scripts/on-push.sh ${{ matrix.chunk }} 15
2427

@@ -32,6 +35,9 @@ jobs:
3235

3336
steps:
3437
- uses: actions/checkout@v1
38+
- uses: actions/setup-python@v1
39+
with:
40+
python-version: '3.x'
3541
- name: Build Sketches
3642
run: bash ./.github/scripts/on-push.sh
3743

@@ -45,5 +51,8 @@ jobs:
4551

4652
steps:
4753
- uses: actions/checkout@v1
54+
- uses: actions/setup-python@v1
55+
with:
56+
python-version: '3.x'
4857
- name: Build Sketches
4958
run: bash ./.github/scripts/on-push.sh 1 1 #equal and non-zero to trigger PIO

‎.github/workflows/release.yml

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -11,6 +11,9 @@ jobs:
1111

1212
steps:
1313
- uses: actions/checkout@master
14+
- uses: actions/setup-python@v1
15+
with:
16+
python-version: '3.x'
1417
- name: Build Release
1518
env:
1619
GITHUB_TOKEN: ${{ secrets.GITHUB_TOKEN }}

‎boards.txt

Lines changed: 42 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -4774,3 +4774,45 @@ metro_esp-32.menu.DebugLevel.verbose=Verbose
47744774
metro_esp-32.menu.DebugLevel.verbose.build.code_debug=5
47754775

47764776
##############################################################
4777+
sensesiot_weizen.name=Senses's WEIZEN
4778+
4779+
sensesiot_weizen.upload.tool=esptool_py
4780+
sensesiot_weizen.upload.maximum_size=1310720
4781+
sensesiot_weizen.upload.maximum_data_size=327680
4782+
sensesiot_weizen.upload.wait_for_upload_port=true
4783+
4784+
sensesiot_weizen.serial.disableDTR=true
4785+
sensesiot_weizen.serial.disableRTS=true
4786+
4787+
sensesiot_weizen.build.mcu=esp32
4788+
sensesiot_weizen.build.core=esp32
4789+
sensesiot_weizen.build.variant=esp32
4790+
sensesiot_weizen.build.board=sensesiot_weizen
4791+
4792+
sensesiot_weizen.build.f_cpu=240000000L
4793+
sensesiot_weizen.build.flash_mode=dio
4794+
sensesiot_weizen.build.flash_size=4MB
4795+
sensesiot_weizen.build.boot=dio
4796+
sensesiot_weizen.build.partitions=default
4797+
sensesiot_weizen.build.defines=
4798+
4799+
sensesiot_weizen.menu.FlashFreq.80=80MHz
4800+
sensesiot_weizen.menu.FlashFreq.80.build.flash_freq=80m
4801+
sensesiot_weizen.menu.FlashFreq.40=40MHz
4802+
sensesiot_weizen.menu.FlashFreq.40.build.flash_freq=40m
4803+
4804+
sensesiot_weizen.menu.UploadSpeed.921600=921600
4805+
sensesiot_weizen.menu.UploadSpeed.921600.upload.speed=921600
4806+
sensesiot_weizen.menu.UploadSpeed.115200=115200
4807+
sensesiot_weizen.menu.UploadSpeed.115200.upload.speed=115200
4808+
sensesiot_weizen.menu.UploadSpeed.256000.windows=256000
4809+
sensesiot_weizen.menu.UploadSpeed.256000.upload.speed=256000
4810+
sensesiot_weizen.menu.UploadSpeed.230400.windows.upload.speed=256000
4811+
sensesiot_weizen.menu.UploadSpeed.230400=230400
4812+
sensesiot_weizen.menu.UploadSpeed.230400.upload.speed=230400
4813+
sensesiot_weizen.menu.UploadSpeed.460800.linux=460800
4814+
sensesiot_weizen.menu.UploadSpeed.460800.macosx=460800
4815+
sensesiot_weizen.menu.UploadSpeed.460800.upload.speed=460800
4816+
sensesiot_weizen.menu.UploadSpeed.512000.windows=512000
4817+
sensesiot_weizen.menu.UploadSpeed.512000.upload.speed=512000
4818+
##############################################################

‎cores/esp32/esp32-hal-spi.c

Lines changed: 18 additions & 11 deletions
Original file line numberDiff line numberDiff line change
@@ -384,12 +384,8 @@ static void _on_apb_change(void * arg, apb_change_ev_t ev_type, uint32_t old_apb
384384
}
385385
}
386386

387-
void spiStopBus(spi_t * spi)
387+
static void spiInitBus(spi_t * spi)
388388
{
389-
if(!spi) {
390-
return;
391-
}
392-
SPI_MUTEX_LOCK();
393389
spi->dev->slave.trans_done = 0;
394390
spi->dev->slave.slave_mode = 0;
395391
spi->dev->pin.val = 0;
@@ -399,8 +395,19 @@ void spiStopBus(spi_t * spi)
399395
spi->dev->ctrl1.val = 0;
400396
spi->dev->ctrl2.val = 0;
401397
spi->dev->clock.val = 0;
402-
SPI_MUTEX_UNLOCK();
398+
}
399+
400+
void spiStopBus(spi_t * spi)
401+
{
402+
if(!spi) {
403+
return;
404+
}
405+
403406
removeApbChangeCallback(spi, _on_apb_change);
407+
408+
SPI_MUTEX_LOCK();
409+
spiInitBus(spi);
410+
SPI_MUTEX_UNLOCK();
404411
}
405412

406413
spi_t * spiStartBus(uint8_t spi_num, uint32_t clockDiv, uint8_t dataMode, uint8_t bitOrder)
@@ -431,12 +438,8 @@ spi_t * spiStartBus(uint8_t spi_num, uint32_t clockDiv, uint8_t dataMode, uint8_
431438
DPORT_CLEAR_PERI_REG_MASK(DPORT_PERIP_RST_EN_REG, DPORT_SPI_RST_1);
432439
}
433440

434-
spiStopBus(spi);
435-
spiSetDataMode(spi, dataMode);
436-
spiSetBitOrder(spi, bitOrder);
437-
spiSetClockDiv(spi, clockDiv);
438-
439441
SPI_MUTEX_LOCK();
442+
spiInitBus(spi);
440443
spi->dev->user.usr_mosi = 1;
441444
spi->dev->user.usr_miso = 1;
442445
spi->dev->user.doutdin = 1;
@@ -447,6 +450,10 @@ spi_t * spiStartBus(uint8_t spi_num, uint32_t clockDiv, uint8_t dataMode, uint8_
447450
}
448451
SPI_MUTEX_UNLOCK();
449452

453+
spiSetDataMode(spi, dataMode);
454+
spiSetBitOrder(spi, bitOrder);
455+
spiSetClockDiv(spi, clockDiv);
456+
450457
addApbChangeCallback(spi, _on_apb_change);
451458
return spi;
452459
}

‎cores/esp32/esp32-hal-uart.c

Lines changed: 25 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -208,6 +208,11 @@ uart_t* uartBegin(uint8_t uart_nr, uint32_t baudrate, uint32_t config, int8_t rx
208208
uart->dev->conf0.stop_bit_num = ONE_STOP_BITS_CONF;
209209
uart->dev->rs485_conf.dl1_en = 1;
210210
}
211+
212+
// tx_idle_num : idle interval after tx FIFO is empty(unit: the time it takes to send one bit under current baudrate)
213+
// Setting it to 0 prevents line idle time/delays when sending messages with small intervals
214+
uart->dev->idle_conf.tx_idle_num = 0; //
215+
211216
UART_MUTEX_UNLOCK();
212217

213218
if(rxPin != -1) {
@@ -265,7 +270,7 @@ uint32_t uartAvailable(uart_t* uart)
265270
if(uart == NULL || uart->queue == NULL) {
266271
return 0;
267272
}
268-
return uxQueueMessagesWaiting(uart->queue);
273+
return (uxQueueMessagesWaiting(uart->queue) + uart->dev->status.rxfifo_cnt) ;
269274
}
270275

271276
uint32_t uartAvailableForWrite(uart_t* uart)
@@ -276,12 +281,27 @@ uint32_t uartAvailableForWrite(uart_t* uart)
276281
return 0x7f - uart->dev->status.txfifo_cnt;
277282
}
278283

284+
void uartRxFifoToQueue(uart_t* uart)
285+
{
286+
uint8_t c;
287+
UART_MUTEX_LOCK();
288+
while(uart->dev->status.rxfifo_cnt || (uart->dev->mem_rx_status.wr_addr != uart->dev->mem_rx_status.rd_addr)) {
289+
c = uart->dev->fifo.rw_byte;
290+
xQueueSend(uart->queue, &c, 0);
291+
}
292+
UART_MUTEX_UNLOCK();
293+
}
294+
279295
uint8_t uartRead(uart_t* uart)
280296
{
281297
if(uart == NULL || uart->queue == NULL) {
282298
return 0;
283299
}
284300
uint8_t c;
301+
if ((uxQueueMessagesWaiting(uart->queue) == 0) && (uart->dev->status.rxfifo_cnt > 0))
302+
{
303+
uartRxFifoToQueue(uart);
304+
}
285305
if(xQueueReceive(uart->queue, &c, 0)) {
286306
return c;
287307
}
@@ -294,6 +314,10 @@ uint8_t uartPeek(uart_t* uart)
294314
return 0;
295315
}
296316
uint8_t c;
317+
if ((uxQueueMessagesWaiting(uart->queue) == 0) && (uart->dev->status.rxfifo_cnt > 0))
318+
{
319+
uartRxFifoToQueue(uart);
320+
}
297321
if(xQueuePeek(uart->queue, &c, 0)) {
298322
return c;
299323
}

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