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lines changed Original file line number Diff line number Diff line change 9
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default : ' all'
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options :
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- ' all'
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- - ' esp32'
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- - ' esp32s2'
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- ' esp32s3'
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- - ' esp32c3'
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- - ' esp32c6'
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- - ' esp32h6'
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- ' esp32p4'
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log_level :
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type : choice
Original file line number Diff line number Diff line change @@ -5,31 +5,33 @@ cmake_minimum_required(VERSION 3.5)
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include ($ENV{IDF_PATH} /tools/cmake/project.cmake )
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project (arduino-lib-builder )
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+ idf_build_set_property (COMPILE_OPTIONS -Wno-error=maybe-uninitialized APPEND )
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+ idf_build_set_property (COMPILE_OPTIONS -Wno-error=stringop-truncation APPEND )
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idf_build_get_property (elf EXECUTABLE GENERATOR_EXPRESSION )
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add_custom_command (
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- OUTPUT "idf_libs"
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+ OUTPUT "idf_libs"
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COMMAND ${CMAKE_SOURCE_DIR} /tools/copy-libs.sh ${IDF_TARGET} "${CONFIG_LIB_BUILDER_FLASHMODE} " "${CONFIG_SPIRAM_MODE_OCT} " "${CONFIG_IDF_TARGET_ARCH_XTENSA} "
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DEPENDS ${elf}
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- WORKING_DIRECTORY ${CMAKE_SOURCE_DIR}
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+ WORKING_DIRECTORY ${CMAKE_SOURCE_DIR}
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VERBATIM
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)
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add_custom_target (idf-libs DEPENDS "idf_libs" )
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add_custom_command (
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- OUTPUT "copy_bootloader"
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+ OUTPUT "copy_bootloader"
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COMMAND ${CMAKE_SOURCE_DIR} /tools/copy-bootloader.sh ${IDF_TARGET} "${CONFIG_LIB_BUILDER_FLASHMODE} " "${CONFIG_LIB_BUILDER_FLASHFREQ} "
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- DEPENDS bootloader
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- WORKING_DIRECTORY ${CMAKE_SOURCE_DIR}
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+ DEPENDS bootloader
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+ WORKING_DIRECTORY ${CMAKE_SOURCE_DIR}
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VERBATIM
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)
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add_custom_target (copy-bootloader DEPENDS "copy_bootloader" )
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add_custom_command (
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- OUTPUT "mem_variant"
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+ OUTPUT "mem_variant"
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COMMAND ${CMAKE_SOURCE_DIR} /tools/copy-mem-variant.sh ${IDF_TARGET} "${CONFIG_LIB_BUILDER_FLASHMODE} " "${CONFIG_SPIRAM_MODE_OCT} "
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DEPENDS ${elf}
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- WORKING_DIRECTORY ${CMAKE_SOURCE_DIR}
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+ WORKING_DIRECTORY ${CMAKE_SOURCE_DIR}
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VERBATIM
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)
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add_custom_target (mem-variant DEPENDS "mem_variant" )
Original file line number Diff line number Diff line change @@ -14,6 +14,8 @@ CONFIG_ESP_SDIO_PIN_D1=15
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CONFIG_ESP_SDIO_PIN_D2=16
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CONFIG_ESP_SDIO_PIN_D3=17
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- # RGB Display Optimizations
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- CONFIG_LCD_RGB_ISR_IRAM_SAFE=y
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- CONFIG_LCD_RGB_RESTART_IN_VSYNC=y
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+ CONFIG_CACHE_L2_CACHE_256KB=y
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+ CONFIG_CACHE_L2_CACHE_LINE_128B=y
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+ # The chip does not function properly when the following configuration option is enabled.
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+ # CONFIG_COMPILER_OPTIMIZATION_PERF=y
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+ # CONFIG_SPIRAM_XIP_FROM_PSRAM=y
Original file line number Diff line number Diff line change @@ -18,6 +18,5 @@ CONFIG_ULP_COPROC_TYPE_FSM=y
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# CONFIG_ULP_COPROC_TYPE_RISCV=y
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CONFIG_ULP_COPROC_RESERVE_MEM=512
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- # RGB Display Optimizations
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- CONFIG_LCD_RGB_ISR_IRAM_SAFE=y
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- CONFIG_LCD_RGB_RESTART_IN_VSYNC=y
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+ CONFIG_COMPILER_OPTIMIZATION_PERF=y
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+ CONFIG_ESP32S3_DATA_CACHE_LINE_64B=y
Original file line number Diff line number Diff line change 1
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CONFIG_SPIRAM_MODE_OCT=y
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CONFIG_SPIRAM_IGNORE_NOTFOUND=y
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- # CONFIG_SPIRAM_MEMTEST is not set
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+ # CONFIG_SPIRAM_MEMTEST is not set
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+
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+ CONFIG_SPIRAM_XIP_FROM_PSRAM=y
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