This repository was archived by the owner on Nov 1, 2021. It is now read-only.
-
Notifications
You must be signed in to change notification settings - Fork 112
/
Copy pathLeonFeatures.td
executable file
·91 lines (75 loc) · 4.17 KB
/
LeonFeatures.td
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
//===-- LeonFeatures.td - Describe the Leon Features -------*- tablegen -*-===//
//
// The LLVM Compiler Infrastructure
//
// This file is distributed under the University of Illinois Open Source
// License. See LICENSE.TXT for details.
//
//===----------------------------------------------------------------------===//
//
//
//===----------------------------------------------------------------------===//
//===----------------------------------------------------------------------===//
// CASA Support differs between LEON3-FT GR712RC and LEON3-FT UT699
// We need to have the option to switch this on and off.
//===----------------------------------------------------------------------===//
// support to casa instruction; for leon3 subtarget only
def LeonCASA : SubtargetFeature<
"hasleoncasa", "HasLeonCasa", "true",
"Enable CASA instruction for LEON3 and LEON4 processors">;
//===----------------------------------------------------------------------===//
// UMAC and SMAC support for LEON3 and LEON4 processors.
//===----------------------------------------------------------------------===//
// support to casa instruction; for leon3 subtarget only
def UMACSMACSupport
: SubtargetFeature<"hasumacsmac", "HasUmacSmac", "true",
"Enable UMAC and SMAC for LEON3 and LEON4 processors">;
//===----------------------------------------------------------------------===//
// LEON Erratum fixes
//===----------------------------------------------------------------------===//
def ReplaceSDIV
: SubtargetFeature<
"replacesdiv", "PerformSDIVReplace", "true",
"AT697E erratum fix: Do not emit SDIV, emit SDIVCC instead">;
def FixCALL
: SubtargetFeature<"fixcall", "FixCallImmediates", "true",
"AT697E erratum fix: Restrict the size of the immediate "
"operand of the CALL instruction to 20 bits">;
def IgnoreZeroFlag
: SubtargetFeature<"ignrzeroflag", "IgnoreZeroFlag", "true",
"AT697E erratum fix: Do not rely on the zero bit flag "
"on a divide overflow for SDIVCC and UDIVCC">;
def InsertNOPDoublePrecision
: SubtargetFeature<"insrtnopdblprcsn", "InsertNOPDoublePrecision", "true",
"LEON2 erratum fix: Insert a NOP before the double "
"precision floating point instruction">;
def FixFSMULD : SubtargetFeature<"fixfsmuld", "FixFSMULD", "true",
"LEON3 erratum fix: Do not select FSMULD">;
def ReplaceFMULS
: SubtargetFeature<"replacefmuls", "ReplaceFMULS", "true",
"LEON3 erratum fix: Replace FMULS instruction with a "
"routine using conversions/double precision operations "
"to replace FMULS">;
def PreventRoundChange
: SubtargetFeature<"prvntroundchange", "PreventRoundChange", "true",
"LEON3 erratum fix: Prevent any rounding mode change "
"request: use only the round-to-nearest rounding mode">;
def FixAllFDIVSQRT
: SubtargetFeature<"fixallfdivsqrt", "FixAllFDIVSQRT", "true",
"LEON3 erratum fix: Fix FDIVS/FDIVD/FSQRTS/FSQRTD "
"instructions with NOPs and floating-point store">;
def InsertNOPLoad
: SubtargetFeature<"insertnopload", "InsertNOPLoad", "true",
"LEON3 erratum fix: Insert a NOP instruction after "
"every single-cycle load instruction when the next "
"instruction is another load/store instruction">;
def FlushCacheLineSWAP
: SubtargetFeature<"flshcachelineswap", "FlushCacheLineSWAP", "true",
"LEON3 erratum fix: Flush cache line containing the "
"lock before performing any of the atomic instructions "
"SWAP and LDSTUB">;
def InsertNOPsLoadStore
: SubtargetFeature<"insertnopsloadstore", "InsertNOPsLoadStore", "true",
"LEON3 erratum fix: Insert NOPs between "
"single-precision loads and the store, so the number of "
"instructions between is 4">;