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J9CodeGenerator.cpp
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/*******************************************************************************
* Copyright IBM Corp. and others 2000
*
* This program and the accompanying materials are made available under
* the terms of the Eclipse Public License 2.0 which accompanies this
* distribution and is available at https://www.eclipse.org/legal/epl-2.0/
* or the Apache License, Version 2.0 which accompanies this distribution and
* is available at https://www.apache.org/licenses/LICENSE-2.0.
*
* This Source Code may also be made available under the following
* Secondary Licenses when the conditions for such availability set
* forth in the Eclipse Public License, v. 2.0 are satisfied: GNU
* General Public License, version 2 with the GNU Classpath
* Exception [1] and GNU General Public License, version 2 with the
* OpenJDK Assembly Exception [2].
*
* [1] https://www.gnu.org/software/classpath/license.html
* [2] https://openjdk.org/legal/assembly-exception.html
*
* SPDX-License-Identifier: EPL-2.0 OR Apache-2.0 OR GPL-2.0-only WITH Classpath-exception-2.0 OR GPL-2.0-only WITH OpenJDK-assembly-exception-1.0
*******************************************************************************/
//On zOS XLC linker can't handle files with same name at link time
//This workaround with pragma is needed. What this does is essentially
//give a different name to the codesection (csect) for this file. So it
//doesn't conflict with another file with same name.
#pragma csect(CODE,"TRJ9ZCGBase#C")
#pragma csect(STATIC,"TRJ9ZCGBase#S")
#pragma csect(TEST,"TRJ9ZCGBase#T")
#include <algorithm>
#include "env/CompilerEnv.hpp"
#include "codegen/AheadOfTimeCompile.hpp"
#include "codegen/CodeGenerator.hpp"
#include "codegen/CodeGenerator_inlines.hpp"
#include "codegen/ConstantDataSnippet.hpp"
#include "codegen/Linkage_inlines.hpp"
#include "codegen/S390CHelperLinkage.hpp"
#include "codegen/S390PrivateLinkage.hpp"
#include "env/VMJ9.h"
#include "env/jittypes.h"
#include "il/Node.hpp"
#include "il/Node_inlines.hpp"
#include "z/codegen/J9SystemLinkageLinux.hpp"
#include "z/codegen/J9SystemLinkagezOS.hpp"
#include "z/codegen/S390GenerateInstructions.hpp"
#include "z/codegen/S390Recompilation.hpp"
#include "z/codegen/S390Register.hpp"
#include "z/codegen/ReduceSynchronizedFieldLoad.hpp"
#define OPT_DETAILS "O^O CODE GENERATION: "
extern void TEMPORARY_initJ9S390TreeEvaluatorTable(TR::CodeGenerator *cg);
//Forward declarations
bool nodeMightClobberAccumulatorBeforeUse(TR::Node *);
J9::Z::CodeGenerator::CodeGenerator(TR::Compilation *comp) :
J9::CodeGenerator(comp)
{
/**
* Do not add CodeGenerator initialization logic here.
* Use the \c initialize() method instead.
*/
}
void
J9::Z::CodeGenerator::initialize()
{
self()->J9::CodeGenerator::initialize();
TR::CodeGenerator *cg = self();
TR::Compilation *comp = cg->comp();
TR_J9VMBase *fej9 = (TR_J9VMBase *)(comp->fe());
cg->setAheadOfTimeCompile(new (cg->trHeapMemory()) TR::AheadOfTimeCompile(cg));
// Java specific runtime helpers
cg->symRefTab()->createSystemRuntimeHelper(TR_S390jitMathHelperConvertLongToFloat);
cg->symRefTab()->createSystemRuntimeHelper(TR_S390induceRecompilation);
// Enable Direct to JNI calls unless we're mimicking interpreter stack frames.
if (!comp->getOption(TR_FullSpeedDebug))
cg->setSupportsDirectJNICalls();
if (cg->getSupportsVectorRegisters() && !comp->getOption(TR_DisableSIMDStringCaseConv))
cg->setSupportsInlineStringCaseConversion();
if (cg->getSupportsVectorRegisters() && !comp->getOption(TR_DisableFastStringIndexOf) &&
!TR::Compiler->om.canGenerateArraylets() && !TR::Compiler->om.isOffHeapAllocationEnabled())
{
cg->setSupportsInlineStringIndexOf();
}
if (cg->getSupportsVectorRegisters() && !comp->getOption(TR_DisableSIMDStringHashCode) &&
!TR::Compiler->om.canGenerateArraylets() && !TR::Compiler->om.isOffHeapAllocationEnabled())
{
cg->setSupportsInlineStringHashCode();
cg->setSupportsInlineVectorizedHashCode();
}
if (cg->getSupportsVectorRegisters() && comp->target().cpu.isAtLeast(OMR_PROCESSOR_S390_Z14) &&
!TR::Compiler->om.canGenerateArraylets())
{
cg->setSupportsInlineStringLatin1Inflate();
}
// For IBM Java 8 ConcurrentLinkedQueue.poll and offer has been accelerated
// using constrained transactional execution instructions.
// If CTX feature is supported on processor, and JIT has not disabled it
// using TR_DisableTM option, then inlining of ConcurrentLinkedQueue.poll/offer
// is supported.
// See comment in `handleHardwareReadBarrier` implementation as to why we
// cannot support CTX under CS
if ((comp->target().cpu.supportsFeature(OMR_FEATURE_S390_CONSTRAINED_TRANSACTIONAL_EXECUTION_FACILITY)
&& !comp->getOption(TR_DisableTM))
&& TR::Compiler->om.readBarrierType() == gc_modron_readbar_none)
{
cg->setSupportsInlineConcurrentLinkedQueue();
}
static bool disableInlineStringCodingHasNegatives = feGetEnv("TR_DisableInlineStringCodingHasNegatives") != NULL;
if (cg->getSupportsVectorRegisters() && !disableInlineStringCodingHasNegatives &&
!TR::Compiler->om.canGenerateArraylets())
{
cg->setSupportsInlineStringCodingHasNegatives();
}
static bool disableInlineStringCodingCountPositives = feGetEnv("TR_DisableInlineStringCodingCountPositives") != NULL;
if (cg->getSupportsVectorRegisters() && !disableInlineStringCodingCountPositives &&
!TR::Compiler->om.canGenerateArraylets())
{
cg->setSupportsInlineStringCodingCountPositives();
}
// Similar to AOT, array translate instructions are not supported for remote compiles because instructions such as
// TRTO allocate lookup tables in persistent memory that cannot be relocated.
if (comp->isOutOfProcessCompilation())
{
cg->resetSupportsArrayTranslateTRxx();
}
static char *disableInlineEncodeASCII = feGetEnv("TR_disableInlineEncodeASCII");
if (comp->fej9()->isStringCompressionEnabledVM() && cg->getSupportsVectorRegisters() && !TR::Compiler->om.canGenerateArraylets() && !TR::Compiler->om.isOffHeapAllocationEnabled() && !disableInlineEncodeASCII)
{
cg->setSupportsInlineEncodeASCII();
}
static bool disableInlineMath_MaxMin_FD = feGetEnv("TR_disableInlineMaxMin") != NULL;
if (!disableInlineMath_MaxMin_FD)
{
cg->setSupportsInlineMath_MaxMin_FD();
}
static bool disableInlineVectorizedMismatch = feGetEnv("TR_disableInlineVectorizedMismatch") != NULL;
if (cg->getSupportsArrayCmpLen() &&
#if defined(J9VM_GC_SPARSE_HEAP_ALLOCATION)
!TR::Compiler->om.isOffHeapAllocationEnabled() &&
#endif /* J9VM_GC_SPARSE_HEAP_ALLOCATION */
!disableInlineVectorizedMismatch)
{
cg->setSupportsInlineVectorizedMismatch();
}
static bool disableCASInlining = feGetEnv("TR_DisableCASInlining") != NULL;
if (!disableCASInlining)
{
cg->setSupportsInlineUnsafeCompareAndSet();
}
static bool disableCAEInlining = feGetEnv("TR_DisableCAEInlining") != NULL;
if (!disableCAEInlining)
{
cg->setSupportsInlineUnsafeCompareAndExchange();
}
// Let's turn this on. There is more work needed in the opt
// to catch the case where the BNDSCHK is inserted after
//
cg->setDisableNullCheckOfArrayLength();
// Enable Range splitter by default.
if (!comp->getOption(TR_DisableLiveRangeSplitter))
comp->setOption(TR_EnableRangeSplittingGRA);
// Disable SS Optimization that generates better SS instruction memory references.
// Issue in Java because of symref in AOT case. See RTC 31738 for details.
comp->setOption(TR_DisableSSOpts);
// Invoke Class.newInstanceImpl() from the JIT directly
cg->setSupportsNewInstanceImplOpt();
// Still being set in the S390CodeGenerator constructor, as zLinux sTR requires this.
//cg->setSupportsJavaFloatSemantics();
// Enable this only on Java, as there is a possibility that optimizations driven by this
// flag will generate calls to helper routines.
#if defined(J9VM_OPT_JITSERVER)
// The TRT instruction generated by the arrayTranslateAndTestEvaluator is not relocatable. Thus, to
// attain functional correctness we don't enable this support for remote compilations.
if (!comp->isOutOfProcessCompilation())
#endif /* defined(J9VM_OPT_JITSERVER) */
{
cg->setSupportsArrayTranslateAndTest();
}
// Enable compaction of local stack slots. i.e. variables with non-overlapping live ranges
// can share the same slot.
cg->setSupportsCompactedLocals();
// Enable Implicit NULL Checks on zLinux. On zOS, page zero is readable, so we need explicit checks.
cg->setSupportsImplicitNullChecks(comp->target().isLinux() && cg->getHasResumableTrapHandler() && !comp->getOption(TR_DisableZImplicitNullChecks));
// Enable Monitor cache lookup for monent/monexit
static char *disableMonitorCacheLookup = feGetEnv("TR_disableMonitorCacheLookup");
if (!disableMonitorCacheLookup)
comp->setOption(TR_EnableMonitorCacheLookup);
// Defect 109299 : PMR 14649,999,760 / CritSit AV8426
// Turn off use of hardware clock on zLinux for calculating currentTimeMillis() as user can adjust time on their system.
//
// Hardware clock, however, can be used for calculating System.nanoTime() on zLinux
// since java/lang/System.nanoTime() returns an arbitrary number, rather than the current time
// (see the java/lang/System.nanoTime() spec for details).
if (comp->target().isZOS())
cg->setSupportsMaxPrecisionMilliTime();
// Enable high-resolution timer for System.nanoTime() unless we need to support checkpointing (i.e. snapshot mode), which requires
// that we adjust nanoTime() after restoring checkpoints. This adjustment is currently not implemented for the high res timer, hence
// we need to stick to the Java nanoTime() implementation.
if (!fej9->isSnapshotModeEnabled())
cg->setSupportsCurrentTimeMaxPrecision();
// Support BigDecimal Long Lookaside versioning optimizations.
if (!comp->getOption(TR_DisableBDLLVersioning))
cg->setSupportsBigDecimalLongLookasideVersioning();
// RI support
if (comp->getOption(TR_HWProfilerDisableRIOverPrivateLinkage)
&& comp->getPersistentInfo()->isRuntimeInstrumentationEnabled()
&& comp->target().cpu.isAtLeast(OMR_PROCESSOR_S390_ZEC12)
&& comp->target().cpu.supportsFeature(OMR_FEATURE_S390_RI))
{
cg->setSupportsRuntimeInstrumentation();
cg->setEnableRIOverPrivateLinkage(false); // Disable RI over private linkage, since RION/OFF will be controlled over J2I / I2J.
}
/*
* "Statically" initialize the FE-specific tree evaluator functions.
* This code only needs to execute once per JIT lifetime.
*/
static bool initTreeEvaluatorTable = false;
if (!initTreeEvaluatorTable)
{
TEMPORARY_initJ9S390TreeEvaluatorTable(cg);
initTreeEvaluatorTable = true;
}
cg->getS390Linkage()->initS390RealRegisterLinkage();
if (comp->fej9()->hasFixedFrameC_CallingConvention())
{
cg->setHasFixedFrameC_CallingConvention();
}
static bool disableIntegerToChars = (feGetEnv("TR_DisableIntegerToChars") != NULL);
if (cg->getSupportsVectorRegisters() && !TR::Compiler->om.canGenerateArraylets() && !TR::Compiler->om.isOffHeapAllocationEnabled() && !disableIntegerToChars && comp->target().cpu.isAtLeast(OMR_PROCESSOR_S390_Z16))
{
cg->setSupportsIntegerToChars();
cg->setSupportsIntegerStringSize();
}
cg->setIgnoreDecimalOverflowException(false);
}
bool
J9::Z::CodeGenerator::callUsesHelperImplementation(TR::Symbol *sym)
{
return sym && (!self()->comp()->getOption(TR_DisableInliningOfNatives) &&
sym->castToMethodSymbol()->getMandatoryRecognizedMethod() == TR::java_lang_invoke_ComputedCalls_dispatchJ9Method);
}
TR::Linkage *
J9::Z::CodeGenerator::createLinkage(TR_LinkageConventions lc)
{
TR::Linkage * linkage = NULL;
switch (lc)
{
case TR_CHelper:
linkage = new (self()->trHeapMemory()) J9::Z::CHelperLinkage(self());
break;
case TR_Helper:
linkage = new (self()->trHeapMemory()) J9::Z::HelperLinkage(self());
break;
case TR_Private:
linkage = new (self()->trHeapMemory()) J9::Z::PrivateLinkage(self());
break;
case TR_J9JNILinkage:
linkage = new (self()->trHeapMemory()) J9::Z::JNILinkage(self());
break;
case TR_System:
if (self()->comp()->target().isLinux())
linkage = new (self()->trHeapMemory()) J9::Z::zLinuxSystemLinkage(self());
else
linkage = new (self()->trHeapMemory()) J9::Z::zOSSystemLinkage(self());
break;
default :
TR_ASSERT(0, "\nTestarossa error: Illegal linkage convention %d\n", lc);
}
self()->setLinkage(lc, linkage);
return linkage;
}
bool
J9::Z::CodeGenerator::doInlineAllocate(TR::Node *node)
{
TR_OpaqueClassBlock * classInfo = 0;
if (self()->comp()->suppressAllocationInlining()) return false;
TR::ILOpCodes opCode = node->getOpCodeValue();
if ((opCode!=TR::anewarray) && (opCode!=TR::newarray) && (opCode!=TR::New))
return false;
int32_t objectSize = self()->comp()->canAllocateInline(node, classInfo);
if (objectSize < 0) return false;
return true;
}
bool
J9::Z::CodeGenerator::constLoadNeedsLiteralFromPool(TR::Node *node)
{
if (node->isClassUnloadingConst() || node->getType().isIntegral() || node->getType().isAddress())
{
return false;
}
else
{
return true; // Floats/Doubles require literal pool
}
}
TR::Recompilation *
J9::Z::CodeGenerator::allocateRecompilationInfo()
{
TR::Compilation *comp = self()->comp();
if(comp->getJittedMethodSymbol()->isJNI() &&
!comp->getOption(TR_FullSpeedDebug))
{
traceMsg(comp, "\n====== THIS METHOD IS VIRTUAL JNI THUNK. IT WILL NOT BE RECOMPILED====\n");
return NULL;
}
else
{
return TR_S390Recompilation::allocate(comp);
}
}
void
J9::Z::CodeGenerator::lowerTreesPreChildrenVisit(TR::Node* parent, TR::TreeTop * treeTop, vcount_t visitCount)
{
J9::CodeGenerator::lowerTreesPreChildrenVisit(parent, treeTop, visitCount);
if (parent->getOpCodeValue() == TR::BCDCHK)
{
// sometimes TR::pdModifyPrecision will be inserted
// just under BCDCHK, we have to remove it.
TR::Node * chkChild = parent->getFirstChild();
if (chkChild->getOpCodeValue() == TR::pdModifyPrecision)
{
TR::Node * pdopNode = chkChild->getFirstChild();
pdopNode->incReferenceCount();
chkChild->recursivelyDecReferenceCount();
parent->setChild(0, pdopNode);
}
}
}
void
J9::Z::CodeGenerator::lowerTreesPostChildrenVisit(TR::Node * parent, TR::TreeTop * treeTop, vcount_t visitCount)
{
J9::CodeGenerator::lowerTreesPostChildrenVisit(parent, treeTop, visitCount);
// J9, Z
//
if (self()->codegenSupportsLoadlessBNDCheck() &&
parent->getOpCode().isBndCheck() &&
(parent->getFirstChild()->getOpCode().isLoadVar() ||
parent->getSecondChild()->getOpCode().isLoadVar()))
{
TR::Node * memChild = parent->getFirstChild()->getOpCode().isLoadVar()?parent->getFirstChild():parent->getSecondChild();
if (memChild->getVisitCount() != self()->comp()->getVisitCount() && memChild->getReferenceCount() > 1 && performTransformation(self()->comp(), "%sRematerializing memref child %p from BNDCheck node\n", OPT_DETAILS, memChild))
{
memChild->decReferenceCount();
TR::Node *newNode = TR::Node::copy(memChild);
newNode->setReferenceCount(1);
parent->setChild(parent->findChildIndex(memChild), newNode);
}
}
}
void
J9::Z::CodeGenerator::lowerTreeIfNeeded(
TR::Node *node,
int32_t childNumberOfNode,
TR::Node *parent,
TR::TreeTop *tt)
{
TR::Compilation *comp = self()->comp();
J9::CodeGenerator::lowerTreeIfNeeded(node, childNumberOfNode, parent, tt);
if (self()->yankIndexScalingOp() &&
(node->getOpCodeValue() == TR::aiadd || node->getOpCodeValue() == TR::aladd ) )
{
// 390 sees a lot of scaling ops getting stuck between BNDSchk and array read/write
// causing heavy AGIs. This transformation pulls the scaling opp up a tree to unpin it.
//
// Looking for trees that look like this:
// BNDCHK / BNDCHKwithSpineCHK
// iloadi
// ==>aRegLoad
// iloadi
// ==>aRegLoad
// aloadi
// aiadd <===== You are here
// ==>aRegLoad
// isub
// imul <=== Find this node and anchor it up above the BNDCHK
// ==>iloadi
// iconst 4
// iconst -16
TR::TreeTop* prevPrevTT = NULL;
TR::TreeTop* prevTT = tt->getPrevTreeTop();
while ( prevTT &&
(prevTT->getNode()->getOpCodeValue() == TR::iRegStore ||
prevTT->getNode()->getOpCodeValue() == TR::aRegStore ||
prevTT->getNode()->getOpCodeValue() == TR::asynccheck ||
((prevTT->getNode()->getOpCodeValue() == TR::treetop) &&
(!prevTT->getNode()->getFirstChild()->getOpCode().hasSymbolReference() ||
prevTT->getNode()->getFirstChild()->getOpCode().isLoad()))))
{
prevTT = prevTT->getPrevTreeTop();
}
// Pull scaling op up above the arrayStoreCheck as performing the scaling op right before the store is a horrible AGI.
if (tt->getPrevTreeTop() &&
tt->getNode()->getOpCodeValue() == TR::ArrayStoreCHK &&
node->getSecondChild()->getNumChildren() >= 2)
{
// The general tree that we are matching is:
// aladd <===== You are here
// ==>aloadi
// lsub
// lmul <===== Find this node and anchor it up above the ArrayStoreCHK
// i2l
// ==>iRegLoad
//
// However, with internal pointers, there may or may not be an isub/lsub for arrayheader. If there is no
// arrayheader isub/lsub, we will see a tree as such:
//
// aladd (internal ptr) <===== You are here
// ==>aloadi
// lshl <===== Find this node and anchor it up above the ArrayStoreCHK
// i2l
// ==>iRegLoad
//
// As such, we will check the second child of the aiadd/aladd, and see if it's the mul/shift operation.
// If not, we'll get the subsequent first child.
TR::Node* mulNode = node->getSecondChild();
if (mulNode->getOpCodeValue() != TR::imul && mulNode->getOpCodeValue() != TR::ishl &&
mulNode->getOpCodeValue() != TR::lmul && mulNode->getOpCodeValue() != TR::lshl)
mulNode = node->getSecondChild()->getFirstChild();
if ((mulNode->getOpCodeValue() == TR::imul || mulNode->getOpCodeValue() == TR::ishl || mulNode->getOpCodeValue() == TR::lmul || mulNode->getOpCodeValue() == TR::lshl) &&
(performTransformation(comp, "%sYank mul above ArrayStoreChk [%p] \n", OPT_DETAILS, node)))
{
TR::TreeTop * ttNew = TR::TreeTop::create(comp, TR::Node::create(TR::treetop, 1, mulNode));
tt->getPrevTreeTop()->insertAfter(ttNew);
}
}
else if (prevTT &&
(prevPrevTT = prevTT->getPrevTreeTop()) &&
prevTT->getNode()->getOpCode().isBndCheck() &&
node->getSecondChild()->getNumChildren() >= 2 )
{
// The general tree that we are matching is:
// aladd <===== You are here
// ==>aloadi
// lsub
// lmul <===== Find this node and anchor it up above the BNDCHK
// i2l
// ==>iRegLoad
//
// However, with internal pointers, there may or may not be an isub/lsub for arrayheader. If there is no
// arrayheader isub/lsub, we will see a tree as such:
//
// aladd (internal ptr) <===== You are here
// ==>aloadi
// lshl <===== Find this node and anchor it up above the BNDCHK
// i2l
// ==>iRegLoad
//
// As such, we will check the second child of the aiadd/aladd, and see if it's the mul/shift operation.
// If not, we'll get the subsequent first child.
TR::Node* mulNode = node->getSecondChild();
if (mulNode->getOpCodeValue() != TR::imul && mulNode->getOpCodeValue() != TR::ishl &&
mulNode->getOpCodeValue() != TR::lmul && mulNode->getOpCodeValue() != TR::lshl)
mulNode = node->getSecondChild()->getFirstChild();
TR::Node *prevNode = prevTT->getNode();
TR::Node *bndchkIndex = prevNode->getOpCode().isSpineCheck() ?
prevNode->getChild(3) : // TR::BNDCHKwithSpineCHK
prevNode->getSecondChild(); // TR::BNDCHK
bool doIt = false;
doIt |= ((mulNode->getOpCodeValue() == TR::imul || mulNode->getOpCodeValue() == TR::ishl) &&
(mulNode->getFirstChild() == bndchkIndex)); // Make sure the BNDCHK is for this ind var
doIt |= ((mulNode->getOpCodeValue() == TR::lmul || mulNode->getOpCodeValue() == TR::lshl) &&
(mulNode->getFirstChild()->getOpCodeValue() == TR::i2l && // 64-bit memrefs have an extra iu2l
// Make sure the BNDCHKxxx is for this ind var
(mulNode->getFirstChild() == bndchkIndex ||
mulNode->getFirstChild()->getFirstChild() == bndchkIndex ||
(bndchkIndex->getNumChildren() >= 1 &&
mulNode->getFirstChild() == bndchkIndex->getFirstChild())) ));
if (doIt && performTransformation(comp, "%sYank mul [%p] \n", OPT_DETAILS, node))
{
TR::TreeTop * ttNew = TR::TreeTop::create(comp, TR::Node::create(TR::treetop, 1, mulNode));
prevPrevTT->insertAfter(ttNew);
}
}
}
// J9, Z
//
// On zseries, convert aconst to aloadi of aconst 0 and move it to its own new treetop
if (comp->target().cpu.isZ() && !self()->profiledPointersRequireRelocation() &&
node->getOpCodeValue() == TR::aconst && node->isClassUnloadingConst())
{
TR::Node * dummyNode = TR::Node::create(node, TR::aconst, 0);
TR::Node *constCopy;
TR::SymbolReference *intShadow;
dumpOptDetails(comp, "transforming unloadable aconst %p \n", node);
constCopy =TR::Node::copy(node);
intShadow = self()->symRefTab()->findOrCreateGenericIntShadowSymbolReference((intptr_t)constCopy);
intShadow->setLiteralPoolAddress();
TR::Node::recreate(node, TR::aloadi);
node->setNumChildren(1);
node->setSymbolReference(intShadow);
node->setAndIncChild(0,dummyNode);
tt->getPrevTreeTop()->insertAfter(TR::TreeTop::create(comp,TR::Node::create(TR::treetop, 1, node)));
node->decReferenceCount();
parent->setAndIncChild(childNumberOfNode, node);
}
// J9, Z
//
if (comp->target().cpu.isZ() && node->getOpCodeValue() == TR::aloadi && node->isUnneededAloadi())
{
ListIterator<TR_Pair<TR::Node, int32_t> > listIter(&_aloadiUnneeded);
TR_Pair<TR::Node, int32_t> *ptr;
uintptr_t temp;
int32_t updatedTemp;
for (ptr = listIter.getFirst(); ptr; ptr = listIter.getNext())
{
temp = (uintptr_t)ptr->getValue();
updatedTemp = (int32_t) temp;
if (ptr->getKey() == node && temp != node->getReferenceCount())
{
node->setUnneededAloadi(false);
break;
}
}
}
}
TR::S390EyeCatcherDataSnippet *
J9::Z::CodeGenerator::CreateEyeCatcher(TR::Node * node)
{
// 88448: Cold Eyecatcher is used for padding of endPC so that Return Address for exception snippets will never equal the endPC.
TR::S390EyeCatcherDataSnippet * eyeCatcherSnippet = new (self()->trHeapMemory()) TR::S390EyeCatcherDataSnippet(self(),node);
_snippetDataList.push_front(eyeCatcherSnippet);
return eyeCatcherSnippet;
}
/**
* Input reg can be NULL (when called for a store node or other type that does not return a register)
*/
void
J9::Z::CodeGenerator::widenUnicodeSignLeadingSeparate(TR::Node *node, TR_PseudoRegister *reg, int32_t endByte, int32_t bytesToClear, TR::MemoryReference *targetMR)
{
TR_ASSERT(node->getType().isAnyUnicode(),"widenUnicodeSignLeadingSeparate is only valid for unicode types (type = %s)\n",node->getDataType().toString());
TR_ASSERT( targetMR->rightAlignMemRef() || targetMR->leftAlignMemRef(),"widenUnicodeSignLeadingSeparate is only valid for aligned memory references\n");
if (bytesToClear > 0)
{
TR_StorageReference *storageRef = reg ? reg->getStorageReference() : NULL;
if (self()->traceBCDCodeGen())
traceMsg(self()->comp(),"\twidenUnicodeSignLeadingSeparate: node %p, reg %s targetStorageRef #%d, endByte %d, bytesToClear %d\n",
node,reg?self()->getDebug()->getName(reg):"0",storageRef?storageRef->getReferenceNumber():0,endByte,bytesToClear);
targetMR = reuseS390LeftAlignedMemoryReference(targetMR, node, storageRef, self(), endByte);
if (self()->traceBCDCodeGen())
traceMsg(self()->comp(),"\tgen MVC of size 2 to move unicode leading separate sign code left by %d bytes to the widened left aligned position\n",bytesToClear);
TR::MemoryReference *originalSignCodeMR = generateS390LeftAlignedMemoryReference(*targetMR, node, bytesToClear, self(), endByte);
int32_t mvcSize = 2;
generateSS1Instruction(self(), TR::InstOpCode::MVC, node,
mvcSize-1,
targetMR,
originalSignCodeMR);
self()->genZeroLeftMostUnicodeBytes(node, reg, endByte - TR::DataType::getUnicodeSignSize(), bytesToClear, targetMR);
}
}
#define TR_MAX_UNPKU_SIZE 64
/**
* Input reg can be NULL (when called for a store node or other type that does not return a register)
*/
void
J9::Z::CodeGenerator::genZeroLeftMostUnicodeBytes(TR::Node *node, TR_PseudoRegister *reg, int32_t endByte, int32_t bytesToClear, TR::MemoryReference *targetMR)
{
TR_ASSERT(node->getType().isAnyUnicode(),"genZeroLeftMostUnicodeDigits is only valid for unicode types (type = %d)\n",node->getDataType().toString());
TR_ASSERT(targetMR->rightAlignMemRef() || targetMR->leftAlignMemRef(),"genZeroLeftMostUnicodeBytes is only valid for aligned memory references\n");
bool evaluatedPaddingAnchor = false;
TR::Node *paddingAnchor = NULL;
if (bytesToClear > 0)
{
TR_StorageReference *storageRef = reg ? reg->getStorageReference() : NULL;
if (self()->traceBCDCodeGen())
traceMsg(self()->comp(),"\tgenZeroLeftMostUnicodeBytes: node %p, reg %s targetStorageRef #%d, endByte %d, bytesToClear %d\n",
node,reg?self()->getDebug()->getName(reg):"0",storageRef?storageRef->getReferenceNumber():0,endByte,bytesToClear);
// zero 16 bytes (the fixed UNPKU source size) followed by a left aligned UNPKU of bytesToClear length to get 0030 repeated as the left most digits.
// less efficient than the MVC literal copy above but doesn't require any extra storage as it is in-place
int32_t tempSize = self()->getPackedToUnicodeFixedSourceSize();
TR_StorageReference *tempStorageReference = TR_StorageReference::createTemporaryBasedStorageReference(tempSize, self()->comp());
tempStorageReference->setTemporaryReferenceCount(1);
TR::MemoryReference *tempMR = generateS390LeftAlignedMemoryReference(node, tempStorageReference, self(), tempSize, true, true); // enforceSSLimits=true, isNewTemp=true
TR_ASSERT(bytesToClear <= TR_MAX_UNPKU_SIZE,"expecting bytesToClear (%d) <= TR_MAX_UNPKU_SIZE (%d)\n",bytesToClear,TR_MAX_UNPKU_SIZE);
self()->genZeroLeftMostPackedDigits(node, NULL, tempSize, tempSize*2, tempMR);
int32_t unpkuCount = ((bytesToClear-1)/TR_MAX_UNPKU_SIZE)+1;
for (int32_t i = 0; i < unpkuCount; i++)
{
int32_t unpkuSize = std::min(bytesToClear,TR_MAX_UNPKU_SIZE);
int32_t destOffset = i*TR_MAX_UNPKU_SIZE;
if (self()->traceBCDCodeGen())
traceMsg(self()->comp(),"\tgen %d of %d UNPKUs with dest size of %d destOffset of %d and fixed source size %d\n",i+1,unpkuCount,unpkuSize,destOffset,tempSize);
generateSS1Instruction(self(), TR::InstOpCode::UNPKU, node,
unpkuSize-1,
generateS390LeftAlignedMemoryReference(*targetMR, node, destOffset, self(), endByte),
generateS390LeftAlignedMemoryReference(*tempMR, node, 0, self(), tempSize));
bytesToClear-=unpkuSize;
}
tempStorageReference->decrementTemporaryReferenceCount();
}
if (!evaluatedPaddingAnchor)
self()->processUnusedNodeDuringEvaluation(paddingAnchor);
}
/**
* Input reg can be NULL (when called for a store node or other type that does not return a register)
*/
void
J9::Z::CodeGenerator::widenZonedSignLeadingSeparate(TR::Node *node, TR_PseudoRegister *reg, int32_t endByte, int32_t bytesToClear, TR::MemoryReference *targetMR)
{
TR_ASSERT(node->getDataType() == TR::ZonedDecimalSignLeadingSeparate,
"widenZonedSignLeadingSeparate is only valid for TR::ZonedDecimalSignLeadingSeparate (type=%s)\n",node->getDataType().toString());
TR_ASSERT( targetMR->rightAlignMemRef() || targetMR->leftAlignMemRef(),"widenZonedSignLeadingSeparate is only valid for aligned memory references\n");
if (bytesToClear > 0)
{
TR_StorageReference *storageRef = reg ? reg->getStorageReference() : NULL;
if (self()->traceBCDCodeGen())
traceMsg(self()->comp(),"\twidenZonedSignLeadingSeparate: node %p, reg %s targetStorageRef #%d, endByte %d, bytesToClear %d\n",
node,reg?self()->getDebug()->getName(reg):"0",storageRef?storageRef->getReferenceNumber():0,endByte,bytesToClear);
targetMR = reuseS390LeftAlignedMemoryReference(targetMR, node, storageRef, self(), endByte);
if (self()->traceBCDCodeGen())
traceMsg(self()->comp(),"\tgen MVC of size 1 to move zoned leading separate sign code left by %d bytes to the widened left aligned position\n",bytesToClear);
TR::MemoryReference *originalSignCodeMR = generateS390LeftAlignedMemoryReference(*targetMR, node, bytesToClear, self(), endByte);
int32_t mvcSize = 1;
generateSS1Instruction(self(), TR::InstOpCode::MVC, node,
mvcSize-1,
targetMR,
originalSignCodeMR);
self()->genZeroLeftMostZonedBytes(node, reg, endByte - TR::DataType::getZonedSignSize(), bytesToClear, targetMR);
}
}
/**
* Input reg can be NULL (when called for a store node or other type that does not return a register)
*/
void
J9::Z::CodeGenerator::widenZonedSignLeadingEmbedded(TR::Node *node, TR_PseudoRegister *reg, int32_t endByte, int32_t bytesToClear, TR::MemoryReference *targetMR)
{
TR_ASSERT(node->getDataType() == TR::ZonedDecimalSignLeadingEmbedded,
"widenZonedSignLeadingEmbedded is only valid for TR::ZonedDecimalSignLeadingEmbedded (type=%s)\n",node->getDataType().toString());
TR_ASSERT( targetMR->rightAlignMemRef() || targetMR->leftAlignMemRef(),"widenZonedSignLeadingEmbedded is only valid for aligned memory references\n");
if (bytesToClear > 0)
{
TR_StorageReference *storageRef = reg ? reg->getStorageReference() : NULL;
if (self()->traceBCDCodeGen())
traceMsg(self()->comp(),"\twidenZonedSignLeadingEmbedded: node %p, reg %s targetStorageRef #%d, endByte %d, bytesToClear %d\n",
node,reg?self()->getDebug()->getName(reg):"0",storageRef?storageRef->getReferenceNumber():0,endByte,bytesToClear);
self()->genZeroLeftMostZonedBytes(node, reg, endByte, bytesToClear, targetMR);
targetMR = reuseS390LeftAlignedMemoryReference(targetMR, node, storageRef, self(), endByte);
if (self()->traceBCDCodeGen())
traceMsg(self()->comp(),"\tgen MVZ of size 1 to move leading sign code left by %d bytes to the widened left aligned position\n",bytesToClear);
TR::MemoryReference *originalSignCodeMR = generateS390LeftAlignedMemoryReference(*targetMR, node, bytesToClear, self(), endByte);
int32_t mvzSize = 1;
generateSS1Instruction(self(), TR::InstOpCode::MVZ, node,
mvzSize-1,
targetMR,
generateS390LeftAlignedMemoryReference(*originalSignCodeMR, node, 0, self(), originalSignCodeMR->getLeftMostByte()));
{
if (self()->traceBCDCodeGen()) traceMsg(self()->comp(),"\tgenerate OI 0xF0 to force original leading sign code at offset=bytesToClear=%d\n",bytesToClear);
generateSIInstruction(self(), TR::InstOpCode::OI, node, originalSignCodeMR, TR::DataType::getZonedCode());
}
}
}
void
J9::Z::CodeGenerator::genZeroLeftMostZonedBytes(TR::Node *node, TR_PseudoRegister *reg, int32_t endByte, int32_t bytesToClear, TR::MemoryReference *targetMR)
{
TR_ASSERT(node->getType().isAnyZoned(),"genZeroLeftMostZonedBytes is only valid for zoned types (type = %s)\n",node->getDataType().toString());
TR_ASSERT(targetMR->rightAlignMemRef() || targetMR->leftAlignMemRef(),"genZeroLeftMostZonedBytes is only valid for aligned memory references\n");
TR::Node *paddingAnchor = NULL;
bool evaluatedPaddingAnchor = false;
if (bytesToClear > 0)
{
TR_StorageReference *storageRef = reg ? reg->getStorageReference() : NULL;
if (self()->traceBCDCodeGen())
traceMsg(self()->comp(),"\tgenZeroLeftMostZoneBytes: (%s) %p, reg %s targetStorageRef #%d, endByte %d, bytesToClear %d\n",
node->getOpCode().getName(),node,reg?self()->getDebug()->getName(reg):"0",storageRef?storageRef->getReferenceNumber():0,endByte,bytesToClear);
{
targetMR = reuseS390LeftAlignedMemoryReference(targetMR, node, storageRef, self(), endByte);
generateSIInstruction(self(), TR::InstOpCode::MVI, node, targetMR, TR::DataType::getZonedZeroCode());
if (bytesToClear > 2)
{
int32_t overlapMVCSize = bytesToClear-1;
generateSS1Instruction(self(), TR::InstOpCode::MVC, node,
overlapMVCSize-1,
generateS390LeftAlignedMemoryReference(*targetMR, node, 1, self(), targetMR->getLeftMostByte()),
generateS390LeftAlignedMemoryReference(*targetMR, node, 0, self(), targetMR->getLeftMostByte()));
}
}
if (reg)
reg->addRangeOfZeroBytes(endByte-bytesToClear, endByte);
}
if (!evaluatedPaddingAnchor)
self()->processUnusedNodeDuringEvaluation(paddingAnchor);
}
bool
J9::Z::CodeGenerator::alwaysGeneratesAKnownCleanSign(TR::Node *node)
{
switch (node->getOpCodeValue())
{
case TR::ud2pd:
return true;
default:
return false;
}
return false;
}
bool
J9::Z::CodeGenerator::alwaysGeneratesAKnownPositiveCleanSign(TR::Node *node)
{
switch (node->getOpCodeValue())
{
case TR::ud2pd:
return true;
default:
return false;
}
return false;
}
TR_RawBCDSignCode
J9::Z::CodeGenerator::alwaysGeneratedSign(TR::Node *node)
{
switch (node->getOpCodeValue())
{
case TR::ud2pd:
return raw_bcd_sign_0xc;
default:
return raw_bcd_sign_unknown;
}
return raw_bcd_sign_unknown;
}
TR_OpaquePseudoRegister *
J9::Z::CodeGenerator::allocateOpaquePseudoRegister(TR::DataType dt)
{
TR_OpaquePseudoRegister *temp = new (self()->trHeapMemory()) TR_OpaquePseudoRegister(dt, self()->comp());
self()->addAllocatedRegister(temp);
if (self()->getDebug())
self()->getDebug()->newRegister(temp);
return temp;
}
TR_OpaquePseudoRegister *
J9::Z::CodeGenerator::allocateOpaquePseudoRegister(TR_OpaquePseudoRegister *reg)
{
TR_OpaquePseudoRegister *temp = new (self()->trHeapMemory()) TR_OpaquePseudoRegister(reg, self()->comp());
self()->addAllocatedRegister(temp);
if (self()->getDebug())
self()->getDebug()->newRegister(temp);
return temp;
}
TR_PseudoRegister *
J9::Z::CodeGenerator::allocatePseudoRegister(TR_PseudoRegister *reg)
{
TR_PseudoRegister *temp = new (self()->trHeapMemory()) TR_PseudoRegister(reg, self()->comp());
self()->addAllocatedRegister(temp);
if (self()->getDebug())
self()->getDebug()->newRegister(temp);
return temp;
}
/**
* OPR in this context is OpaquePseudoRegister
*/
TR_OpaquePseudoRegister *
J9::Z::CodeGenerator::evaluateOPRNode(TR::Node * node)
{
bool isBCD = node->getType().isBCD();
bool isAggr = node->getType().isAggregate();
TR_ASSERT(isBCD || isAggr,"evaluateOPRNode node %s (%p) must be BCD/Aggr type\n",node->getOpCode().getName(),node);
TR::Register *reg = isBCD ? self()->evaluateBCDNode(node) : self()->evaluate(node);
TR_OpaquePseudoRegister *opaquePseudoReg = reg->getOpaquePseudoRegister();
TR_ASSERT(opaquePseudoReg,"reg must be some type of opaquePseudoRegister on node %s (%p)\n",node->getOpCode().getName(),node);
return opaquePseudoReg;
}
void
J9::Z::CodeGenerator::freeUnusedTemporaryBasedHint(TR::Node *node)
{
TR_StorageReference *hint = node->getOpCode().canHaveStorageReferenceHint() ? node->getStorageReferenceHint() : NULL;
if (hint && hint->isTemporaryBased() && hint->getTemporaryReferenceCount() == 0)
{
self()->pendingFreeVariableSizeSymRef(hint->getTemporarySymbolReference());
if (self()->traceBCDCodeGen())
traceMsg(self()->comp(),"\tfreeing (pending) unused hint symRef #%d (%s) on %s (%p)\n",
hint->getReferenceNumber(),
self()->getDebug()->getName(hint->getTemporarySymbol()),
node->getOpCode().getName(),
node);
}
}
bool
J9::Z::CodeGenerator::storageReferencesMatch(TR_StorageReference *ref1, TR_StorageReference *ref2)
{
bool refMatch = false;
if (ref1->isNodeBased() && (ref1->getNode()->getOpCode().isLoadVar() || ref1->getNode()->getOpCode().isStore()) &&
ref2->isNodeBased() && (ref2->getNode()->getOpCode().isLoadVar() || ref2->getNode()->getOpCode().isStore()) &&
self()->loadOrStoreAddressesMatch(ref1->getNode(), ref2->getNode()))
{
if (ref1->getNode()->getSize() != ref2->getNode()->getSize())
{
if (self()->traceBCDCodeGen())
traceMsg(self()->comp(),"\tnode based storageRefs match = false : ref1 (#%d) and ref2 (#%d) addresses match but node1 %s (%p) size=%d != node2 %s (%p) size=%d\n",
ref1->getReferenceNumber(),ref2->getReferenceNumber(),
ref1->getNode()->getOpCode().getName(),ref1->getNode(),ref1->getNode()->getSize(),
ref2->getNode()->getOpCode().getName(),ref2->getNode(),ref2->getNode()->getSize());
refMatch = false;
}
else
{
if (self()->traceBCDCodeGen())
traceMsg(self()->comp(),"\tnode based storageRefs match = true : ref1 (#%d) %s (%p) == ref2 (#%d) %s (%p)\n",
ref1->getReferenceNumber(),ref1->getNode()->getOpCode().getName(),ref1->getNode(),
ref2->getReferenceNumber(),ref2->getNode()->getOpCode().getName(),ref2->getNode());
refMatch = true;
}
}
else if (ref1->isTemporaryBased() &&
ref2->isTemporaryBased() &&
ref1->getSymbolReference() == ref2->getSymbolReference())
{
if (self()->traceBCDCodeGen())
traceMsg(self()->comp(),"\ttemp based storageRefs match = true : ref1 (#%d) == ref2 (#%d) match\n",ref1->getReferenceNumber(),ref2->getReferenceNumber());
refMatch = true;
}
return refMatch;
}
void
J9::Z::CodeGenerator::processUnusedStorageRef(TR_StorageReference *ref)
{
if (ref == NULL || !ref->isNodeBased())
return;
if (ref->getNodeReferenceCount() == 0)
return;
TR::Node *refNode = ref->getNode();
TR::Node *addrChild = NULL;
if (refNode->getOpCode().isIndirect() ||
(ref->isConstantNodeBased() && refNode->getNumChildren() > 0))
{
addrChild = refNode->getFirstChild();
}
if (self()->traceBCDCodeGen())
traceMsg(self()->comp(),"\tprocessUnusedStorageRef ref->node %s (%p) with addrChild %s (%p)\n",
refNode->getOpCode().getName(),refNode,addrChild?addrChild->getOpCode().getName():"NULL",addrChild);
if (addrChild)
{
TR_ASSERT(addrChild->getType().isAddress(),"addrChild %s (%p) not an address type\n",addrChild->getOpCode().getName(),addrChild);
if (ref->getNodeReferenceCount() == 1)
{
if (self()->traceBCDCodeGen())
traceMsg(self()->comp(),"\t\tstorageRef->nodeRefCount %d == 1 so processUnusedAddressNode %s (%p) (refCount %d)\n",
ref->getNodeReferenceCount(),addrChild->getOpCode().getName(),addrChild,addrChild->getReferenceCount());
self()->processUnusedNodeDuringEvaluation(addrChild);
}
else if (self()->traceBCDCodeGen())
{
traceMsg(self()->comp(),"\t\tstorageRef->nodeRefCount %d > 1 so do not decRefCounts of unusedAddressNode %s (%p) (refCount %d)\n",
ref->getNodeReferenceCount(),addrChild->getOpCode().getName(),addrChild,addrChild->getReferenceCount());
}
}
if (self()->traceBCDCodeGen())
traceMsg(self()->comp(),"\tdec storageRef->nodeRefCount %d->%d\n",
ref->getNodeReferenceCount(),ref->getNodeReferenceCount()-1);
ref->decrementNodeReferenceCount();
}
TR_PseudoRegister *
J9::Z::CodeGenerator::allocatePseudoRegister(TR::DataType dt)
{
TR_PseudoRegister *temp = new (self()->trHeapMemory()) TR_PseudoRegister(dt, self()->comp());
self()->addAllocatedRegister(temp);
if (self()->getDebug())
self()->getDebug()->newRegister(temp);
return temp;
}
#define TR_ACCUMULATOR_NODE_BUDGET 50
/// canUseSingleStoreAsAnAccumulator does not use visitCounts (as they are
/// already in use at this point) but instead the slightly less / exact
/// getRegister() == NULL checks
///
/// In a pathological case, such as doubly commoned nodes under the same store
/// there is a potential for an exponential number of nodes to / be visited. To
/// guard against this maintain a count of nodes visited under one store and
/// compare against the budget below.
///
/// \note Today, it should be relatively easy to insert a Checklist, which
/// addresses the concern about visit counts above.
template <class TR_AliasSetInterface>
bool
J9::Z::CodeGenerator::canUseSingleStoreAsAnAccumulator(TR::Node *parent, TR::Node *node, TR::Node *store,TR_AliasSetInterface &storeAliases, TR::list<TR::Node*> *conflictingAddressNodes, bool justLookForConflictingAddressNodes, bool isChainOfFirstChildren, bool mustCheckAllNodes)
{
TR::Compilation *comp = self()->comp();
// A note on isChainOfFirstChildren:
// In RTC 75858, we saw the following trees for the following COBOL statements, where X is packed decimal:
// COMPUTE X = X - 2.
// COMPUTE X = 999 - X.
//
// pdstore "X"
// pdsub