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Merge branch 'master' into release/v3.1.x
2 parents a76b228 + 5a06dd9 commit a5a5809

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4 files changed

+21
-12
lines changed

4 files changed

+21
-12
lines changed

Diff for: cores/esp32/HardwareSerial.cpp

+4-3
Original file line numberDiff line numberDiff line change
@@ -291,6 +291,10 @@ void HardwareSerial::begin(unsigned long baud, uint32_t config, int8_t rxPin, in
291291
}
292292
#endif
293293

294+
// map logical pins to GPIO numbers
295+
rxPin = digitalPinToGPIONumber(rxPin);
296+
txPin = digitalPinToGPIONumber(txPin);
297+
294298
HSERIAL_MUTEX_LOCK();
295299
// First Time or after end() --> set default Pins
296300
if (!uartIsDriverInstalled(_uart)) {
@@ -326,9 +330,6 @@ void HardwareSerial::begin(unsigned long baud, uint32_t config, int8_t rxPin, in
326330
}
327331
}
328332

329-
// map logical pins to GPIO numbers
330-
rxPin = digitalPinToGPIONumber(rxPin);
331-
txPin = digitalPinToGPIONumber(txPin);
332333
// IDF UART driver keeps Pin setting on restarting. Negative Pin number will keep it unmodified.
333334
// it will detach previous UART attached pins
334335

Diff for: cores/esp32/esp32-hal-log.h

+1
Original file line numberDiff line numberDiff line change
@@ -20,6 +20,7 @@ extern "C" {
2020

2121
#include "sdkconfig.h"
2222
#include "esp_timer.h"
23+
#include "rom/ets_sys.h"
2324

2425
#define ARDUHAL_LOG_LEVEL_NONE (0)
2526
#define ARDUHAL_LOG_LEVEL_ERROR (1)

Diff for: cores/esp32/esp32-hal-misc.c

+9-3
Original file line numberDiff line numberDiff line change
@@ -24,6 +24,7 @@
2424
#ifdef CONFIG_APP_ROLLBACK_ENABLE
2525
#include "esp_ota_ops.h"
2626
#endif //CONFIG_APP_ROLLBACK_ENABLE
27+
#include "esp_private/startup_internal.h"
2728
#ifdef CONFIG_BT_ENABLED
2829
#include "esp_bt.h"
2930
#endif //CONFIG_BT_ENABLED
@@ -251,12 +252,17 @@ extern bool btInUse();
251252
#endif
252253
#endif
253254

255+
#if CONFIG_SPIRAM_SUPPORT || CONFIG_SPIRAM
256+
#ifndef CONFIG_SPIRAM_BOOT_INIT
257+
ESP_SYSTEM_INIT_FN(init_psram_new, BIT(0), 99) {
258+
return psramInit() ? ESP_OK : ESP_FAIL;
259+
}
260+
#endif
261+
#endif
262+
254263
void initArduino() {
255264
//init proper ref tick value for PLL (uncomment if REF_TICK is different than 1MHz)
256265
//ESP_REG(APB_CTRL_PLL_TICK_CONF_REG) = APB_CLK_FREQ / REF_CLK_FREQ - 1;
257-
#if CONFIG_SPIRAM_SUPPORT || CONFIG_SPIRAM
258-
psramInit();
259-
#endif
260266
#ifdef CONFIG_APP_ROLLBACK_ENABLE
261267
if (!verifyRollbackLater()) {
262268
const esp_partition_t *running = esp_ota_get_running_partition();

Diff for: cores/esp32/esp32-hal-psram.c

+7-6
Original file line numberDiff line numberDiff line change
@@ -33,6 +33,8 @@
3333
#error Target CONFIG_IDF_TARGET is not supported
3434
#endif
3535

36+
#define TAG "arduino-psram"
37+
3638
static volatile bool spiramDetected = false;
3739
static volatile bool spiramFailed = false;
3840

@@ -54,7 +56,7 @@ bool psramInit() {
5456
uint32_t pkg_ver = chip_ver & 0x7;
5557
if (pkg_ver == EFUSE_RD_CHIP_VER_PKG_ESP32D2WDQ5 || pkg_ver == EFUSE_RD_CHIP_VER_PKG_ESP32PICOD2) {
5658
spiramFailed = true;
57-
log_w("PSRAM not supported!");
59+
ESP_EARLY_LOGW(TAG, "PSRAM not supported!");
5860
return false;
5961
}
6062
#elif CONFIG_IDF_TARGET_ESP32S2
@@ -64,7 +66,7 @@ bool psramInit() {
6466
#endif
6567
if (esp_psram_init() != ESP_OK) {
6668
spiramFailed = true;
67-
log_w("PSRAM init failed!");
69+
ESP_EARLY_LOGW(TAG, "PSRAM init failed!");
6870
#if CONFIG_IDF_TARGET_ESP32
6971
if (pkg_ver != EFUSE_RD_CHIP_VER_PKG_ESP32PICOD4) {
7072
pinMatrixOutDetach(16, false, false);
@@ -73,23 +75,22 @@ bool psramInit() {
7375
#endif
7476
return false;
7577
}
76-
7778
//testSPIRAM() allows user to bypass SPI RAM test routine
7879
if (!testSPIRAM()) {
7980
spiramFailed = true;
80-
log_e("PSRAM test failed!");
81+
ESP_EARLY_LOGE(TAG, "PSRAM test failed!");
8182
return false;
8283
}
8384
if (esp_psram_extram_add_to_heap_allocator() != ESP_OK) {
8485
spiramFailed = true;
85-
log_e("PSRAM could not be added to the heap!");
86+
ESP_EARLY_LOGE(TAG, "PSRAM could not be added to the heap!");
8687
return false;
8788
}
8889
#if CONFIG_SPIRAM_USE_MALLOC && !CONFIG_ARDUINO_ISR_IRAM
8990
heap_caps_malloc_extmem_enable(CONFIG_SPIRAM_MALLOC_ALWAYSINTERNAL);
9091
#endif
92+
ESP_EARLY_LOGI(TAG, "PSRAM enabled");
9193
#endif /* CONFIG_SPIRAM_BOOT_INIT */
92-
log_i("PSRAM enabled");
9394
spiramDetected = true;
9495
return true;
9596
}

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