@@ -96,6 +96,107 @@ typedef enum {
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UART_PARITY_ERROR
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} hardwareSerial_error_t;
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+
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+ #ifndef ARDUINO_SERIAL_EVENT_TASK_STACK_SIZE
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+ #define ARDUINO_SERIAL_EVENT_TASK_STACK_SIZE 2048
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+ #endif
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+
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+ #ifndef ARDUINO_SERIAL_EVENT_TASK_PRIORITY
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+ #define ARDUINO_SERIAL_EVENT_TASK_PRIORITY (configMAX_PRIORITIES-1 )
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+ #endif
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+
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+ #ifndef ARDUINO_SERIAL_EVENT_TASK_RUNNING_CORE
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+ #define ARDUINO_SERIAL_EVENT_TASK_RUNNING_CORE -1
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+ #endif
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+
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+ // UART0 pins are defined by default by the bootloader.
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+ // The definitions for SOC_* should not be changed unless the bootloader pins
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+ // have changed and you know what you are doing.
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+
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+ #ifndef SOC_RX0
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+ #if CONFIG_IDF_TARGET_ESP32
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+ #define SOC_RX0 (gpio_num_t )3
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+ #elif CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3
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+ #define SOC_RX0 (gpio_num_t )44
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+ #elif CONFIG_IDF_TARGET_ESP32C3
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+ #define SOC_RX0 (gpio_num_t )20
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+ #elif CONFIG_IDF_TARGET_ESP32C6
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+ #define SOC_RX0 (gpio_num_t )17
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+ #elif CONFIG_IDF_TARGET_ESP32H2
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+ #define SOC_RX0 (gpio_num_t )23
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+ #endif
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+ #endif
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+
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+ #ifndef SOC_TX0
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+ #if CONFIG_IDF_TARGET_ESP32
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+ #define SOC_TX0 (gpio_num_t )1
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+ #elif CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3
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+ #define SOC_TX0 (gpio_num_t )43
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+ #elif CONFIG_IDF_TARGET_ESP32C3
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+ #define SOC_TX0 (gpio_num_t )21
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+ #elif CONFIG_IDF_TARGET_ESP32C6
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+ #define SOC_TX0 (gpio_num_t )16
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+ #elif CONFIG_IDF_TARGET_ESP32H2
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+ #define SOC_TX0 (gpio_num_t )24
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+ #endif
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+ #endif
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+
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+ // Default pins for UART1 are arbitrary, and defined here for convenience.
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+
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+ #if SOC_UART_NUM > 1
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+ #ifndef RX1
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+ #if CONFIG_IDF_TARGET_ESP32
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+ #define RX1 (gpio_num_t )26
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+ #elif CONFIG_IDF_TARGET_ESP32S2
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+ #define RX1 (gpio_num_t )4
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+ #elif CONFIG_IDF_TARGET_ESP32C3
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+ #define RX1 (gpio_num_t )18
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+ #elif CONFIG_IDF_TARGET_ESP32S3
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+ #define RX1 (gpio_num_t )15
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+ #elif CONFIG_IDF_TARGET_ESP32C6
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+ #define RX1 (gpio_num_t )4
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+ #elif CONFIG_IDF_TARGET_ESP32H2
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+ #define RX1 (gpio_num_t )0
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+ #endif
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+ #endif
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+
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+ #ifndef TX1
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+ #if CONFIG_IDF_TARGET_ESP32
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+ #define TX1 (gpio_num_t )27
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+ #elif CONFIG_IDF_TARGET_ESP32S2
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+ #define TX1 (gpio_num_t )5
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+ #elif CONFIG_IDF_TARGET_ESP32C3
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+ #define TX1 (gpio_num_t )19
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+ #elif CONFIG_IDF_TARGET_ESP32S3
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+ #define TX1 (gpio_num_t )16
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+ #elif CONFIG_IDF_TARGET_ESP32C6
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+ #define TX1 (gpio_num_t )5
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+ #elif CONFIG_IDF_TARGET_ESP32H2
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+ #define TX1 (gpio_num_t )1
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+ #endif
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+ #endif
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+ #endif /* SOC_UART_NUM > 1 */
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+
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+ // Default pins for UART2 are arbitrary, and defined here for convenience.
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+
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+ #if SOC_UART_NUM > 2
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+ #ifndef RX2
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+ #if CONFIG_IDF_TARGET_ESP32
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+ #define RX2 (gpio_num_t )4
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+ #elif CONFIG_IDF_TARGET_ESP32S3
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+ #define RX2 (gpio_num_t )19
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+ #endif
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+ #endif
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+
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+ #ifndef TX2
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+ #if CONFIG_IDF_TARGET_ESP32
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+ #define TX2 (gpio_num_t )25
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+ #elif CONFIG_IDF_TARGET_ESP32S3
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+ #define TX2 (gpio_num_t )20
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+ #endif
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+ #endif
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+ #endif /* SOC_UART_NUM > 2 */
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+
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typedef std::function<void (void )> OnReceiveCb;
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typedef std::function<void (hardwareSerial_error_t)> OnReceiveErrorCb;
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@@ -208,7 +309,7 @@ class HardwareSerial: public Stream
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// Used to set RS485 modes such as UART_MODE_RS485_HALF_DUPLEX for Auto RTS function on ESP32
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// UART_MODE_UART = 0x00 mode: regular UART mode
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// UART_MODE_RS485_HALF_DUPLEX = 0x01 mode: half duplex RS485 UART mode control by RTS pin
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- // UART_MODE_IRDA = 0x02 mode: IRDA UART mode
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+ // UART_MODE_IRDA = 0x02 mode: IRDA UART mode
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// UART_MODE_RS485_COLLISION_DETECT = 0x03 mode: RS485 collision detection UART mode (used for test purposes)
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// UART_MODE_RS485_APP_CTRL = 0x04 mode: application control RS485 UART mode (used for test purposes)
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bool setMode (SerialMode mode);
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