From 50c288175bd7850a51f800e1219177b4301fea89 Mon Sep 17 00:00:00 2001 From: scottstraughan <42965777+scottstraughan@users.noreply.github.com> Date: Tue, 2 Sep 2025 10:54:47 +0100 Subject: [PATCH] Fixed typo. --- .../2025-09-02-gpu-tensor-core-and-data-feeding.md | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/_collections/_portal_posts/2025-09-02-gpu-tensor-core-and-data-feeding.md b/_collections/_portal_posts/2025-09-02-gpu-tensor-core-and-data-feeding.md index 7b2457f..b5b1636 100644 --- a/_collections/_portal_posts/2025-09-02-gpu-tensor-core-and-data-feeding.md +++ b/_collections/_portal_posts/2025-09-02-gpu-tensor-core-and-data-feeding.md @@ -67,7 +67,7 @@ this can be seen on the following diagrams showing selected parts of an Intel GP ![XeCore GPU Illustration]({{ '/assets/images/portal/article-images/2025-09-02-intel-gpu/XeCore.jpg' | relative_url }})
*Illustration of an Intel XeCore architecture (simplified)* -Basically, the tensor core reads operands A and B from a the *register file* and then writes the accumulated output C +Basically, the tensor core reads operands A and B from the *register file* and then writes the accumulated output C back to the *file register*. However, as we have seen in [Introduction](#gpu-tensor-core-and-data-feeding), Tensor Cores have improved significantly,