@@ -51,14 +51,14 @@ void attachInterrupt(uint8_t interruptNum, void (*userFunc)(void), int mode) {
51
51
// I hate doing this, but the register assignment differs between the 1280/2560
52
52
// and the 32U4. Since avrlib defines registers PCMSK1 and PCMSK2 that aren't
53
53
// even present on the 32U4 this is the only way to distinguish between them.
54
- case 0 :
55
- EICRA = (EICRA & ~((1 <<ISC00 ) | (1 <<ISC01 ))) | (mode << ISC00 );
56
- EIMSK |= (1 <<INT0 );
57
- break ;
58
- case 1 :
59
- EICRA = (EICRA & ~((1 <<ISC10 ) | (1 <<ISC11 ))) | (mode << ISC10 );
60
- EIMSK |= (1 <<INT1 );
61
- break ;
54
+ case 0 :
55
+ EICRA = (EICRA & ~((1 <<ISC00 ) | (1 <<ISC01 ))) | (mode << ISC00 );
56
+ EIMSK |= (1 <<INT0 );
57
+ break ;
58
+ case 1 :
59
+ EICRA = (EICRA & ~((1 <<ISC10 ) | (1 <<ISC11 ))) | (mode << ISC10 );
60
+ EIMSK |= (1 <<INT1 );
61
+ break ;
62
62
case 2 :
63
63
EICRA = (EICRA & ~((1 <<ISC20 ) | (1 <<ISC21 ))) | (mode << ISC20 );
64
64
EIMSK |= (1 <<INT2 );
@@ -67,6 +67,10 @@ void attachInterrupt(uint8_t interruptNum, void (*userFunc)(void), int mode) {
67
67
EICRA = (EICRA & ~((1 <<ISC30 ) | (1 <<ISC31 ))) | (mode << ISC30 );
68
68
EIMSK |= (1 <<INT3 );
69
69
break ;
70
+ case 4 :
71
+ EICRB = (EICRB & ~((1 <<ISC60 ) | (1 <<ISC61 ))) | (mode << ISC60 );
72
+ EIMSK |= (1 <<INT6 );
73
+ break ;
70
74
#elif defined(EICRA ) && defined(EICRB ) && defined(EIMSK )
71
75
case 2 :
72
76
EICRA = (EICRA & ~((1 << ISC00 ) | (1 << ISC01 ))) | (mode << ISC00 );
@@ -166,7 +170,10 @@ void detachInterrupt(uint8_t interruptNum) {
166
170
break ;
167
171
case 3 :
168
172
EIMSK &= ~(1 <<INT3 );
169
- break ;
173
+ break ;
174
+ case 4 :
175
+ EIMSK &= ~(1 <<INT6 );
176
+ break ;
170
177
#elif defined(EICRA ) && defined(EICRB ) && defined(EIMSK )
171
178
case 2 :
172
179
EIMSK &= ~(1 << INT0 );
@@ -250,6 +257,11 @@ ISR(INT3_vect) {
250
257
intFunc [EXTERNAL_INT_3 ]();
251
258
}
252
259
260
+ ISR (INT6_vect ) {
261
+ if (intFunc [EXTERNAL_INT_4 ])
262
+ intFunc [EXTERNAL_INT_4 ]();
263
+ }
264
+
253
265
#elif defined(EICRA ) && defined(EICRB )
254
266
255
267
ISR (INT0_vect ) {
0 commit comments