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base repository: ARMmbed/mbed-os
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base: master
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head repository: arduino/mbed-os
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compare: sip-workshop-fpga
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  • 10 commits
  • 10 files changed
  • 4 contributors

Commits on Jul 10, 2019

  1. LPC546XX: Add pins to LPCXpresso restricted list 

    FPGA GPIO tests cannot be run on certain pins

Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
    @mmahadevan108 @c1728p9
    mmahadevan108 authored and c1728p9 committed Jul 10, 2019
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  2. LPC MCUXpresso: Remove extra I2C transaction on byte write 

    An extra start signal was observed on the bus which was
discovered by the FPGA test shield.
This is because the hardware sends out a transaction as soon
as a write to the START bit. Hence the write to the START
bit is delayed by using a flag.

Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
    @mmahadevan108 @c1728p9
    mmahadevan108 authored and c1728p9 committed Jul 10, 2019
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  3. FPFA I2C: correct init bloc number

    @jeromecoutant @c1728p9
    jeromecoutant authored and c1728p9 committed Jul 10, 2019
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  4. FPGA PWM: wait 1 period before measurement

    @jeromecoutant @c1728p9
    jeromecoutant authored and c1728p9 committed Jul 10, 2019
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  5. Fix for PWM output found by testing against FPGA shield 

    Two issues:
* Downcasting too early
* Potential for a uint32_t overflow in an intermediate calculation

Passing test requires #11005 to be merged.
    @stevew817 @c1728p9
    stevew817 authored and c1728p9 committed Jul 10, 2019
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  6. Avoid the FPGA tester using hardware CS which is not supported 

    Also implement rudimentary spi_free...
    @stevew817 @c1728p9
    stevew817 authored and c1728p9 committed Jul 10, 2019
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  7. FPGA: remove 4 and 12 bits size support

    @jeromecoutant @c1728p9
    jeromecoutant authored and c1728p9 committed Jul 10, 2019
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  8. FPGA SPI: ASYNC issue

    @jeromecoutant @c1728p9
    jeromecoutant authored and c1728p9 committed Jul 10, 2019
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  9. Allow re-initializing an I2C peripheral 

    Allows the FPGA based test to pass, but requires #11004 before it will
    @stevew817 @c1728p9
    stevew817 authored and c1728p9 committed Jul 10, 2019
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  10. Remove FPGA analog out test 

    Remove the analog out test temporarily due to limitations of the
FPGA rev 2 hardware.
    @c1728p9
    c1728p9 committed Jul 10, 2019
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