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Merge tag 'v6.16.7' into qcom-v6.16
This is the 6.16.7 stable release * tag 'v6.16.7': Linux 6.16.7 x86/vmscape: Add old Intel CPUs to affected list x86/vmscape: Warn when STIBP is disabled with SMT x86/bugs: Move cpu_bugs_smt_update() down x86/vmscape: Enable the mitigation x86/vmscape: Add conditional IBPB mitigation x86/vmscape: Enumerate VMSCAPE bug Documentation/hw-vuln: Add VMSCAPE documentation
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Documentation/ABI/testing/sysfs-devices-system-cpu

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@@ -586,6 +586,7 @@ What: /sys/devices/system/cpu/vulnerabilities
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/sys/devices/system/cpu/vulnerabilities/srbds
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/sys/devices/system/cpu/vulnerabilities/tsa
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/sys/devices/system/cpu/vulnerabilities/tsx_async_abort
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/sys/devices/system/cpu/vulnerabilities/vmscape
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Date: January 2018
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Contact: Linux kernel mailing list <linux-kernel@vger.kernel.org>
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Description: Information about CPU vulnerabilities

Documentation/admin-guide/hw-vuln/index.rst

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@@ -25,3 +25,4 @@ are configurable at compile, boot or run time.
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rsb
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old_microcode
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indirect-target-selection
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vmscape
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.. SPDX-License-Identifier: GPL-2.0
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VMSCAPE
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=======
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VMSCAPE is a vulnerability that may allow a guest to influence the branch
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prediction in host userspace. It particularly affects hypervisors like QEMU.
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Even if a hypervisor may not have any sensitive data like disk encryption keys,
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guest-userspace may be able to attack the guest-kernel using the hypervisor as
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a confused deputy.
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Affected processors
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-------------------
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The following CPU families are affected by VMSCAPE:
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**Intel processors:**
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- Skylake generation (Parts without Enhanced-IBRS)
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- Cascade Lake generation - (Parts affected by ITS guest/host separation)
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- Alder Lake and newer (Parts affected by BHI)
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Note that, BHI affected parts that use BHB clearing software mitigation e.g.
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Icelake are not vulnerable to VMSCAPE.
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**AMD processors:**
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- Zen series (families 0x17, 0x19, 0x1a)
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** Hygon processors:**
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- Family 0x18
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Mitigation
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----------
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Conditional IBPB
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----------------
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Kernel tracks when a CPU has run a potentially malicious guest and issues an
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IBPB before the first exit to userspace after VM-exit. If userspace did not run
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between VM-exit and the next VM-entry, no IBPB is issued.
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Note that the existing userspace mitigation against Spectre-v2 is effective in
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protecting the userspace. They are insufficient to protect the userspace VMMs
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from a malicious guest. This is because Spectre-v2 mitigations are applied at
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context switch time, while the userspace VMM can run after a VM-exit without a
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context switch.
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Vulnerability enumeration and mitigation is not applied inside a guest. This is
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because nested hypervisors should already be deploying IBPB to isolate
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themselves from nested guests.
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SMT considerations
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------------------
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When Simultaneous Multi-Threading (SMT) is enabled, hypervisors can be
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vulnerable to cross-thread attacks. For complete protection against VMSCAPE
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attacks in SMT environments, STIBP should be enabled.
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The kernel will issue a warning if SMT is enabled without adequate STIBP
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protection. Warning is not issued when:
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- SMT is disabled
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- STIBP is enabled system-wide
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- Intel eIBRS is enabled (which implies STIBP protection)
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System information and options
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------------------------------
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The sysfs file showing VMSCAPE mitigation status is:
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/sys/devices/system/cpu/vulnerabilities/vmscape
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The possible values in this file are:
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* 'Not affected':
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The processor is not vulnerable to VMSCAPE attacks.
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* 'Vulnerable':
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The processor is vulnerable and no mitigation has been applied.
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* 'Mitigation: IBPB before exit to userspace':
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Conditional IBPB mitigation is enabled. The kernel tracks when a CPU has
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run a potentially malicious guest and issues an IBPB before the first
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exit to userspace after VM-exit.
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* 'Mitigation: IBPB on VMEXIT':
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IBPB is issued on every VM-exit. This occurs when other mitigations like
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RETBLEED or SRSO are already issuing IBPB on VM-exit.
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Mitigation control on the kernel command line
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----------------------------------------------
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The mitigation can be controlled via the ``vmscape=`` command line parameter:
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* ``vmscape=off``:
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Disable the VMSCAPE mitigation.
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* ``vmscape=ibpb``:
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Enable conditional IBPB mitigation (default when CONFIG_MITIGATION_VMSCAPE=y).
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* ``vmscape=force``:
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Force vulnerability detection and mitigation even on processors that are
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not known to be affected.

Documentation/admin-guide/kernel-parameters.txt

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srbds=off [X86,INTEL]
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ssbd=force-off [ARM64]
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tsx_async_abort=off [X86]
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vmscape=off [X86]
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Exceptions:
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This does not have any effect on
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vmpoff= [KNL,S390] Perform z/VM CP command after power off.
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Format: <command>
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vmscape= [X86] Controls mitigation for VMscape attacks.
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VMscape attacks can leak information from a userspace
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hypervisor to a guest via speculative side-channels.
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off - disable the mitigation
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ibpb - use Indirect Branch Prediction Barrier
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(IBPB) mitigation (default)
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force - force vulnerability detection even on
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unaffected processors
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vsyscall= [X86-64,EARLY]
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Controls the behavior of vsyscalls (i.e. calls to
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fixed addresses of 0xffffffffff600x00 from legacy

Makefile

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# SPDX-License-Identifier: GPL-2.0
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VERSION = 6
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PATCHLEVEL = 16
4-
SUBLEVEL = 6
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SUBLEVEL = 7
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EXTRAVERSION =
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NAME = Baby Opossum Posse
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arch/x86/Kconfig

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security vulnerability on AMD CPUs which can lead to forwarding of
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invalid info to subsequent instructions and thus can affect their
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timing and thereby cause a leakage.
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config MITIGATION_VMSCAPE
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bool "Mitigate VMSCAPE"
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depends on KVM
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default y
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help
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Enable mitigation for VMSCAPE attacks. VMSCAPE is a hardware security
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vulnerability on Intel and AMD CPUs that may allow a guest to do
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Spectre v2 style attacks on userspace hypervisor.
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endif
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config ARCH_HAS_ADD_PAGES

arch/x86/include/asm/cpufeatures.h

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#define X86_FEATURE_TSA_SQ_NO (21*32+11) /* AMD CPU not vulnerable to TSA-SQ */
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#define X86_FEATURE_TSA_L1_NO (21*32+12) /* AMD CPU not vulnerable to TSA-L1 */
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#define X86_FEATURE_CLEAR_CPU_BUF_VM (21*32+13) /* Clear CPU buffers using VERW before VMRUN */
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#define X86_FEATURE_IBPB_EXIT_TO_USER (21*32+14) /* Use IBPB on exit-to-userspace, see VMSCAPE bug */
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/*
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* BUG word(s)
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#define X86_BUG_ITS X86_BUG( 1*32+ 7) /* "its" CPU is affected by Indirect Target Selection */
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#define X86_BUG_ITS_NATIVE_ONLY X86_BUG( 1*32+ 8) /* "its_native_only" CPU is affected by ITS, VMX is not affected */
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#define X86_BUG_TSA X86_BUG( 1*32+ 9) /* "tsa" CPU is affected by Transient Scheduler Attacks */
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#define X86_BUG_VMSCAPE X86_BUG( 1*32+10) /* "vmscape" CPU is affected by VMSCAPE attacks from guests */
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#endif /* _ASM_X86_CPUFEATURES_H */

arch/x86/include/asm/entry-common.h

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* 8 (ia32) bits.
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*/
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choose_random_kstack_offset(rdtsc());
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/* Avoid unnecessary reads of 'x86_ibpb_exit_to_user' */
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if (cpu_feature_enabled(X86_FEATURE_IBPB_EXIT_TO_USER) &&
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this_cpu_read(x86_ibpb_exit_to_user)) {
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indirect_branch_prediction_barrier();
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this_cpu_write(x86_ibpb_exit_to_user, false);
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}
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}
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#define arch_exit_to_user_mode_prepare arch_exit_to_user_mode_prepare
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arch/x86/include/asm/nospec-branch.h

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: "memory");
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}
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DECLARE_PER_CPU(bool, x86_ibpb_exit_to_user);
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static inline void indirect_branch_prediction_barrier(void)
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{
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asm_inline volatile(ALTERNATIVE("", "call write_ibpb", X86_FEATURE_IBPB)

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