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| 1 | +// Copyright 2010-2016 Espressif Systems (Shanghai) PTE LTD |
| 2 | +// |
| 3 | +// Licensed under the Apache License, Version 2.0 (the "License"); |
| 4 | +// you may not use this file except in compliance with the License. |
| 5 | +// You may obtain a copy of the License at |
| 6 | + |
| 7 | +// http://www.apache.org/licenses/LICENSE-2.0 |
| 8 | +// |
| 9 | +// Unless required by applicable law or agreed to in writing, software |
| 10 | +// distributed under the License is distributed on an "AS IS" BASIS, |
| 11 | +// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
| 12 | +// See the License for the specific language governing permissions and |
| 13 | +// limitations under the License. |
| 14 | + |
| 15 | +#ifndef _DRIVER_TIMER_H_ |
| 16 | +#define _DRIVER_TIMER_H_ |
| 17 | +#include "esp_err.h" |
| 18 | +#include "esp_attr.h" |
| 19 | +#include "soc/soc.h" |
| 20 | +#include "soc/timer_group_reg.h" |
| 21 | +#include "soc/timer_group_struct.h" |
| 22 | + |
| 23 | +#ifdef __cplusplus |
| 24 | +extern "C" { |
| 25 | +#endif |
| 26 | + |
| 27 | + |
| 28 | +#define TIMER_BASE_CLK (APB_CLK_FREQ) |
| 29 | +/** |
| 30 | + * @brief Selects a Timer-Group out of 2 available groups |
| 31 | + */ |
| 32 | +typedef enum { |
| 33 | + TIMER_GROUP_0 = 0, /*!<Hw timer group 0*/ |
| 34 | + TIMER_GROUP_1 = 1, /*!<Hw timer group 1*/ |
| 35 | + TIMER_GROUP_MAX, |
| 36 | +} timer_group_t; |
| 37 | + |
| 38 | +/** |
| 39 | + * @brief Select a hardware timer from timer groups |
| 40 | + */ |
| 41 | +typedef enum { |
| 42 | + TIMER_0 = 0, /*!<Select timer0 of GROUPx*/ |
| 43 | + TIMER_1 = 1, /*!<Select timer1 of GROUPx*/ |
| 44 | + TIMER_MAX, |
| 45 | +} timer_idx_t; |
| 46 | + |
| 47 | +/** |
| 48 | + * @brief Decides the direction of counter |
| 49 | + */ |
| 50 | +typedef enum { |
| 51 | + TIMER_COUNT_DOWN = 0, /*!< Descending Count from cnt.high|cnt.low*/ |
| 52 | + TIMER_COUNT_UP = 1, /*!< Ascending Count from Zero*/ |
| 53 | + TIMER_COUNT_MAX |
| 54 | +} timer_count_dir_t; |
| 55 | + |
| 56 | +/** |
| 57 | + * @brief Decides whether timer is on or paused |
| 58 | + */ |
| 59 | +typedef enum { |
| 60 | + TIMER_PAUSE = 0, /*!<Pause timer counter*/ |
| 61 | + TIMER_START = 1, /*!<Start timer counter*/ |
| 62 | +} timer_start_t; |
| 63 | + |
| 64 | +/** |
| 65 | + * @brief Decides whether to enable alarm mode |
| 66 | + */ |
| 67 | +typedef enum { |
| 68 | + TIMER_ALARM_DIS = 0, /*!< Disable timer alarm*/ |
| 69 | + TIMER_ALARM_EN = 1, /*!< Enable timer alarm*/ |
| 70 | + TIMER_ALARM_MAX |
| 71 | +} timer_alarm_t; |
| 72 | + |
| 73 | +/** |
| 74 | + * @brief Select interrupt type if running in alarm mode. |
| 75 | + */ |
| 76 | +typedef enum { |
| 77 | + TIMER_INTR_LEVEL = 0, /*!< Interrupt mode: level mode*/ |
| 78 | + //TIMER_INTR_EDGE = 1, /*!< Interrupt mode: edge mode, Not supported Now*/ |
| 79 | + TIMER_INTR_MAX |
| 80 | +} timer_intr_mode_t; |
| 81 | + |
| 82 | +/** |
| 83 | + * @brief Select if Alarm needs to be loaded by software or automatically reload by hardware. |
| 84 | + */ |
| 85 | +typedef enum { |
| 86 | + TIMER_AUTORELOAD_DIS = 0, /*!< Disable auto-reload: hardware will not load counter value after an alarm event*/ |
| 87 | + TIMER_AUTORELOAD_EN = 1, /*!< Enable auto-reload: hardware will load counter value after an alarm event*/ |
| 88 | + TIMER_AUTORELOAD_MAX, |
| 89 | +} timer_autoreload_t; |
| 90 | + |
| 91 | +/** |
| 92 | + * @brief timer configure struct |
| 93 | + */ |
| 94 | +typedef struct { |
| 95 | + bool alarm_en; /*!< Timer alarm enable */ |
| 96 | + bool counter_en; /*!< Counter enable */ |
| 97 | + timer_count_dir_t counter_dir; /*!< Counter direction */ |
| 98 | + timer_intr_mode_t intr_type; /*!< Interrupt mode */ |
| 99 | + bool auto_reload; /*!< Timer auto-reload */ |
| 100 | + uint16_t divider; /*!< Counter clock divider*/ |
| 101 | +} timer_config_t; |
| 102 | + |
| 103 | +/** |
| 104 | + * @brief Read the counter value of hardware timer. |
| 105 | + * |
| 106 | + * @param group_num Timer group, 0 for TIMERG0 or 1 for TIMERG1 |
| 107 | + * @param timer_num Timer index, 0 for hw_timer[0] & 1 for hw_timer[1] |
| 108 | + * @param timer_val Pointer to accept timer counter value. |
| 109 | + * |
| 110 | + * @return |
| 111 | + * - ESP_OK Success |
| 112 | + * - ESP_ERR_INVALID_ARG Parameter error |
| 113 | + */ |
| 114 | +esp_err_t timer_get_counter_value(timer_group_t group_num, timer_idx_t timer_num, uint64_t* timer_val); |
| 115 | + |
| 116 | +/** |
| 117 | + * @brief Read the counter value of hardware timer, in unit of a given scale. |
| 118 | + * |
| 119 | + * @param group_num Timer group, 0 for TIMERG0 or 1 for TIMERG1 |
| 120 | + * @param timer_num Timer index, 0 for hw_timer[0] & 1 for hw_timer[1] |
| 121 | + * @param time Pointer, type of double*, to accept timer counter value, in seconds. |
| 122 | + * |
| 123 | + * @return |
| 124 | + * - ESP_OK Success |
| 125 | + * - ESP_ERR_INVALID_ARG Parameter error |
| 126 | + */ |
| 127 | +esp_err_t timer_get_counter_time_sec(timer_group_t group_num, timer_idx_t timer_num, double* time); |
| 128 | + |
| 129 | +/** |
| 130 | + * @brief Set counter value to hardware timer. |
| 131 | + * |
| 132 | + * @param group_num Timer group, 0 for TIMERG0 or 1 for TIMERG1 |
| 133 | + * @param timer_num Timer index, 0 for hw_timer[0] & 1 for hw_timer[1] |
| 134 | + * @param load_val Counter value to write to the hardware timer. |
| 135 | + * |
| 136 | + * @return |
| 137 | + * - ESP_OK Success |
| 138 | + * - ESP_ERR_INVALID_ARG Parameter error |
| 139 | + */ |
| 140 | +esp_err_t timer_set_counter_value(timer_group_t group_num, timer_idx_t timer_num, uint64_t load_val); |
| 141 | + |
| 142 | +/** |
| 143 | + * @brief Start the counter of hardware timer. |
| 144 | + * |
| 145 | + * @param group_num Timer group number, 0 for TIMERG0 or 1 for TIMERG1 |
| 146 | + * @param timer_num Timer index, 0 for hw_timer[0] & 1 for hw_timer[1] |
| 147 | + * |
| 148 | + * @return |
| 149 | + * - ESP_OK Success |
| 150 | + * - ESP_ERR_INVALID_ARG Parameter error |
| 151 | + */ |
| 152 | +esp_err_t timer_start(timer_group_t group_num, timer_idx_t timer_num); |
| 153 | + |
| 154 | +/** |
| 155 | + * @brief Pause the counter of hardware timer. |
| 156 | + * |
| 157 | + * @param group_num Timer group number, 0 for TIMERG0 or 1 for TIMERG1 |
| 158 | + * @param timer_num Timer index, 0 for hw_timer[0] & 1 for hw_timer[1] |
| 159 | + * |
| 160 | + * @return |
| 161 | + * - ESP_OK Success |
| 162 | + * - ESP_ERR_INVALID_ARG Parameter error |
| 163 | + */ |
| 164 | +esp_err_t timer_pause(timer_group_t group_num, timer_idx_t timer_num); |
| 165 | + |
| 166 | +/** |
| 167 | + * @brief Set counting mode for hardware timer. |
| 168 | + * |
| 169 | + * @param group_num Timer group number, 0 for TIMERG0 or 1 for TIMERG1 |
| 170 | + * @param timer_num Timer index, 0 for hw_timer[0] & 1 for hw_timer[1] |
| 171 | + * @param counter_dir Counting direction of timer, count-up or count-down |
| 172 | + * |
| 173 | + * @return |
| 174 | + * - ESP_OK Success |
| 175 | + * - ESP_ERR_INVALID_ARG Parameter error |
| 176 | + */ |
| 177 | +esp_err_t timer_set_counter_mode(timer_group_t group_num, timer_idx_t timer_num, timer_count_dir_t counter_dir); |
| 178 | + |
| 179 | +/** |
| 180 | + * @brief Enable or disable counter reload function when alarm event occurs. |
| 181 | + * |
| 182 | + * @param group_num Timer group number, 0 for TIMERG0 or 1 for TIMERG1 |
| 183 | + * @param timer_num Timer index, 0 for hw_timer[0] & 1 for hw_timer[1] |
| 184 | + * @param reload Counter reload mode. |
| 185 | + * |
| 186 | + * @return |
| 187 | + * - ESP_OK Success |
| 188 | + * - ESP_ERR_INVALID_ARG Parameter error |
| 189 | + */ |
| 190 | +esp_err_t timer_set_auto_reload(timer_group_t group_num, timer_idx_t timer_num, timer_autoreload_t reload); |
| 191 | + |
| 192 | +/** |
| 193 | + * @brief Set hardware timer source clock divider. Timer groups clock are divider from APB clock. |
| 194 | + * |
| 195 | + * @param group_num Timer group number, 0 for TIMERG0 or 1 for TIMERG1 |
| 196 | + * @param timer_num Timer index, 0 for hw_timer[0] & 1 for hw_timer[1] |
| 197 | + * @param divider Timer clock divider value. |
| 198 | + * |
| 199 | + * @return |
| 200 | + * - ESP_OK Success |
| 201 | + * - ESP_ERR_INVALID_ARG Parameter error |
| 202 | + */ |
| 203 | +esp_err_t timer_set_divider(timer_group_t group_num, timer_idx_t timer_num, uint16_t divider); |
| 204 | + |
| 205 | +/** |
| 206 | + * @brief Set timer alarm value. |
| 207 | + * |
| 208 | + * @param group_num Timer group, 0 for TIMERG0 or 1 for TIMERG1 |
| 209 | + * @param timer_num Timer index, 0 for hw_timer[0] & 1 for hw_timer[1] |
| 210 | + * @param alarm_value A 64-bit value to set the alarm value. |
| 211 | + * |
| 212 | + * @return |
| 213 | + * - ESP_OK Success |
| 214 | + * - ESP_ERR_INVALID_ARG Parameter error |
| 215 | + */ |
| 216 | +esp_err_t timer_set_alarm_value(timer_group_t group_num, timer_idx_t timer_num, uint64_t alarm_value); |
| 217 | + |
| 218 | +/** |
| 219 | + * @brief Get timer alarm value. |
| 220 | + * |
| 221 | + * @param group_num Timer group, 0 for TIMERG0 or 1 for TIMERG1 |
| 222 | + * @param timer_num Timer index, 0 for hw_timer[0] & 1 for hw_timer[1] |
| 223 | + * @param alarm_value Pointer of A 64-bit value to accept the alarm value. |
| 224 | + * |
| 225 | + * @return |
| 226 | + * - ESP_OK Success |
| 227 | + * - ESP_ERR_INVALID_ARG Parameter error |
| 228 | + */ |
| 229 | +esp_err_t timer_get_alarm_value(timer_group_t group_num, timer_idx_t timer_num, uint64_t* alarm_value); |
| 230 | + |
| 231 | +/** |
| 232 | + * @brief Get timer alarm value. |
| 233 | + * |
| 234 | + * @param group_num Timer group, 0 for TIMERG0 or 1 for TIMERG1 |
| 235 | + * @param timer_num Timer index, 0 for hw_timer[0] & 1 for hw_timer[1] |
| 236 | + * @param alarm_en To enable or disable timer alarm function. |
| 237 | + * |
| 238 | + * @return |
| 239 | + * - ESP_OK Success |
| 240 | + * - ESP_ERR_INVALID_ARG Parameter error |
| 241 | + */ |
| 242 | +esp_err_t timer_set_alarm(timer_group_t group_num, timer_idx_t timer_num, timer_alarm_t alarm_en); |
| 243 | + |
| 244 | + |
| 245 | +/** |
| 246 | + * @brief register Timer interrupt handler, the handler is an ISR. |
| 247 | + * The handler will be attached to the same CPU core that this function is running on. |
| 248 | + * @note |
| 249 | + * Users should know that which CPU is running and then pick a INUM that is not used by system. |
| 250 | + * We can find the information of INUM and interrupt level in soc.h. |
| 251 | + * |
| 252 | + * @param group_num Timer group number |
| 253 | + * @param timer_num Timer index of timer group |
| 254 | + * @param timer_intr_num TIMER interrupt number, check the info in soc.h, and please see the core-isa.h for more details |
| 255 | + * @param intr_type Timer interrupt type |
| 256 | + * @param fn Interrupt handler function. |
| 257 | + * @note |
| 258 | + * Code inside the handler function can only call functions in IRAM, so cannot call other timer APIs. |
| 259 | + * Use direct register access to access timers from inside the ISR. |
| 260 | + * |
| 261 | + * @param arg Parameter for handler function |
| 262 | + * |
| 263 | + * @return |
| 264 | + * - ESP_OK Success |
| 265 | + * - ESP_ERR_INVALID_ARG Function pointer error. |
| 266 | + * |
| 267 | + * @return |
| 268 | + * - ESP_OK Success |
| 269 | + * - ESP_ERR_INVALID_ARG Parameter error |
| 270 | + */ |
| 271 | +esp_err_t timer_isr_register(timer_group_t group_num, timer_idx_t timer_num, int timer_intr_num, timer_intr_mode_t intr_type, void (*fn)(void*), void * arg); |
| 272 | + |
| 273 | +/** @brief Initializes and configure the timer. |
| 274 | + * |
| 275 | + * @param group_num Timer group number, 0 for TIMERG0 or 1 for TIMERG1 |
| 276 | + * @param timer_num Timer index, 0 for hw_timer[0] & 1 for hw_timer[1] |
| 277 | + * @param config Pointer to timer initialization parameters. |
| 278 | + * |
| 279 | + * @return |
| 280 | + * - ESP_OK Success |
| 281 | + * - ESP_ERR_INVALID_ARG Parameter error |
| 282 | + */ |
| 283 | +esp_err_t timer_init(timer_group_t group_num, timer_idx_t timer_num, timer_config_t* config); |
| 284 | + |
| 285 | +/** @brief Get timer configure value. |
| 286 | + * |
| 287 | + * @param group_num Timer group number, 0 for TIMERG0 or 1 for TIMERG1 |
| 288 | + * @param timer_num Timer index, 0 for hw_timer[0] & 1 for hw_timer[1] |
| 289 | + * @param config Pointer of struct to accept timer parameters. |
| 290 | + * |
| 291 | + * @return |
| 292 | + * - ESP_OK Success |
| 293 | + * - ESP_ERR_INVALID_ARG Parameter error |
| 294 | + */ |
| 295 | +esp_err_t timer_get_config(timer_group_t group_num, timer_idx_t timer_num, timer_config_t *config); |
| 296 | + |
| 297 | +/** @brief Enable timer group interrupt, by enable mask |
| 298 | + * |
| 299 | + * @param group_num Timer group number, 0 for TIMERG0 or 1 for TIMERG1 |
| 300 | + * @param en_mask Timer interrupt enable mask. |
| 301 | + * Use TIMG_T0_INT_ENA_M to enable t0 interrupt |
| 302 | + * Use TIMG_T1_INT_ENA_M to enable t1 interrupt |
| 303 | + * |
| 304 | + * @return |
| 305 | + * - ESP_OK Success |
| 306 | + * - ESP_ERR_INVALID_ARG Parameter error |
| 307 | + */ |
| 308 | +esp_err_t timer_group_intr_enable(timer_group_t group_num, uint32_t en_mask); |
| 309 | + |
| 310 | +/** @brief Disable timer group interrupt, by disable mask |
| 311 | + * |
| 312 | + * @param group_num Timer group number, 0 for TIMERG0 or 1 for TIMERG1 |
| 313 | + * @param disable_mask Timer interrupt disable mask. |
| 314 | + * Use TIMG_T0_INT_ENA_M to disable t0 interrupt |
| 315 | + * Use TIMG_T1_INT_ENA_M to disable t1 interrupt |
| 316 | + * |
| 317 | + * @return |
| 318 | + * - ESP_OK Success |
| 319 | + * - ESP_ERR_INVALID_ARG Parameter error |
| 320 | + */ |
| 321 | +esp_err_t timer_group_intr_disable(timer_group_t group_num, uint32_t disable_mask); |
| 322 | + |
| 323 | +/** @brief Enable timer interrupt |
| 324 | + * |
| 325 | + * @param group_num Timer group number, 0 for TIMERG0 or 1 for TIMERG1 |
| 326 | + * @param timer_num Timer index. |
| 327 | + * |
| 328 | + * @return |
| 329 | + * - ESP_OK Success |
| 330 | + * - ESP_ERR_INVALID_ARG Parameter error |
| 331 | + */ |
| 332 | +esp_err_t timer_enable_intr(timer_group_t group_num, timer_idx_t timer_num); |
| 333 | + |
| 334 | +/** @brief Disable timer interrupt |
| 335 | + * |
| 336 | + * @param group_num Timer group number, 0 for TIMERG0 or 1 for TIMERG1 |
| 337 | + * @param timer_num Timer index. |
| 338 | + * |
| 339 | + * @return |
| 340 | + * - ESP_OK Success |
| 341 | + * - ESP_ERR_INVALID_ARG Parameter error |
| 342 | + */ |
| 343 | +esp_err_t timer_disable_intr(timer_group_t group_num, timer_idx_t timer_num); |
| 344 | + |
| 345 | +#ifdef __cplusplus |
| 346 | +} |
| 347 | +#endif |
| 348 | + |
| 349 | +#endif /* _TIMER_H_ */ |
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