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esp8266.svd
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<?xml version="1.0" encoding="UTF-8"?>
<device schemaVersion="1.0" xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1.0.xsd" xmlns:xs="http://www.w3.org/2001/XMLSchema-instance">
<name>ESP8266</name>
<version>1.0</version>
<description>ESP8266</description>
<addressUnitBits>8</addressUnitBits>
<width>32</width>
<cpu>
<name>Xtensa LX106</name>
<revision>1</revision>
<endian>little</endian>
<mpuPresent>false</mpuPresent>
<fpuPresent>true</fpuPresent>
<nvicPrioBits>3</nvicPrioBits>
<vendorSystickConfig>false</vendorSystickConfig>
</cpu>
<peripherals>
<peripheral>
<name>DPORT</name>
<baseAddress>0x3ff00000</baseAddress>
<addressBlock>
<offset>0</offset>
<size>0x00000040</size>
<usage>registers</usage>
</addressBlock>
<registers>
<register>
<name>EDGE_INT_ENABLE</name>
<addressOffset>0x4</addressOffset>
<description>EDGE_INT_ENABLE</description>
<size>32</size>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>Register</name>
<bitOffset>0</bitOffset>
<bitWidth>32</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>DPORT_CTL</name>
<addressOffset>0x14</addressOffset>
<description>DPORT_CTL</description>
<size>32</size>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>DPORT_CTL_DOUBLE_CLK</name>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
</registers>
</peripheral>
<peripheral>
<name>EFUSE</name>
<baseAddress>0x3ff00050</baseAddress>
<addressBlock>
<offset>0</offset>
<size>0x00000080</size>
<usage>registers</usage>
</addressBlock>
<registers>
<register>
<name>EFUSE_DATA0</name>
<addressOffset>0x0</addressOffset>
<description>EFUSE_DATA0</description>
<size>32</size>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>Register</name>
<bitOffset>0</bitOffset>
<bitWidth>32</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>EFUSE_DATA1</name>
<addressOffset>0x4</addressOffset>
<description>EFUSE_DATA1</description>
<size>32</size>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>Register</name>
<bitOffset>0</bitOffset>
<bitWidth>32</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>EFUSE_DATA2</name>
<addressOffset>0x8</addressOffset>
<description>EFUSE_DATA2</description>
<size>32</size>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>Register</name>
<bitOffset>0</bitOffset>
<bitWidth>32</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>EFUSE_DATA3</name>
<addressOffset>0xc</addressOffset>
<description>EFUSE_DATA3</description>
<size>32</size>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>Register</name>
<bitOffset>0</bitOffset>
<bitWidth>32</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
</registers>
</peripheral>
<peripheral>
<name>GPIO</name>
<baseAddress>0x60000300</baseAddress>
<addressBlock>
<offset>0</offset>
<size>0x000003a0</size>
<usage>registers</usage>
</addressBlock>
<registers>
<register>
<name>GPIO_OUT</name>
<addressOffset>0x0</addressOffset>
<description>BT-Coexist Selection register</description>
<size>32</size>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>GPIO_BT_SEL</name>
<description>BT-Coexist Selection register</description>
<bitOffset>16</bitOffset>
<bitWidth>16</bitWidth>
<access>read-write</access>
</field>
<field>
<name>GPIO_OUT_DATA</name>
<description>The output value when the GPIO pin is set as output.</description>
<bitOffset>0</bitOffset>
<bitWidth>16</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>GPIO_OUT_W1TS</name>
<addressOffset>0x4</addressOffset>
<description>GPIO_OUT_W1TS</description>
<size>32</size>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>GPIO_OUT_DATA_W1TS</name>
<description>Writing 1 into a bit in this register will set the related bit in GPIO_OUT_DATA</description>
<bitOffset>0</bitOffset>
<bitWidth>16</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>GPIO_OUT_W1TC</name>
<addressOffset>0x8</addressOffset>
<description>GPIO_OUT_W1TC</description>
<size>32</size>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>GPIO_OUT_DATA_W1TC</name>
<description>Writing 1 into a bit in this register will clear the related bit in GPIO_OUT_DATA</description>
<bitOffset>0</bitOffset>
<bitWidth>16</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>GPIO_ENABLE</name>
<addressOffset>0xc</addressOffset>
<description>GPIO_ENABLE</description>
<size>32</size>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>GPIO_SDIO_SEL</name>
<description>SDIO-dis selection register</description>
<bitOffset>16</bitOffset>
<bitWidth>6</bitWidth>
<access>read-write</access>
</field>
<field>
<name>GPIO_ENABLE_DATA</name>
<description>The output enable register.</description>
<bitOffset>0</bitOffset>
<bitWidth>16</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>GPIO_ENABLE_W1TS</name>
<addressOffset>0x10</addressOffset>
<description>GPIO_ENABLE_W1TS</description>
<size>32</size>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>GPIO_ENABLE_DATA_W1TS</name>
<description>Writing 1 into a bit in this register will set the related bit in GPIO_ENABLE_DATA</description>
<bitOffset>0</bitOffset>
<bitWidth>16</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>GPIO_ENABLE_W1TC</name>
<addressOffset>0x14</addressOffset>
<description>GPIO_ENABLE_W1TC</description>
<size>32</size>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>GPIO_ENABLE_DATA_W1TC</name>
<description>Writing 1 into a bit in this register will clear the related bit in GPIO_ENABLE_DATA</description>
<bitOffset>0</bitOffset>
<bitWidth>16</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>GPIO_IN</name>
<addressOffset>0x18</addressOffset>
<description>The values of the strapping pins.</description>
<size>32</size>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>GPIO_STRAPPING</name>
<description>The values of the strapping pins.</description>
<bitOffset>16</bitOffset>
<bitWidth>16</bitWidth>
<access>read-write</access>
</field>
<field>
<name>GPIO_IN_DATA</name>
<description>The values of the GPIO pins when the GPIO pin is set as input.</description>
<bitOffset>0</bitOffset>
<bitWidth>16</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>GPIO_STATUS</name>
<addressOffset>0x1c</addressOffset>
<description>GPIO_STATUS</description>
<size>32</size>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>GPIO_STATUS_INTERRUPT</name>
<description>Interrupt enable register.</description>
<bitOffset>0</bitOffset>
<bitWidth>16</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>GPIO_STATUS_W1TS</name>
<addressOffset>0x20</addressOffset>
<description>GPIO_STATUS_W1TS</description>
<size>32</size>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>GPIO_STATUS_INTERRUPT_W1TS</name>
<description>Writing 1 into a bit in this register will set the related bit in GPIO_STATUS_INTERRUPT</description>
<bitOffset>0</bitOffset>
<bitWidth>16</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>GPIO_STATUS_W1TC</name>
<addressOffset>0x24</addressOffset>
<description>GPIO_STATUS_W1TC</description>
<size>32</size>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>GPIO_STATUS_INTERRUPT_W1TC</name>
<description>Writing 1 into a bit in this register will clear the related bit in GPIO_STATUS_INTERRUPT</description>
<bitOffset>0</bitOffset>
<bitWidth>16</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>GPIO_PIN0</name>
<addressOffset>0x28</addressOffset>
<description>GPIO_PIN0</description>
<size>32</size>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>GPIO_PIN0_WAKEUP_ENABLE</name>
<description>0: disable; 1: enable GPIO wakeup CPU, only when GPIO_PIN0_INT_TYPE is 0x4 or 0x5</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>GPIO_PIN0_INT_TYPE</name>
<description>0: disable; 1: positive edge; 2: negative edge; 3: both types of edge; 4: low-level; 5: high-level</description>
<bitOffset>7</bitOffset>
<bitWidth>3</bitWidth>
<access>read-write</access>
</field>
<field>
<name>GPIO_PIN0_DRIVER</name>
<description>1: open drain; 0: normal</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>GPIO_PIN0_SOURCE</name>
<description>1: sigma-delta; 0: GPIO_DATA</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>GPIO_PIN1</name>
<addressOffset>0x2c</addressOffset>
<description>GPIO_PIN1</description>
<size>32</size>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>GPIO_PIN1_WAKEUP_ENABLE</name>
<description>0: disable; 1: enable GPIO wakeup CPU, only when GPIO_PIN0_INT_TYPE is 0x4 or 0x5</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>GPIO_PIN1_INT_TYPE</name>
<description>0: disable; 1: positive edge; 2: negative edge; 3: both types of edge; 4: low-level; 5: high-level</description>
<bitOffset>7</bitOffset>
<bitWidth>3</bitWidth>
<access>read-write</access>
</field>
<field>
<name>GPIO_PIN1_DRIVER</name>
<description>1: open drain; 0: normal</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>GPIO_PIN1_SOURCE</name>
<description>1: sigma-delta; 0: GPIO_DATA</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>GPIO_PIN2</name>
<addressOffset>0x30</addressOffset>
<description>GPIO_PIN2</description>
<size>32</size>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>GPIO_PIN2_WAKEUP_ENABLE</name>
<description>0: disable; 1: enable GPIO wakeup CPU, only when GPIO_PIN0_INT_TYPE is 0x4 or 0x5</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>GPIO_PIN2_INT_TYPE</name>
<description>0: disable; 1: positive edge; 2: negative edge; 3: both types of edge; 4: low-level; 5: high-level</description>
<bitOffset>7</bitOffset>
<bitWidth>3</bitWidth>
<access>read-write</access>
</field>
<field>
<name>GPIO_PIN2_DRIVER</name>
<description>1: open drain; 0: normal</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>GPIO_PIN2_SOURCE</name>
<description>1: sigma-delta; 0: GPIO_DATA</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>GPIO_PIN3</name>
<addressOffset>0x34</addressOffset>
<description>GPIO_PIN3</description>
<size>32</size>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>GPIO_PIN3_WAKEUP_ENABLE</name>
<description>0: disable; 1: enable GPIO wakeup CPU, only when GPIO_PIN0_INT_TYPE is 0x4 or 0x5</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>GPIO_PIN3_INT_TYPE</name>
<description>0: disable; 1: positive edge; 2: negative edge; 3: both types of edge; 4: low-level; 5: high-level</description>
<bitOffset>7</bitOffset>
<bitWidth>3</bitWidth>
<access>read-write</access>
</field>
<field>
<name>GPIO_PIN3_DRIVER</name>
<description>1: open drain; 0: normal</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>GPIO_PIN3_SOURCE</name>
<description>1: sigma-delta; 0: GPIO_DATA</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>GPIO_PIN4</name>
<addressOffset>0x38</addressOffset>
<description>GPIO_PIN4</description>
<size>32</size>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>GPIO_PIN4_WAKEUP_ENABLE</name>
<description>0: disable; 1: enable GPIO wakeup CPU, only when GPIO_PIN0_INT_TYPE is 0x4 or 0x5</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>GPIO_PIN4_INT_TYPE</name>
<description>0: disable; 1: positive edge; 2: negative edge; 3: both types of edge; 4: low-level; 5: high-level</description>
<bitOffset>7</bitOffset>
<bitWidth>3</bitWidth>
<access>read-write</access>
</field>
<field>
<name>GPIO_PIN4_DRIVER</name>
<description>1: open drain; 0: normal</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>GPIO_PIN4_SOURCE</name>
<description>1: sigma-delta; 0: GPIO_DATA</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>GPIO_PIN5</name>
<addressOffset>0x3c</addressOffset>
<description>GPIO_PIN5</description>
<size>32</size>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>GPIO_PIN5_WAKEUP_ENABLE</name>
<description>0: disable; 1: enable GPIO wakeup CPU, only when GPIO_PIN0_INT_TYPE is 0x4 or 0x5</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>GPIO_PIN5_INT_TYPE</name>
<description>0: disable; 1: positive edge; 2: negative edge; 3: both types of edge; 4: low-level; 5: high-level</description>
<bitOffset>7</bitOffset>
<bitWidth>3</bitWidth>
<access>read-write</access>
</field>
<field>
<name>GPIO_PIN5_DRIVER</name>
<description>1: open drain; 0: normal</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>GPIO_PIN5_SOURCE</name>
<description>1: sigma-delta; 0: GPIO_DATA</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>GPIO_PIN6</name>
<addressOffset>0x40</addressOffset>
<description>GPIO_PIN6</description>
<size>32</size>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>GPIO_PIN6_WAKEUP_ENABLE</name>
<description>0: disable; 1: enable GPIO wakeup CPU, only when GPIO_PIN0_INT_TYPE is 0x4 or 0x5</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>GPIO_PIN6_INT_TYPE</name>
<description>0: disable; 1: positive edge; 2: negative edge; 3: both types of edge; 4: low-level; 5: high-level</description>
<bitOffset>7</bitOffset>
<bitWidth>3</bitWidth>
<access>read-write</access>
</field>
<field>
<name>GPIO_PIN6_DRIVER</name>
<description>1: open drain; 0: normal</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>GPIO_PIN6_SOURCE</name>
<description>1: sigma-delta; 0: GPIO_DATA</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>GPIO_PIN7</name>
<addressOffset>0x44</addressOffset>
<description>GPIO_PIN7</description>
<size>32</size>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>GPIO_PIN7_WAKEUP_ENABLE</name>
<description>0: disable; 1: enable GPIO wakeup CPU, only when GPIO_PIN0_INT_TYPE is 0x4 or 0x5</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>GPIO_PIN7_INT_TYPE</name>
<description>0: disable; 1: positive edge; 2: negative edge; 3: both types of edge; 4: low-level; 5: high-level</description>
<bitOffset>7</bitOffset>
<bitWidth>3</bitWidth>
<access>read-write</access>
</field>
<field>
<name>GPIO_PIN7_DRIVER</name>
<description>1: open drain; 0: normal</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>GPIO_PIN7_SOURCE</name>
<description>1: sigma-delta; 0: GPIO_DATA</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>GPIO_PIN8</name>
<addressOffset>0x48</addressOffset>
<description>GPIO_PIN8</description>
<size>32</size>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>GPIO_PIN8_WAKEUP_ENABLE</name>
<description>0: disable; 1: enable GPIO wakeup CPU, only when GPIO_PIN0_INT_TYPE is 0x4 or 0x5</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>GPIO_PIN8_INT_TYPE</name>
<description>0: disable; 1: positive edge; 2: negative edge; 3: both types of edge; 4: low-level; 5: high-level</description>
<bitOffset>7</bitOffset>
<bitWidth>3</bitWidth>
<access>read-write</access>
</field>
<field>
<name>GPIO_PIN8_DRIVER</name>
<description>1: open drain; 0: normal</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>GPIO_PIN8_SOURCE</name>
<description>1: sigma-delta; 0: GPIO_DATA</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>GPIO_PIN9</name>
<addressOffset>0x4c</addressOffset>
<description>GPIO_PIN9</description>
<size>32</size>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>GPIO_PIN9_WAKEUP_ENABLE</name>
<description>0: disable; 1: enable GPIO wakeup CPU, only when GPIO_PIN0_INT_TYPE is 0x4 or 0x5</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>GPIO_PIN9_INT_TYPE</name>
<description>0: disable; 1: positive edge; 2: negative edge; 3: both types of edge; 4: low-level; 5: high-level</description>
<bitOffset>7</bitOffset>
<bitWidth>3</bitWidth>
<access>read-write</access>
</field>
<field>
<name>GPIO_PIN9_DRIVER</name>
<description>1: open drain; 0: normal</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>GPIO_PIN9_SOURCE</name>
<description>1: sigma-delta; 0: GPIO_DATA</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>GPIO_PIN10</name>
<addressOffset>0x50</addressOffset>
<description>GPIO_PIN10</description>
<size>32</size>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>GPIO_PIN10_WAKEUP_ENABLE</name>
<description>0: disable; 1: enable GPIO wakeup CPU, only when GPIO_PIN0_INT_TYPE is 0x4 or 0x5</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>GPIO_PIN10_INT_TYPE</name>
<description>0: disable; 1: positive edge; 2: negative edge; 3: both types of edge; 4: low-level; 5: high-level</description>
<bitOffset>7</bitOffset>
<bitWidth>3</bitWidth>
<access>read-write</access>
</field>
<field>
<name>GPIO_PIN10_DRIVER</name>
<description>1: open drain; 0: normal</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>GPIO_PIN10_SOURCE</name>
<description>1: sigma-delta; 0: GPIO_DATA</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>GPIO_PIN11</name>
<addressOffset>0x54</addressOffset>
<description>GPIO_PIN11</description>
<size>32</size>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>GPIO_PIN11_WAKEUP_ENABLE</name>
<description>0: disable; 1: enable GPIO wakeup CPU, only when GPIO_PIN0_INT_TYPE is 0x4 or 0x5</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>GPIO_PIN11_INT_TYPE</name>
<description>0: disable; 1: positive edge; 2: negative edge; 3: both types of edge; 4: low-level; 5: high-level</description>
<bitOffset>7</bitOffset>
<bitWidth>3</bitWidth>
<access>read-write</access>
</field>
<field>
<name>GPIO_PIN11_DRIVER</name>
<description>1: open drain; 0: normal</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>GPIO_PIN11_SOURCE</name>
<description>1: sigma-delta; 0: GPIO_DATA</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>GPIO_PIN12</name>
<addressOffset>0x58</addressOffset>
<description>GPIO_PIN12</description>
<size>32</size>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>GPIO_PIN12_WAKEUP_ENABLE</name>
<description>0: disable; 1: enable GPIO wakeup CPU, only when GPIO_PIN0_INT_TYPE is 0x4 or 0x5</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>GPIO_PIN12_INT_TYPE</name>
<description>0: disable; 1: positive edge; 2: negative edge; 3: both types of edge; 4: low-level; 5: high-level</description>
<bitOffset>7</bitOffset>
<bitWidth>3</bitWidth>
<access>read-write</access>
</field>
<field>
<name>GPIO_PIN12_DRIVER</name>
<description>1: open drain; 0: normal</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>GPIO_PIN12_SOURCE</name>
<description>1: sigma-delta; 0: GPIO_DATA</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>GPIO_PIN13</name>
<addressOffset>0x5c</addressOffset>
<description>GPIO_PIN13</description>
<size>32</size>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>GPIO_PIN13_WAKEUP_ENABLE</name>
<description>0: disable; 1: enable GPIO wakeup CPU, only when GPIO_PIN0_INT_TYPE is 0x4 or 0x5</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>GPIO_PIN13_INT_TYPE</name>
<description>0: disable; 1: positive edge; 2: negative edge; 3: both types of edge; 4: low-level; 5: high-level</description>
<bitOffset>7</bitOffset>
<bitWidth>3</bitWidth>
<access>read-write</access>
</field>
<field>
<name>GPIO_PIN13_DRIVER</name>
<description>1: open drain; 0: normal</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>GPIO_PIN13_SOURCE</name>
<description>1: sigma-delta; 0: GPIO_DATA</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>GPIO_PIN14</name>
<addressOffset>0x60</addressOffset>
<description>GPIO_PIN14</description>
<size>32</size>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>GPIO_PIN14_WAKEUP_ENABLE</name>
<description>0: disable; 1: enable GPIO wakeup CPU, only when GPIO_PIN0_INT_TYPE is 0x4 or 0x5</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>GPIO_PIN14_INT_TYPE</name>
<description>0: disable; 1: positive edge; 2: negative edge; 3: both types of edge; 4: low-level; 5: high-level</description>
<bitOffset>7</bitOffset>
<bitWidth>3</bitWidth>
<access>read-write</access>
</field>
<field>
<name>GPIO_PIN14_DRIVER</name>
<description>1: open drain; 0: normal</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>GPIO_PIN14_SOURCE</name>
<description>1: sigma-delta; 0: GPIO_DATA</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>GPIO_PIN15</name>
<addressOffset>0x64</addressOffset>
<description>GPIO_PIN15</description>
<size>32</size>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>GPIO_PIN15_WAKEUP_ENABLE</name>
<description>0: disable; 1: enable GPIO wakeup CPU, only when GPIO_PIN0_INT_TYPE is 0x4 or 0x5</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>GPIO_PIN15_INT_TYPE</name>
<description>0: disable; 1: positive edge; 2: negative edge; 3: both types of edge; 4: low-level; 5: high-level</description>
<bitOffset>7</bitOffset>
<bitWidth>3</bitWidth>
<access>read-write</access>
</field>
<field>
<name>GPIO_PIN15_DRIVER</name>
<description>1: open drain; 0: normal</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>GPIO_PIN15_SOURCE</name>
<description>1: sigma-delta; 0: GPIO_DATA</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>GPIO_SIGMA_DELTA</name>
<addressOffset>0x68</addressOffset>
<description>GPIO_SIGMA_DELTA</description>
<size>32</size>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>SIGMA_DELTA_ENABLE</name>
<description>1: enable sigma-delta; 0: disable</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SIGMA_DELTA_PRESCALAR</name>
<description>Clock pre-divider for sigma-delta.</description>
<bitOffset>8</bitOffset>
<bitWidth>8</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SIGMA_DELTA_TARGET</name>
<description>target level of the sigma-delta. It is a signed byte.</description>
<bitOffset>0</bitOffset>
<bitWidth>8</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>GPIO_RTC_CALIB_SYNC</name>
<addressOffset>0x6c</addressOffset>
<description>Positvie edge of this bit will trigger the RTC-clock-calibration process.</description>
<size>32</size>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>RTC_CALIB_START</name>
<description>Positvie edge of this bit will trigger the RTC-clock-calibration process.</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>RTC_PERIOD_NUM</name>
<description>The cycle number of RTC-clock during RTC-clock-calibration</description>
<bitOffset>0</bitOffset>
<bitWidth>10</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>GPIO_RTC_CALIB_VALUE</name>
<addressOffset>0x70</addressOffset>
<description>0: during RTC-clock-calibration; 1: RTC-clock-calibration is done</description>
<size>32</size>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>RTC_CALIB_RDY</name>
<description>0: during RTC-clock-calibration; 1: RTC-clock-calibration is done</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>RTC_CALIB_RDY_REAL</name>
<description>0: during RTC-clock-calibration; 1: RTC-clock-calibration is done</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>RTC_CALIB_VALUE</name>
<description>The cycle number of clk_xtal (crystal clock) for the RTC_PERIOD_NUM cycles of RTC-clock</description>
<bitOffset>0</bitOffset>
<bitWidth>20</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
</registers>
</peripheral>
<peripheral>
<name>I2S</name>
<baseAddress>0x60000e00</baseAddress>
<addressBlock>