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Portenta: split flash via menus
* Relocate SDRAM at 0x60000000 to make it executable without touching the MPU * Patch mbed-os-to-arduino to automatically patch the linker scripts
1 parent 060d892 commit e93d792

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16 files changed

+136
-20
lines changed

16 files changed

+136
-20
lines changed

boards.txt

+26-3
Original file line numberDiff line numberDiff line change
@@ -43,16 +43,25 @@ edge_control.bootloader.file=EDGE_CONTROL/bootloader.hex
4343

4444
##############################################################
4545

46+
menu.split=Flash split
47+
4648
envie_m7.name=Arduino Portenta H7 (M7 core)
4749
envie_m7.build.core=arduino
4850
envie_m7.build.crossprefix=arm-none-eabi-
4951
envie_m7.build.compiler_path={runtime.tools.arm-none-eabi-gcc-7-2017q4.path}/bin/
5052

53+
envie_m7.menu.split.50_50=1MB M7 + 1MB M4
54+
envie_m7.menu.split.75_25=1.5MB M7 + 0.5MB M4
55+
envie_m7.menu.split.100_0=2MB M7 + M4 in SDRAM
56+
5157
envie_m7.build.variant=PORTENTA_H7_M7
5258
envie_m7.build.mcu=cortex-m7
5359
envie_m7.build.fpu=-mfpu=fpv5-d16
5460
envie_m7.build.float-abi=-mfloat-abi=softfp
5561
envie_m7.build.extra_flags=
62+
envie_m7.menu.split.50_50.build.extra_ldflags=-DCM4_BINARY_START=0x08100000
63+
envie_m7.menu.split.75_25.build.extra_ldflags=-DCM4_BINARY_START=0x08180000
64+
envie_m7.menu.split.100_0.build.extra_ldflags=-DCM4_BINARY_START=0x60000000
5665
envie_m7.build.architecture=cortex-m7
5766
envie_m7.build.board=PORTENTA_H7_M7
5867
envie_m7.build.ldscript=linker_script.ld
@@ -81,7 +90,9 @@ envie_m7.upload.interface=0
8190
envie_m7.upload.use_1200bps_touch=true
8291
envie_m7.upload.wait_for_upload_port=true
8392
envie_m7.upload.native_usb=true
84-
envie_m7.upload.maximum_size=786432
93+
envie_m7.menu.split.50_50.upload.maximum_size=786432
94+
envie_m7.menu.split.75_25.upload.maximum_size=1441792
95+
envie_m7.menu.split.100_0.upload.maximum_size=1966080
8596
envie_m7.upload.maximum_data_size=523624
8697

8798
envie_m7.debug.tool=gdb
@@ -105,11 +116,18 @@ envie_m4.build.core=arduino
105116
envie_m4.build.crossprefix=arm-none-eabi-
106117
envie_m4.build.compiler_path={runtime.tools.arm-none-eabi-gcc-7-2017q4.path}/bin/
107118

119+
envie_m4.menu.split.50_50=1MB M7 + 1MB M4
120+
envie_m4.menu.split.75_25=1.5MB M7 + 0.5MB M4
121+
envie_m4.menu.split.100_0=2MB M7 + M4 in SDRAM
122+
108123
envie_m4.build.variant=PORTENTA_H7_M4
109124
envie_m4.build.mcu=cortex-m4
110125
envie_m4.build.fpu=-mfpu=fpv4-sp-d16
111126
envie_m4.build.float-abi=-mfloat-abi=softfp
112127
envie_m4.build.extra_flags=
128+
envie_m4.menu.split.50_50.build.extra_ldflags=-DCM4_BINARY_START=0x08100000 -DCM4_BINARY_END=0x08200000
129+
envie_m4.menu.split.75_25.build.extra_ldflags=-DCM4_BINARY_START=0x08180000 -DCM4_BINARY_END=0x08200000
130+
envie_m4.menu.split.100_0.build.extra_ldflags=-DCM4_BINARY_START=0x60000000 -DCM4_BINARY_END=0x60040000 -DCM4_RAM_END=0x60080000
113131
envie_m4.build.architecture=cortex-m4
114132
envie_m4.build.board=PORTENTA_H7_M4
115133
envie_m4.build.ldscript=linker_script.ld
@@ -132,12 +150,17 @@ envie_m4.upload.vid=0x2341
132150
envie_m4.upload.pid=0x035b
133151
envie_m4.upload.protocol=
134152
envie_m4.upload.transport=
135-
envie_m4.upload.address=0x08100000
136153
envie_m4.upload.interface=0
137154
envie_m4.upload.use_1200bps_touch=true
138155
envie_m4.upload.wait_for_upload_port=true
139156
envie_m4.upload.native_usb=true
140-
envie_m4.upload.maximum_size=1048576
157+
envie_m4.menu.split.50_50.upload.address=0x08100000
158+
envie_m4.menu.split.75_25.upload.address=0x08180000
159+
#make loading the M4 in this way fail - the user needs to provide a file via mass storage or similar interfaces
160+
envie_m4.menu.split.100_0.upload.address=
161+
envie_m4.menu.split.50_50.upload.maximum_size=1048576
162+
envie_m4.menu.split.75_25.upload.maximum_size=524288
163+
envie_m4.menu.split.100_0.upload.maximum_size=524288
141164
envie_m4.upload.maximum_data_size=294248
142165

143166
envie_m4.debug.tool=gdb

libraries/KernelDebug/src/KernelDebug.cpp

+1-1
Original file line numberDiff line numberDiff line change
@@ -305,7 +305,7 @@ static const char g_memoryMapXml[] = "<?xml version=\"1.0\"?>"
305305
"<memory type=\"ram\" start=\"0x58026000\" length=\"0x800\"> </memory>"
306306
"<memory type=\"ram\" start=\"0x58027000\" length=\"0x400\"> </memory>"
307307
"<memory type=\"flash\" start=\"0x90000000\" length=\"0x10000000\"> <property name=\"blocksize\">0x200</property></memory>"
308-
"<memory type=\"ram\" start=\"0xc0000000\" length=\"0x800000\"> </memory>"
308+
"<memory type=\"ram\" start=\"0x60000000\" length=\"0x800000\"> </memory>"
309309
"</memory-map>";
310310

311311
extern "C" uint32_t Platform_GetDeviceMemoryMapXmlSize(void)

libraries/Portenta_Camera/camera.cpp

+1-1
Original file line numberDiff line numberDiff line change
@@ -3,7 +3,7 @@
33
#include "camera.h"
44
#include "stm32h7xx_hal_dcmi.h"
55

6-
#define CAMERA_FRAME_BUFFER 0xC0200000
6+
#define CAMERA_FRAME_BUFFER SDRAM_START_ADDRESS + 0x200000
77

88
#define ARGB8888_BYTE_PER_PIXEL 4
99

libraries/Portenta_SDRAM/SDRAM.cpp

+37
Original file line numberDiff line numberDiff line change
@@ -18,10 +18,47 @@ int SDRAMClass::begin(uint32_t start_address) {
1818
then enable access/caching for the size used
1919
*/
2020

21+
if (SDRAM_START_ADDRESS != 0xC0000000) {
22+
printf("remap ram to 0x60000000\n");
23+
HAL_SetFMCMemorySwappingConfig(FMC_SWAPBMAP_SDRAM_SRAM);
24+
}
25+
26+
#if 0
27+
28+
printf("setup mpu\n");
29+
#define MPU_SDRAM_EXEC_REGION_NUMBER MPU_REGION_SDRAM1
30+
#define MPU_SDRAM_REGION_TEX (0x4 << MPU_RASR_TEX_Pos) /* Cached memory */
31+
#define MPU_SDRAM_EXEC_REGION_SIZE (22 << MPU_RASR_SIZE_Pos) /* 2^(22+1) = 8Mo */
32+
#define MPU_SDRAM_ACCESS_PERMSSION (0x03UL << MPU_RASR_AP_Pos)
33+
#define MPU_SDRAM_REGION_CACHABLE (0x01UL << MPU_RASR_C_Pos)
34+
#define MPU_SDRAM_REGION_BUFFERABLE (0x01UL << MPU_RASR_B_Pos)
35+
36+
MPU->CTRL &= ~MPU_CTRL_ENABLE_Msk;
37+
/* Configure SDARM region as first region */
38+
MPU->RNR = MPU_SDRAM_EXEC_REGION_NUMBER;
39+
/* Set MPU SDARM base address (0xD0000000) */
40+
MPU->RBAR = SDRAM_START_ADDRESS;
41+
/*
42+
- Execute region: RASR[size] = 22 -> 2^(22+1) -> size 8MB
43+
- Access permission: Full access: RASR[AP] = 0b011
44+
- Cached memory: RASR[TEX] = 0b0100
45+
- Disable the Execute Never option: to allow the code execution on SDRAM: RASR[XN] = 0
46+
- Enable the region MPU: RASR[EN] = 1
47+
*/
48+
MPU->RASR = (MPU_SDRAM_EXEC_REGION_SIZE | MPU_SDRAM_ACCESS_PERMSSION | MPU_SDRAM_REGION_TEX | \
49+
MPU_RASR_ENABLE_Msk | MPU_SDRAM_REGION_BUFFERABLE) & ~MPU_RASR_XN_Msk ;
50+
51+
/* Enable MPU and leave the predefined regions to default configuration */
52+
MPU->CTRL |= MPU_CTRL_PRIVDEFENA_Msk | MPU_CTRL_ENABLE_Msk;
53+
#endif
54+
55+
#if 0
2156
mpu_config_start();
2257
mpu_config_region(MPU_REGION_SDRAM1, SDRAM_START_ADDRESS, MPU_CONFIG_DISABLE(0x00, MPU_REGION_SIZE_512MB));
2358
mpu_config_region(MPU_REGION_SDRAM2, SDRAM_START_ADDRESS, MPU_CONFIG_SDRAM(SDRAM_MPU_REGION_SIZE));
2459
mpu_config_end();
60+
#endif
61+
2562
}
2663

2764
if (start_address) {

libraries/Portenta_SDRAM/SDRAM.h

+2-2
Original file line numberDiff line numberDiff line change
@@ -4,8 +4,8 @@
44

55
#include "Arduino.h"
66

7-
#define SDRAM_END_ADDRESS (0xC0800000)
8-
#define SDRAM_START_ADDRESS (0xC0000000)
7+
#define SDRAM_END_ADDRESS (0x60800000)
8+
#define SDRAM_START_ADDRESS (0x60000000)
99

1010
class SDRAMClass {
1111
public:

libraries/Portenta_SDRAM/ram_internal.c

+1-1
Original file line numberDiff line numberDiff line change
@@ -44,7 +44,7 @@ static HAL_StatusTypeDef FMC_SDRAM_Clock_Config(void)
4444
RCC_PeriphCLKInitStruct.FmcClockSelection = RCC_FMCCLKSOURCE_PLL2;
4545
RCC_PeriphCLKInitStruct.PLL2.PLL2RGE = RCC_PLL1VCIRANGE_2;
4646
RCC_PeriphCLKInitStruct.PLL2.PLL2M = 5;
47-
RCC_PeriphCLKInitStruct.PLL2.PLL2N = 200;
47+
RCC_PeriphCLKInitStruct.PLL2.PLL2N = 160;
4848
RCC_PeriphCLKInitStruct.PLL2.PLL2FRACN = 0;
4949
RCC_PeriphCLKInitStruct.PLL2.PLL2P = 2;
5050
RCC_PeriphCLKInitStruct.PLL2.PLL2R = 4;

libraries/Portenta_Video/anx7625.cpp

+3-1
Original file line numberDiff line numberDiff line change
@@ -929,8 +929,10 @@ static void stm32_LayerInit(uint16_t LayerIndex, uint32_t FB_Address)
929929
HAL_LTDC_ConfigLayer(&ltdc, &Layercfg, LayerIndex);
930930
}
931931

932+
#include "SDRAM.h"
933+
932934
#define BYTES_PER_PIXEL 2
933-
#define FB_BASE_ADDRESS ((uint32_t)0xC0000000)
935+
#define FB_BASE_ADDRESS ((uint32_t)SDRAM_START_ADDRESS)
934936
#define FB_ADDRESS_0 (FB_BASE_ADDRESS)
935937
#define FB_ADDRESS_1 (FB_BASE_ADDRESS + (lcd_x_size * lcd_y_size * BYTES_PER_PIXEL))
936938

libraries/RPC/RPC.cpp

+1-1
Original file line numberDiff line numberDiff line change
@@ -166,7 +166,7 @@ int RPC::begin() {
166166

167167
//resource_table_load_from_flash();
168168
//HAL_SYSCFG_EnableCM4BOOT();
169-
HAL_RCCEx_EnableBootCore(RCC_BOOT_C2);
169+
bootM4();
170170

171171
eventThread = new rtos::Thread(osPriorityHigh);
172172
eventThread->start(&eventHandler);

libraries/ThreadDebug/src/ThreadDebug.cpp

+1-1
Original file line numberDiff line numberDiff line change
@@ -717,7 +717,7 @@ static const char g_memoryMapXml[] = "<?xml version=\"1.0\"?>"
717717
"<memory type=\"ram\" start=\"0x58027000\" length=\"0x400\"> </memory>"
718718
"<memory type=\"flash\" start=\"0x90000000\" length=\"0x10000000\"> <property name=\"blocksize\">0x200</property></memory>"
719719
#ifndef CORE_CM4
720-
"<memory type=\"ram\" start=\"0xc0000000\" length=\"0x800000\"> </memory>"
720+
"<memory type=\"ram\" start=\"0x60000000\" length=\"0x800000\"> </memory>"
721721
#endif
722722
"</memory-map>";
723723
#endif

mbed-os-to-arduino

+4
Original file line numberDiff line numberDiff line change
@@ -191,6 +191,10 @@ generate_flags () {
191191
OPENAMP_REGIONS="__OPENAMP_region_start__ = 0x38000400;\n__OPENAMP_region_end__ = 0x38000400 + LENGTH(RAM_D3) - 1K;"
192192
sed -i "s?ENTRY(Reset_Handler)?${OPENAMP_REGIONS}\nENTRY(Reset_Handler)?g" $ARDUINOVARIANT/linker_script.ld
193193
fi
194+
echo "Patching linker scripts"
195+
sed -i 's/0x8100000/CM4_BINARY_START/g' "$ARDUINOVARIANT"/linker_script.ld
196+
sed -i 's/LENGTH = 0x100000/LENGTH = CM4_BINARY_END - CM4_BINARY_START/g' "$ARDUINOVARIANT"/linker_script.ld
197+
sed -i 's/LENGTH = 0xc0000/LENGTH = CM4_BINARY_START - 0x8040000/g' "$ARDUINOVARIANT"/linker_script.ld
194198
fi
195199
if [[ $ARDUINOVARIANT == *NANO_RP2040* ]]; then
196200
set +e

platform.txt

+8-6
Original file line numberDiff line numberDiff line change
@@ -39,8 +39,7 @@ compiler.define=-DARDUINO=
3939

4040
# this can be overriden in boards.txt
4141
build.extra_flags=
42-
build.extra.startobjects=
43-
build.extra.endobjects=
42+
build.extra_ldflags=
4443
compiler.mbed=
4544

4645
# These can be overridden in platform.local.txt
@@ -71,19 +70,22 @@ build.zip.pattern={recipe.size.pattern}
7170
# -----------------------
7271

7372
## Compile c files
74-
recipe.c.o.pattern="{compiler.path}{compiler.c.cmd}" {compiler.c.flags} -DARDUINO={runtime.ide.version} -DARDUINO_{build.board} -DARDUINO_ARCH_{build.arch} -DARDUINO_ARCH_MBED {build.library_discovery_phase_flag} {build.extra_flags} {compiler.c.extra_flags} "-I{build.core.path}/api/deprecated" "-I{build.core.path}/api/deprecated-avr-comp" {includes} "-iprefix{build.core.path}" "@{compiler.mbed.includes}" -o "{object_file}" "{source_file}"
73+
recipe.c.o.pattern="{compiler.path}{compiler.c.cmd}" {compiler.c.flags} -DARDUINO={runtime.ide.version} -DARDUINO_{build.board} -DARDUINO_ARCH_{build.arch} -DARDUINO_ARCH_MBED {build.library_discovery_phase_flag} {build.extra_flags} {build.extra_ldflags} {compiler.c.extra_flags} "-I{build.core.path}/api/deprecated" "-I{build.core.path}/api/deprecated-avr-comp" {includes} "-iprefix{build.core.path}" "@{compiler.mbed.includes}" -o "{object_file}" "{source_file}"
7574

7675
## Compile c++ files
77-
recipe.cpp.o.pattern="{compiler.path}{compiler.cpp.cmd}" {compiler.cpp.flags} -DARDUINO={runtime.ide.version} -DARDUINO_{build.board} -DARDUINO_ARCH_{build.arch} -DARDUINO_ARCH_MBED {build.library_discovery_phase_flag} {includes} {build.extra_flags} {compiler.cpp.extra_flags} "-I{build.core.path}/api/deprecated" "-I{build.core.path}/api/deprecated-avr-comp" "-iprefix{build.core.path}" "@{compiler.mbed.includes}" "{source_file}" -o "{object_file}"
76+
recipe.cpp.o.pattern="{compiler.path}{compiler.cpp.cmd}" {compiler.cpp.flags} -DARDUINO={runtime.ide.version} -DARDUINO_{build.board} -DARDUINO_ARCH_{build.arch} -DARDUINO_ARCH_MBED {build.library_discovery_phase_flag} {includes} {build.extra_flags} {build.extra_ldflags} {compiler.cpp.extra_flags} "-I{build.core.path}/api/deprecated" "-I{build.core.path}/api/deprecated-avr-comp" "-iprefix{build.core.path}" "@{compiler.mbed.includes}" "{source_file}" -o "{object_file}"
7877

7978
## Compile asm files
80-
recipe.S.o.pattern="{compiler.path}{compiler.S.cmd}" {compiler.S.flags} -DARDUINO={runtime.ide.version} -DARDUINO_{build.board} -DARDUINO_ARCH_{build.arch} -DARDUINO_ARCH_MBED {includes} {build.extra_flags} {compiler.cpp.extra_flags} "-I{build.core.path}/api/deprecated" "-I{build.core.path}/api/deprecated-avr-comp" "-iprefix{build.core.path}" "@{compiler.mbed.includes}" "{source_file}" -o "{object_file}"
79+
recipe.S.o.pattern="{compiler.path}{compiler.S.cmd}" {compiler.S.flags} -DARDUINO={runtime.ide.version} -DARDUINO_{build.board} -DARDUINO_ARCH_{build.arch} -DARDUINO_ARCH_MBED {includes} {build.extra_flags} {build.extra_ldflags} {compiler.cpp.extra_flags} "-I{build.core.path}/api/deprecated" "-I{build.core.path}/api/deprecated-avr-comp" "-iprefix{build.core.path}" "@{compiler.mbed.includes}" "{source_file}" -o "{object_file}"
8180

8281
## Create archives
8382
recipe.ar.pattern="{compiler.path}{compiler.ar.cmd}" {compiler.ar.flags} {compiler.ar.extra_flags} "{archive_file_path}" "{object_file}"
8483

84+
## Preprocess linker script
85+
recipe.hooks.linking.prelink.1.pattern="{compiler.path}{compiler.c.elf.cmd}" -E -P -x c {build.extra_flags} {build.extra_ldflags} "{build.variant.path}/{build.ldscript}" -o {build.path}/{build.ldscript}
86+
8587
## Combine gc-sections, archives, and objects
86-
recipe.c.combine.pattern="{compiler.path}{compiler.c.elf.cmd}" "-L{build.path}" {compiler.c.elf.flags} {compiler.c.elf.extra_flags} "@{compiler.mbed.ldflags}" "-T{build.variant.path}/{build.ldscript}" "-Wl,-Map,{build.path}/{build.project_name}.map" --specs=nosys.specs {compiler.ldflags} -o "{build.path}/{build.project_name}.elf" {object_files} -Wl,--whole-archive "{build.path}/{archive_file}" {compiler.mbed} -Wl,--no-whole-archive -Wl,--start-group {compiler.mbed.extra_ldflags} {compiler.libraries.ldflags} -Wl,--end-group
88+
recipe.c.combine.pattern="{compiler.path}{compiler.c.elf.cmd}" "-L{build.path}" {compiler.c.elf.flags} {compiler.c.elf.extra_flags} {build.extra_flags} {build.extra_ldflags} "@{compiler.mbed.ldflags}" "-T{build.path}/{build.ldscript}" "-Wl,-Map,{build.path}/{build.project_name}.map" --specs=nosys.specs {compiler.ldflags} -o "{build.path}/{build.project_name}.elf" {object_files} -Wl,--whole-archive "{build.path}/{archive_file}" {compiler.mbed} -Wl,--no-whole-archive -Wl,--start-group {compiler.mbed.extra_ldflags} {compiler.libraries.ldflags} -Wl,--end-group
8789

8890
## Create eeprom
8991
recipe.objcopy.eep.pattern=

variants/PORTENTA_H7_M4/conf/mbed_app.json

+1
Original file line numberDiff line numberDiff line change
@@ -11,6 +11,7 @@
1111
"rtos.main-thread-stack-size": 32768,
1212
"cordio.max-connections": 5,
1313
"target.macros_add": [
14+
"NO_VTOR_RELOCATE",
1415
"METAL_INTERNAL",
1516
"VIRTIO_SLAVE_ONLY",
1617
"NO_ATOMIC_64_SUPPORT",

variants/PORTENTA_H7_M4/linker_script.ld

+1-1
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,6 @@
11
MEMORY
22
{
3-
FLASH (rx) : ORIGIN = 0x8100000, LENGTH = 0x100000
3+
FLASH (rx) : ORIGIN = CM4_BINARY_START, LENGTH = CM4_BINARY_END - CM4_BINARY_START
44
RAM (rwx) : ORIGIN = 0x10000000 + (((166 * 4) + 7) & 0xFFFFFFF8), LENGTH = 0x48000 - (((166 * 4) + 7) & 0xFFFFFFF8)
55
RAM_D3 (xrw) : ORIGIN = 0x38000000, LENGTH = 64K
66
}

variants/PORTENTA_H7_M7/linker_script.ld

+1-1
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,6 @@
11
MEMORY
22
{
3-
FLASH (rx) : ORIGIN = 0x8040000, LENGTH = 0xc0000
3+
FLASH (rx) : ORIGIN = 0x8040000, LENGTH = CM4_BINARY_START - 0x8040000
44
DTCMRAM (rwx) : ORIGIN = 0x20000000 + (((166 * 4) + 7) & 0xFFFFFFF8), LENGTH = 128K - (((166 * 4) + 7) & 0xFFFFFFF8)
55
RAM (xrw) : ORIGIN = 0x24000000, LENGTH = 0x80000
66
RAM_D2 (xrw) : ORIGIN = 0x30000000, LENGTH = 288K

variants/PORTENTA_H7_M7/pins_arduino.h

+1-1
Original file line numberDiff line numberDiff line change
@@ -12,7 +12,7 @@ extern "C" bool isBetaBoard();
1212

1313
// Booting
1414
// ----
15-
#define bootM4() LL_RCC_ForceCM4Boot() // Provide a memorable alias
15+
void bootM4();
1616

1717
extern PinName digitalPinToPinName(pin_size_t P);
1818

variants/PORTENTA_H7_M7/variant.cpp

+47
Original file line numberDiff line numberDiff line change
@@ -270,4 +270,51 @@ void _ontouch1200bps_() {
270270
NVIC_SystemReset();
271271
}
272272

273+
#include "stm32h7xx_ll_system.h"
274+
275+
void bootM4() {
276+
277+
#if 0
278+
// This address need to be in range 0x10000000-0x3FFF0000 to be usable by the M4 as a trampoline
279+
uint32_t __attribute__((aligned(0x10000))) trampoline[2];
280+
static const uint32_t RAM_BASE_FOR_TRAMPOLINE = (uint32_t)&trampoline[0];
281+
282+
#if 0
283+
284+
// This snippet MUST be executed BEFORE calling bootM4()
285+
// The only purpose it to fread() a file into CM4_BINARY_START location
286+
287+
SDRAM.begin(0);
288+
289+
// Copy M4 firmware to SDRAM
290+
FILE* fw = fopen("/fs/fw.bin", "r");
291+
if (fw == NULL) {
292+
while (1) {
293+
Serial.println("Please copy a firmware for M4 core in the PORTENTA mass storage");
294+
delay(100);
295+
}
296+
}
297+
fread((uint8_t*)CM4_BINARY_START, getFileSize(fw), 1, fw);
298+
fclose(fw);
299+
#endif
300+
301+
// We need to call this in case we want to use BACKUP_SRAM as trampoline
302+
HAL_PWR_EnableBkUpAccess();
303+
304+
// Copy first 2 words of the firmware in trampoline location
305+
memcpy((void*)RAM_BASE_FOR_TRAMPOLINE, (void*)CM4_BINARY_START, 8);
306+
307+
SCB_CleanDCache();
308+
309+
// Set CM4_BOOT0 address
310+
// This actually writes a flash register and thus is persistent across reboots
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// RAM_BASE_FOR_TRAMPOLINE must be aligned to 0x10000 barrier
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LL_SYSCFG_SetCM4BootAddress0(RAM_BASE_FOR_TRAMPOLINE >> 16);
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#else
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// Classic boot, just set the address and we are ready to go
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LL_SYSCFG_SetCM4BootAddress0(CM4_BINARY_START >> 16);
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LL_RCC_ForceCM4Boot();
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#endif
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}
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273320
#endif

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