Get MRI working on Cortex-M7 over Serial1

This commit includes a few changes that I needed to make to the MRI
library in this repository to get it working on the Cortex-M7 over
Serial1.

* Pass in an empty string to __mriInit() from setup() instead of NULL.
* I modified armv7-m_asm.S to expose mriFaultHandler as a global symbol
  named __mriFaultHandler so that HardFault_IRQn,
  MemoryManagement_IRQn, BusFault_IRQn, and UsageFault_IRQn could be
  dynamically set appropriately when initializing the MRI library.
  mbed-os has its own handlers defined in the FLASH based interrupt
  vector that stop us from placing the MRI ones there.
* I modified Platform_CommHasReceiveData() to clear the overrun flag
  that can sometimes be set if MRI is doing something else when GDB
  first sends a command. Once the flag gets set, no more data will be
  received until software clears it. It should be ok to ignore overrun
  as it will just result in a packet checksum error to which MRI will
  issue a NAK.
* I commented out my code in MRI which uses the MPU to disable caching.
  Disabling caching on a Cortex-M7 caused the core to see stale data
  when the newer data was still sitting in the cache. It turns out
  that this disabling of the cache isn't needed on the M7 core anyway
  as the DSB/ISB instructions work as expected with respect to write
  buffering. On Cortex-M3/M4 cores I used the MPU to disable
  caching so that bus faults for writes to bad addresses would be
  synchronous so that they could be properly caught and reported
  back to GDB when the GDB user attempted to write to an invalid
  piece of memory. DSB/ISB seemed to be ignored on Cortex-M3.
* Cortex-M7 microcontrollers use the newer version 2 of the Flash Patch
  and Breakpoint unit to allow for setting hardware breakpoints. When
  the hardware breakpoint setting code in MRI was originally written,
  only version 1 existed so it contained no code to properly handle
  this newer version. Setting the breakpoint address as in version 1 on
  version 2 hardware will not set the breakpoint properly. This commit
  includes code that can detect this new FPB version and set the
  breakpoint address appropriately.
* I also fixed a bug in set/getMPURegionAddress() where I was shifting
  the base address left by 5 bits when I should have just been masking
  off the lower 5 bits. Since I only used this function to set a base
  address of 0 from MRI, I never noticed that it was wrong before. I
  just happened to notice it during a code review comparing code in
  debug_cm3.h to the latest version of the ARMv7-M Architecture
  Reference Manual.

Author: adamgreen

libraries/MRI/examples/MRI/MRI.ino

@@ -7,7 +7,7 @@
 
 void setup() {
   Serial1.begin(115200); /* Initialize Serial1 via mbed ... should actually be done within MRI library to have the configuration we need */
-  __mriInit(0);
+  __mriInit("");
 }
 
 void loop() {

libraries/MRI/src/architectures/armv7-m/armv7-m.c

@@ -1,4 +1,4 @@
-/* Copyright 2017 Adam Green (https://github.com/adamgreen/)
+/* Copyright 2020 Adam Green (https://github.com/adamgreen/)
 
    Licensed under the Apache License, Version 2.0 (the "License");
    you may not use this file except in compliance with the License.
@@ -619,9 +619,6 @@ static void displayUsageFaultCauseToGdbConsole(void)
 
 
 static void     clearMemoryFaultFlag(void);
-static void     configureMpuToAccessAllMemoryWithNoCaching(void);
-static void     saveOriginalMpuConfiguration(void);
-static void     configureHighestMpuRegionToAccessAllMemoryWithNoCaching(void);
 static void     cleanupIfSingleStepping(void);
 static void     restoreBasePriorityIfNeeded(void);
 static uint32_t shouldRestoreBasePriority(void);
@@ -634,7 +631,6 @@ void Platform_EnteringDebugger(void)
 {
     clearMemoryFaultFlag();
     __mriCortexMState.originalPC = __mriCortexMState.context.PC;
-    configureMpuToAccessAllMemoryWithNoCaching();
     cleanupIfSingleStepping();
 }
 
@@ -643,36 +639,6 @@ static void clearMemoryFaultFlag(void)
     __mriCortexMState.flags &= ~CORTEXM_FLAGS_FAULT_DURING_DEBUG;
 }
 
-static void configureMpuToAccessAllMemoryWithNoCaching(void)
-{
-    saveOriginalMpuConfiguration();
-    disableMPU();
-    configureHighestMpuRegionToAccessAllMemoryWithNoCaching();
-    enableMPUWithHardAndNMIFaults();
-}
-
-static void saveOriginalMpuConfiguration(void)
-{
-    __mriCortexMState.originalMPUControlValue = getMPUControlValue();
-    __mriCortexMState.originalMPURegionNumber = getCurrentMPURegionNumber();
-    prepareToAccessMPURegion(getHighestMPUDataRegionIndex());
-    __mriCortexMState.originalMPURegionAddress = getMPURegionAddress();
-    __mriCortexMState.originalMPURegionAttributesAndSize = getMPURegionAttributeAndSize();
-}
-
-static void configureHighestMpuRegionToAccessAllMemoryWithNoCaching(void)
-{
-    static const uint32_t regionToStartAtAddress0 = 0U;
-    static const uint32_t regionReadWrite = 1  << MPU_RASR_AP_SHIFT;
-    static const uint32_t regionSizeAt4GB = 31 << MPU_RASR_SIZE_SHIFT; /* 4GB = 2^(31+1) */
-    static const uint32_t regionEnable    = MPU_RASR_ENABLE;
-    static const uint32_t regionSizeAndAttributes = regionReadWrite | regionSizeAt4GB | regionEnable;
-
-    prepareToAccessMPURegion(getHighestMPUDataRegionIndex());
-    setMPURegionAddress(regionToStartAtAddress0);
-    setMPURegionAttributeAndSize(regionSizeAndAttributes);
-}
-
 static void cleanupIfSingleStepping(void)
 {
     restoreBasePriorityIfNeeded();
@@ -725,25 +691,13 @@ static void clearHardwareBreakpointOnSvcHandler(void)
 }
 
 
-static void restoreMPUConfiguration(void);
 static void checkStack(void);
 void Platform_LeavingDebugger(void)
 {
-    restoreMPUConfiguration();
     checkStack();
     clearMonitorPending();
 }
 
-static void restoreMPUConfiguration(void)
-{
-    disableMPU();
-    prepareToAccessMPURegion(getHighestMPUDataRegionIndex());
-    setMPURegionAddress(__mriCortexMState.originalMPURegionAddress);
-    setMPURegionAttributeAndSize(__mriCortexMState.originalMPURegionAttributesAndSize);
-    prepareToAccessMPURegion(__mriCortexMState.originalMPURegionNumber);
-    setMPUControlValue(__mriCortexMState.originalMPUControlValue);
-}
-
 static void checkStack(void)
 {
     uint32_t* pCurr = (uint32_t*)__mriCortexMState.debuggerStack;

libraries/MRI/src/architectures/armv7-m/armv7-m_asm.S

@@ -1,4 +1,4 @@
-/* Copyright 2017 Adam Green (http://mbed.org/users/AdamGreen/)
+/* Copyright 2020 Adam Green (https://github.com/adamgreen/)
 
    Licensed under the Apache License, Version 2.0 (the "License");
    you may not use this file except in compliance with the License.
@@ -39,14 +39,17 @@
 __mriExceptionHandler:
     ldr     r0, =mriSaveRestoreContext
     b       mriGetSPAndCallHandler
-    
 
+
+    .global __mriFaultHandler
+    .type __mriFaultHandler, function
+    .thumb_func
     /* Like MriExceptionHandler above but it also checks and handles stacking/unstacking faults. */
-mriFaultHandler:
+__mriFaultHandler:
     ldr     r0, =checkForStackError
     b       mriGetSPAndCallHandler
-    
-    
+
+
     /* Determines whether task context was saved in PSP or MSP and places the correct stack pointer address into
        the R1 register before calling the caller provided fault handler pointed to by the r0 register.
     */
@@ -61,8 +64,8 @@ mriGetSPAndCallHandler:
     str     r1, [r2]
     /* Call specified handler exception handler routine */
     mov     pc, r0
-    
-    
+
+
     .type checkForStackError, function
     .thumb_func
     /* Handles hard/memory/bus fault exceptions by checking for stacking/unstacking errors before calling the main
@@ -85,7 +88,7 @@ checkForStackError:
     /* Handles exception invokations for MRI.  Its main job is to store the interrupted task's context, call into
        the C based __mriDebugException, and then restore the task's context (which may have been modified by the
        debugger.
-       
+
        Layout of the registers which are pushed on the stack automatically by Cortex-M3 curing exception execution:
             SP      Value in MSP or PSP task was interrupted.
         PSR SP - 4
@@ -96,7 +99,7 @@ checkForStackError:
         R2  SP - 24
         R1  SP - 28
         R0  SP - 32  Value in MSP or PSP when handler is started.
-        
+
        Layout of the SContext record used by gdb for 'g' and 'G' commands.
         typedef struct
         {
@@ -132,7 +135,7 @@ mriSaveRestoreContext:
     /* Set the debugger active flag so that subsequent exceptions will be caught. */
     orr     r2, #CORTEXM_FLAGS_ACTIVE_DEBUG
     str     r2, [r0]
-    
+
     /* Fill the debugger stack with 0xDEADBEEF. */
     movs    r0, #CORTEXM_DEBUGGER_STACK_SIZE
     ldr     r12, =(__mriCortexMState + CORTEXM_STATE_DEBUGGER_STACK_OFFSET + CORTEXM_DEBUGGER_STACK_SIZE_IN_BYTES)
@@ -149,7 +152,7 @@ mriSaveRestoreContext:
     str     r2, [r0]
     ldr     r0, =(__mriCortexMState + CORTEXM_STATE_DEBUGGER_STACK_OFFSET + CORTEXM_DEBUGGER_STACK_SIZE_IN_BYTES)
     msr     msp, r0
-    
+
     /**** Copy R0-R3, R12, LR, PC, and PSR from running task's stack and place in MRI context structure. */
     ldr     r0, =(__mriCortexMState + CORTEXM_STATE_CONTEXT_OFFSET)
     /* Now that R1 contains the SP, we can push away the current LR (and R12 to just keep 8-byte alignment.) */
@@ -223,7 +226,7 @@ mriSaveRestoreContext:
     tst     r5, #PSR_STACK_ALIGN
     it      ne
     addne   r1, r1, #4
-    /* Jump back past the CONTROL, FAULTMASK, BASEPRI, PRIMASK, PSP, MSP, PSR, PC and LR that were placed in context 
+    /* Jump back past the CONTROL, FAULTMASK, BASEPRI, PRIMASK, PSP, MSP, PSR, PC and LR that were placed in context
        to store the potentially updated SP. */
     str     r1, [r0, #-40]
 
@@ -309,7 +312,7 @@ mriSaveRestoreContext:
     /**** Make sure that any modifications to the instruction stream by data writes are seen. */
     dsb
     isb
-    
+
     /**** Return to task after clearing fault status bits. */
     b       mriClearFaultStatusBitsAndReturn
 
@@ -367,8 +370,8 @@ mriClearFaultStatusBitsAndReturn:
     */
 //HardFault_Handler:
 //    b       mriFaultHandler
-    
- 
+
+
 //    .global MemManage_Handler
 //    .type MemManage_Handler, function
 //    .thumb_func
@@ -377,7 +380,7 @@ mriClearFaultStatusBitsAndReturn:
     */
 //MemManage_Handler:
 //    b       mriFaultHandler
-    
+
 
 //    .global BusFault_Handler
 //    .type BusFault_Handler, function
@@ -387,7 +390,7 @@ mriClearFaultStatusBitsAndReturn:
     */
 //BusFault_Handler:
 //    b       mriFaultHandler
-    
+
 
 //    .global UsageFault_Handler
 //    .type UsageFault_Handler, function
@@ -397,7 +400,7 @@ mriClearFaultStatusBitsAndReturn:
     */
 //UsageFault_Handler:
 //    b       __mriExceptionHandler
-    
+
 
     .global DebugMon_Handler
     .type DebugMon_Handler, function