Support CTRL+C halting of running threads

Hook the USART ISR and pend a DebugMon interrupt if GDB sends data
while the debuggee is running, typically this will be a CTRL+C but
stopping for any command is a good thing.

Now uses the CORTEXM_FLAGS_CTRL_C flag to determine if SIGINT should
be returned from Platform_DetermineCauseOfException() as the cause of a
debug halt. Previously it was hardcoded to use the exception numbers
of the LPC176x UART handlers.

Author: adamgreen

libraries/ThreadMRI/src/ThreadMRI.cpp

@@ -32,6 +32,7 @@ extern "C"
 // UNDONE: Switch back to the USB/CDC based serial port.
 #undef Serial
 #define Serial Serial1
+#define MRI_SERIAL_IRQ USART1_IRQn
 
 
 // Configuration Parameters
@@ -111,6 +112,8 @@ volatile uint32_t               mriThreadOrigHardFault;
 volatile uint32_t               mriThreadOrigMemManagement;
 volatile uint32_t               mriThreadOrigBusFault;
 volatile uint32_t               mriThreadOrigUsageFault;
+// Address of the original Serial peripheral ISR to be hooked.
+void                            (*g_origSerialISR)(void);
 
 // UNDONE: For debugging. If different than g_haltedThreadId then the mriMain() thread was signalled when the previous
 //         instance was still running.
@@ -142,23 +145,27 @@ static void setDebugActiveFlag();
 static void clearDebugActiveFlag();
 static bool isThreadMode(uint32_t excReturn);
 static bool hasEncounteredDebugEvent();
+static bool hasControlCBeenDetected();
 static void recordAndClearFaultStatusBits();
 static void wakeMriMainToDebugCurrentThread();
 static void stopSingleStepping();
 static void recordAndSwitchFaultHandlersToDebugger();
+static void hookSerialISR();
 static bool isDebugThreadActive();
 static void setFaultDetectedFlag();
 static bool isImpreciseBusFault();
 static void advancePCToNextInstruction(uint32_t excReturn, uint32_t psp, uint32_t msp);
 static uint32_t* threadSP(uint32_t excReturn, uint32_t psp, uint32_t msp);
 static bool isInstruction32Bit(uint16_t firstWordOfInstruction);
+static void serialISRHook();
+static bool isDebuggerActive();
+static void setControlCFlag();
 
 
 
 
 ThreadMRI::ThreadMRI()
 {
-    mriInit("");
 }
 
 
@@ -169,6 +176,9 @@ bool ThreadMRI::begin()
         return false;
     }
 
+    // UNDONE: Move into constructor.
+    mriInit("");
+
     static uint64_t             stack[MRI_THREAD_STACK_SIZE];
     static osRtxThread_t        threadTcb;
     static const osThreadAttr_t threadAttr =
@@ -341,6 +351,7 @@ void Platform_Init(Token* pParameterTokens)
     g_enableDWTandFPB = 0;
     mriThreadSingleStepThreadId = NULL;
     recordAndSwitchFaultHandlersToDebugger();
+    hookSerialISR();
 }
 
 static void recordAndSwitchFaultHandlersToDebugger()
@@ -357,6 +368,12 @@ static void recordAndSwitchFaultHandlersToDebugger()
     NVIC_SetVector(DebugMonitor_IRQn,     (uint32_t)mriDebugMonitorHandlerStub);
 }
 
+static void hookSerialISR()
+{
+    g_origSerialISR = (void(*)(void))NVIC_GetVector(MRI_SERIAL_IRQ);
+    NVIC_SetVector(MRI_SERIAL_IRQ, (uint32_t)serialISRHook);
+}
+
 
 
 
@@ -457,7 +474,7 @@ extern "C" void mriDebugMonitorHandler(uint32_t excReturn)
         // DebugMon is running at such low priority that we should be getting ready to return to thread mode.
     }
 
-    if (!hasEncounteredDebugEvent()) {
+    if (!hasEncounteredDebugEvent() && !hasControlCBeenDetected()) {
         if (g_enableDWTandFPB) {
             enableDWTandITM();
             enableFPB();
@@ -528,6 +545,11 @@ static bool hasEncounteredDebugEvent()
 
 }
 
+static bool hasControlCBeenDetected()
+{
+    return mriCortexMState.flags & CORTEXM_FLAGS_CTRL_C;
+}
+
 static void recordAndClearFaultStatusBits()
 {
     mriCortexMState.exceptionNumber = getCurrentlyExecutingExceptionNumber();
@@ -595,7 +617,6 @@ static uint32_t* threadSP(uint32_t excReturn, uint32_t psp, uint32_t msp)
     return (uint32_t*)sp;
 }
 
-
 static bool isInstruction32Bit(uint16_t firstWordOfInstruction)
 {
     uint16_t maskedOffUpper5BitsOfWord = firstWordOfInstruction & 0xF800;
@@ -606,3 +627,24 @@ static bool isInstruction32Bit(uint16_t firstWordOfInstruction)
              maskedOffUpper5BitsOfWord == 0xF000 ||
              maskedOffUpper5BitsOfWord == 0xF800);
 }
+
+
+static void serialISRHook()
+{
+    g_origSerialISR();
+    if (!isDebuggerActive() && Serial.available() > 0) {
+        // Pend a halt into the debug monitor now that there is data from GDB ready to be read by it.
+        setControlCFlag();
+        setMonitorPending();
+    }
+}
+
+static bool isDebuggerActive()
+{
+    return mriCortexMState.flags & CORTEXM_FLAGS_ACTIVE_DEBUG;
+}
+
+static void setControlCFlag()
+{
+    mriCortexMState.flags |= CORTEXM_FLAGS_CTRL_C;
+}

libraries/ThreadMRI/src/architectures/armv7-m/armv7-m.c

@@ -380,11 +380,17 @@ uint32_t Platform_GetPacketBufferSize(void)
 }
 
 
+static uint32_t hasControlCBeenDetected();
 static uint8_t  determineCauseOfDebugEvent(void);
 uint8_t Platform_DetermineCauseOfException(void)
 {
     uint32_t exceptionNumber = mriCortexMState.exceptionNumber;
 
+    if (hasControlCBeenDetected())
+    {
+        return SIGINT;
+    }
+
     switch(exceptionNumber)
     {
     case 2:
@@ -405,18 +411,17 @@ uint8_t Platform_DetermineCauseOfException(void)
     case 12:
         /* Debug Monitor */
         return determineCauseOfDebugEvent();
-    case 21:
-    case 22:
-    case 23:
-    case 24:
-        /* UART* */
-        return SIGINT;
     default:
         /* NOTE: Catch all signal will be SIGSTOP. */
         return SIGSTOP;
     }
 }
 
+static uint32_t hasControlCBeenDetected()
+{
+    return mriCortexMState.flags & CORTEXM_FLAGS_CTRL_C;
+}
+
 static uint8_t determineCauseOfDebugEvent(void)
 {
     static struct
@@ -704,9 +709,11 @@ static void clearHardwareBreakpointOnSvcHandler(void)
 
 
 static void checkStack(void);
+static void clearControlCFlag(void);
 void Platform_LeavingDebugger(void)
 {
     checkStack();
+    clearControlCFlag();
     clearMonitorPending();
 }
 
@@ -724,6 +731,11 @@ static void checkStack(void)
         mriCortexMState.maxStackUsed = spaceUsed;
 }
 
+static void clearControlCFlag(void)
+{
+    mriCortexMState.flags &= ~CORTEXM_FLAGS_CTRL_C;
+}
+
 
 uint32_t Platform_GetProgramCounter(void)
 {

libraries/ThreadMRI/src/architectures/armv7-m/armv7-m.h

@@ -24,6 +24,7 @@
 #define CORTEXM_FLAGS_SINGLE_STEPPING       (1 << 2)
 #define CORTEXM_FLAGS_RESTORE_BASEPRI       (1 << 3)
 #define CORTEXM_FLAGS_SVC_STEP              (1 << 4)
+#define CORTEXM_FLAGS_CTRL_C                (1 << 5)
 
 /* Constants related to special memory area used by the debugger for its stack so that it doesn't interfere with
    the task's stack contents. */