Updates to ThreadMRI library

Pulling over changes from MRI repository, many of which were made to
ease future porting efforts and better integrate the thread support.

ThreadMRI class updates:
* Add THREADMRI_BREAK_ON_SETUP macro to make it clearer what the
  breakInSetup parameter to the ThreadMRI constructor is being used
  for.
* Move the g_contextEntries ScatterGatherEntry array into ThreadMRI
  instead of the CortexMState object since the required size depends
  on the layout of the register context used by each different RTOS.
  Call ScatterGather_Init() from Platform_Init() since it knows the
  size of the array.
* Fixed a bug in advancePCToNextInstruction() which was dereferencing
  the current instruction incorrectly.

Hardcode MRI_THREAD_MRI to a value of 1 in armv7-m.h for now.

Fixed a bug in mriScatterGather_Set() where it was always throwing a
bufferOverrunException, even when the set was successful.

Dropping the initial "_" from include file protection macroes so
that they don't conflict with the Standard C Library reserved prefix.

I also pulled mriCortexMDebuggerStack and mriCortexMFlags objects out
of CortexMState object to make it easier for assembly language code to
access. Before the assembly language code needed to know the offset of
these fields in the structure when accessing them. Now it can just
refer to the individual globals directly.

Platform_EnteringDebugger() in armv7-m.c now takes care of setting the
the CORTEXM_FLAGS_ACTIVE_DEBUG and Platform_LeavingDebugger() takes
care of clearing it so that handler/thread mode specific code doesn't
have to anymore. Don't need to do it from the ThreadMRI object itself.

mriCortexMInit() now takes a highestExternalIrq parameter that can be
passed in from device specific init routines to indicate how many
external interrupt sources should be defaulted to sub-zero priorities.
Previously each particular device had its own loop to lower the
priority of its external interrupts. That duplicate code across
multiple devices is now gone.

Add debugMonPriority parameter mriCortexMInit() function to allow
port to specify the priority it desires for the DebugMonitor
interrupt handler. Typically this will be 0, the highest priority,
but there are cases when you might have code that should continue
to run at the highest priority in the background, even when halted
in GDB. In these cases, it makes sense for the background ISRs to be
given a priority of 0 and DebugMonitor a priority of 1. The other
default handler priorities are lowered to fall below DebugMonitor by
mriCortexMInit() so that they can be debugged.

Expose mriCortexMSetPriority() API which can be used by device/board
specific code to set interrupt priority using MRI code that doesn't
rely on __NVIC_PRIO_BITS being set correctly in the CMSIS headers. It
instead determines the number of sub-priority bits at runtime.

Expose the mriCortexMGetPriority() API publicly. This function also
uses the runtime calculated sub-priority bit count.

Updated target XML to mark LR as a code pointer as well so that GDB
knows to try looking up the matching symbol when dumping it.

Simplify device porting:
* Now handle spurious UART interrupts in CortexM code rather than
  having all CortexM devices contain duplicated code to handle it.
  This means that ports no longer need to implement:
  * Platform_CommCausedInterrupt()
  * Platform_CommClearInterrupt()
* Ports no longer need to implement:
    mriPlatform_CommUartIndex()

* Cortex-M7 names their system handler priority register array SHPR
  instead of SHP like the rest of the ARMv7-M family for some reason.
  Added a macro to take care of this name change.

Author: adamgreen

libraries/ThreadMRI/examples/ThreadMRI/ThreadMRI.ino

@@ -1,18 +1,16 @@
-/* This example demonstrates how to include the MRI library which
-   allows debugging the Portenta H7 Cortex-M7 core with GDB via a
-   serial interface.
+/* This example demonstrates how to include the ThreadMRI library which allows debugging of the Portenta H7
+   with GDB via a serial (HardwareSerial or USBSerial) interface.
 */
 
 #include <ThreadMRI.h>
 
-//ThreadMRI g_debugger(Serial1, USART1_IRQn, 115200, true);
-ThreadMRI g_debugger(Serial, OTG_HS_IRQn, 115200, true);
+//ThreadMRI g_debugger(Serial1, USART1_IRQn, 115200, THREADMRI_BREAK_ON_SETUP);
+ThreadMRI g_debugger(Serial, OTG_HS_IRQn, 115200, THREADMRI_BREAK_ON_SETUP);
+//ThreadMRI g_debugger(Serial, false);
 
 extern "C" void testContext(void);
 
 void setup() {
-    //testContext();
-    //__debugbreak();
 }
 
 void loop() {

libraries/ThreadMRI/src/ThreadMRI.cpp

@@ -113,6 +113,15 @@ volatile uint32_t               mriThreadOrigUsageFault;
 // Address of the original Serial peripheral ISR to be hooked.
 void                            (*g_origSerialISR)(void);
 
+// Entries to track the chunks of the context in a scatter list.
+#if MRI_DEVICE_HAS_FPU
+    #define CONTEXT_ENTRIES     (5 + 3)
+#else
+    #define CONTEXT_ENTRIES     5
+#endif
+
+static ScatterGatherEntry   g_contextEntries[CONTEXT_ENTRIES];
+
 // UNDONE: For debugging. If different than g_haltedThreadId then the mriMain() thread was signalled when the previous
 //         instance was still running.
 static volatile osThreadId_t    g_debugThreadId;
@@ -139,8 +148,6 @@ static void resumeApplicationThreads();
 static void readThreadContext(osThreadId_t thread);
 static void switchRtxHandlersToDebugStubsForSingleStepping();
 static void restoreRtxHandlers();
-static void setDebugActiveFlag();
-static void clearDebugActiveFlag();
 static void callSerialBeginFromSetup();
 static int justEnteredSetupCallback(void* pv);
 static void hookSerialISR();
@@ -235,13 +242,11 @@ static __NO_RETURN void mriMain(void *pv)
         if (Platform_IsSingleStepping()) {
             restoreRtxHandlers();
         }
-        setDebugActiveFlag();
 
         osThreadSetPriority(osThreadGetId(), osPriorityNormal);
         mriDebugException();
         osThreadSetPriority(osThreadGetId(), osPriorityRealtime7);
 
-        clearDebugActiveFlag();
         if (Platform_IsSingleStepping()) {
             mriThreadSingleStepThreadId = g_haltedThreadId;
             switchRtxHandlersToDebugStubsForSingleStepping();
@@ -297,35 +302,35 @@ static void readThreadContext(osThreadId_t thread)
 
     uint32_t* pThreadContext = (uint32_t*)pThread->sp;
     // R0 - R3
-    mriCortexMState.contextEntries[0].pValues = pThreadContext + offset + 8;
-    mriCortexMState.contextEntries[0].count = 4;
+    g_contextEntries[0].pValues = pThreadContext + offset + 8;
+    g_contextEntries[0].count = 4;
     // R4 - R11
-    mriCortexMState.contextEntries[1].pValues = pThreadContext + offset + 0;
-    mriCortexMState.contextEntries[1].count = 8;
+    g_contextEntries[1].pValues = pThreadContext + offset + 0;
+    g_contextEntries[1].count = 8;
     // R12
-    mriCortexMState.contextEntries[2].pValues = pThreadContext + offset + 12;
-    mriCortexMState.contextEntries[2].count = 1;
+    g_contextEntries[2].pValues = pThreadContext + offset + 12;
+    g_contextEntries[2].count = 1;
     // SP - Point scatter gather context to correct location for SP but set it to correct value once CPSR is more easily
     // fetched.
-    mriCortexMState.contextEntries[3].pValues = &mriCortexMState.sp;
-    mriCortexMState.contextEntries[3].count = 1;
+    g_contextEntries[3].pValues = &mriCortexMState.sp;
+    g_contextEntries[3].count = 1;
     // LR, PC, CPSR
-    mriCortexMState.contextEntries[4].pValues = pThreadContext + offset + 13;
-    mriCortexMState.contextEntries[4].count = 3;
+    g_contextEntries[4].pValues = pThreadContext + offset + 13;
+    g_contextEntries[4].count = 3;
     // Set SP to correct value using alignment bit in CPSR. Memory for SP is already tracked by context.
     uint32_t cpsr = ScatterGather_Get(&mriCortexMState.context, CPSR);
     mriCortexMState.sp = pThread->sp + sizeof(uint32_t) * (stackedCount + ((cpsr >> PSR_STACK_ALIGN_SHIFT) & 1));
 
     if (offset != 0) {
         // S0 - S15
-        mriCortexMState.contextEntries[5].pValues = pThreadContext + 32;
-        mriCortexMState.contextEntries[5].count = 16;
+        g_contextEntries[5].pValues = pThreadContext + 32;
+        g_contextEntries[5].count = 16;
         // S16 - S31
-        mriCortexMState.contextEntries[6].pValues = pThreadContext + 0;
-        mriCortexMState.contextEntries[6].count = 16;
+        g_contextEntries[6].pValues = pThreadContext + 0;
+        g_contextEntries[6].count = 16;
         // FPSCR
-        mriCortexMState.contextEntries[7].pValues = pThreadContext + 48;
-        mriCortexMState.contextEntries[7].count = 1;
+        g_contextEntries[7].pValues = pThreadContext + 48;
+        g_contextEntries[7].count = 1;
     }
 }
 
@@ -346,16 +351,6 @@ static void restoreRtxHandlers()
     NVIC_SetVector(SysTick_IRQn, mriThreadOrigSysTick);
 }
 
-static void setDebugActiveFlag()
-{
-    mriCortexMState.flags |= CORTEXM_FLAGS_ACTIVE_DEBUG;
-}
-
-static void clearDebugActiveFlag()
-{
-    mriCortexMState.flags &= ~CORTEXM_FLAGS_ACTIVE_DEBUG;
-}
-
 static void callSerialBeginFromSetup()
 {
     mriCore_SetTempBreakpoint((uint32_t)setup, justEnteredSetupCallback, NULL);
@@ -401,13 +396,16 @@ ThreadMRI::~ThreadMRI() {
 // ---------------------------------------------------------------------------------------------------------------------
 void Platform_Init(Token* pParameterTokens)
 {
+    uint32_t debugMonPriority = 255;
+
     __try
-        mriCortexMInit((Token*)pParameterTokens);
+        mriCortexMInit((Token*)pParameterTokens, debugMonPriority, (IRQn_Type)0);
     __catch
         __rethrow;
 
     g_enableDWTandFPB = 0;
     mriThreadSingleStepThreadId = NULL;
+    ScatterGather_Init(&mriCortexMState.context, g_contextEntries, sizeof(g_contextEntries)/sizeof(g_contextEntries[0]));
     recordAndSwitchFaultHandlersToDebugger();
 }
 
@@ -446,15 +444,6 @@ void Platform_CommSendChar(int character)
     g_pSerial->write(character);
 }
 
-int Platform_CommCausedInterrupt(void)
-{
-    return 0;
-}
-
-void Platform_CommClearInterrupt(void)
-{
-}
-
 
 
 
@@ -598,7 +587,7 @@ static bool hasEncounteredDebugEvent()
 
 static bool hasControlCBeenDetected()
 {
-    return mriCortexMState.flags & CORTEXM_FLAGS_CTRL_C;
+    return mriCortexMFlags & CORTEXM_FLAGS_CTRL_C;
 }
 
 static void recordAndClearFaultStatusBits()
@@ -620,7 +609,7 @@ static void wakeMriMainToDebugCurrentThread()
 {
     disableSingleStep();
     g_debugThreadId = osThreadGetId();
-    g_haltedThreadId = g_debugThreadId; // UNDONE: osThreadGetId();
+    g_haltedThreadId = g_debugThreadId;
     osThreadFlagsSet(mriThreadId, MRI_THREAD_DEBUG_EVENT_FLAG);
 }
 
@@ -632,12 +621,12 @@ static void stopSingleStepping()
 
 static bool isDebugThreadActive()
 {
-    return (mriCortexMState.flags & CORTEXM_FLAGS_ACTIVE_DEBUG) && mriThreadId == osThreadGetId();
+    return (mriCortexMFlags & CORTEXM_FLAGS_ACTIVE_DEBUG) && mriThreadId == osThreadGetId();
 }
 
 static void setFaultDetectedFlag()
 {
-    mriCortexMState.flags |= CORTEXM_FLAGS_FAULT_DURING_DEBUG;
+    mriCortexMFlags |= CORTEXM_FLAGS_FAULT_DURING_DEBUG;
 }
 
 static bool isImpreciseBusFault()
@@ -649,7 +638,7 @@ static void advancePCToNextInstruction(uint32_t excReturn, uint32_t psp, uint32_
 {
     uint32_t* pSP = threadSP(excReturn, psp, msp);
     uint32_t* pPC = pSP + 7;
-    uint16_t  currentInstruction = *(uint16_t*)pPC;
+    uint16_t  currentInstruction = *(uint16_t*)*pPC;
     if (isInstruction32Bit(currentInstruction)) {
         *pPC += sizeof(uint32_t);
     } else {
@@ -694,10 +683,10 @@ static void serialISRHook()
 
 static bool isDebuggerActive()
 {
-    return mriCortexMState.flags & CORTEXM_FLAGS_ACTIVE_DEBUG;
+    return mriCortexMFlags & CORTEXM_FLAGS_ACTIVE_DEBUG;
 }
 
 static void setControlCFlag()
 {
-    mriCortexMState.flags |= CORTEXM_FLAGS_CTRL_C;
+    mriCortexMFlags |= CORTEXM_FLAGS_CTRL_C;
 }

libraries/ThreadMRI/src/ThreadMRI.h

@@ -17,6 +17,10 @@
 #pragma once
 
 
+// Pass THREADMRI_BREAK_ON_SETUP as breakInSetup parameter of ThreadMRI constructors to halt in setup().
+#define THREADMRI_BREAK_ON_SETUP true
+
+
 class ThreadMRI {
 public:
     // You must declare your ThreadMRI object as a global or function scoped static so that it doesn't get