We read every piece of feedback, and take your input very seriously.
To see all available qualifiers, see our documentation.
There was an error while loading. Please reload this page.
2 parents e0f0e7e + 25613fc commit 0b39c7eCopy full SHA for 0b39c7e
libraries/Portenta_SDRAM/ram_internal.c
@@ -44,7 +44,7 @@ static HAL_StatusTypeDef FMC_SDRAM_Clock_Config(void)
44
RCC_PeriphCLKInitStruct.FmcClockSelection = RCC_FMCCLKSOURCE_PLL2;
45
RCC_PeriphCLKInitStruct.PLL2.PLL2RGE = RCC_PLL1VCIRANGE_2;
46
RCC_PeriphCLKInitStruct.PLL2.PLL2M = 5;
47
- RCC_PeriphCLKInitStruct.PLL2.PLL2N = 333;
+ RCC_PeriphCLKInitStruct.PLL2.PLL2N = 200;
48
RCC_PeriphCLKInitStruct.PLL2.PLL2FRACN = 0;
49
RCC_PeriphCLKInitStruct.PLL2.PLL2P = 2;
50
RCC_PeriphCLKInitStruct.PLL2.PLL2R = 4;
0 commit comments