@@ -77,28 +77,26 @@ class GC9A01A(DisplaySPI):
7777 RAM_READ = _RAMRD
7878
7979 _INIT = (
80- (_SWRESET , None ),
81- (0xFE , None ), # Inter Register Enable1
82- (0xEF , None ), # Inter Register Enable2
83- (0xB6 , b"\x00 \x00 " ), # Display Function Control
84- (_MADCTL , b"\x48 " ), # Memory Access Control
85- (_COLMOD , b"\x05 " ), # Interface Pixel Format (16 bits/pixel)
86- (_PWCTR1 , b"\x13 " ), # Power Control 2
87- (_PWCTR2 , b"\x13 " ), # Power Control 3
80+ (0xFE , b"\x00 " ), # Inter Register Enable1
81+ (0xEF , b"\x00 " ), # Inter Register Enable2
82+ (0xB6 , b"\x00 \x00 " ), # Display Function Control [S1→S360 source, G1→G32 gate]
83+ (_MADCTL , b"\x48 " ), # Memory Access Control [Invert Row order, invert vertical scan order]
84+ (_COLMOD , b"\x05 " ), # COLMOD: Pixel Format Set [16 bits/pixel]
85+ (_PWCTR1 , b"\x13 " ), # Power Control 2 [VREG1A = 5.06, VREG1B = 0.68]
86+ (_PWCTR2 , b"\x13 " ), # Power Control 3 [VREG2A = -3.7, VREG2B = 0.68]
8887 (_PWCTR3 , b"\x22 " ), # Power Control 4
89- (_GMCTRP1 , b"\x45 \x09 \x08 \x08 \x26 \x2a " ), # Set Gamma 1
90- (_GMCTRN1 , b"\x43 \x70 \x72 \x36 \x37 \x6f " ), # Set Gamma 2
91- (_GMCTRP2 , b"\x45 \x09 \x08 \x08 \x26 \x2a " ), # Set Gamma 3
92- (_GMCTRN2 , b"\x43 \x70 \x72 \x36 \x37 \x6f " ), # Set Gamma 4
88+ (_GMCTRP1 , b"\x45 \x09 \x08 \x08 \x26 \x2a " ), # SET_GAMMA1
89+ (_GMCTRN1 , b"\x43 \x70 \x72 \x36 \x37 \x6f " ), # SET_GAMMA2
90+ (_GMCTRP2 , b"\x45 \x09 \x08 \x08 \x26 \x2a " ), # SET_GAMMA3
91+ (_GMCTRN2 , b"\x43 \x70 \x72 \x36 \x37 \x6f " ), # SET_GAMMA4
9392 (0x66 , b"\x3c \x00 \xcd \x67 \x45 \x45 \x10 \x00 \x00 \x00 " ),
9493 (0x67 , b"\x00 \x3c \x00 \x00 \x00 \x01 \x54 \x10 \x32 \x98 " ),
9594 (0x74 , b"\x10 \x85 \x80 \x00 \x00 \x4e \x00 " ),
9695 (0x98 , b"\x3e \x07 " ),
97- (_TEON , None ), # Tearing Effect Line ON
98- (_INVON , None ), # Display Inversion ON
99- (_SLPOUT , None ), # Exit Sleep Mode
100- (_NORON , None ), # Normal Display Mode ON
101- (_DISPON , None ), # Display ON
96+ (_TEON , b"\x00 " ), # Tearing Effect Line ON [both V-blanking and H-blanking]
97+ (_INVON , b"\x00 " ), # Display Inversion ON
98+ (_SLPOUT , None ), # Sleep Out Mode (with 120ms delay)
99+ (_DISPON , None ), # Display ON (with 20ms delay)
102100 )
103101
104102 def __init__ (
@@ -134,12 +132,13 @@ def __init__(
134132
135133 def init (self ) -> None :
136134 super ().init ()
137- cols = struct .pack (">HH" , 0 , self .width - 1 )
138- rows = struct .pack (">HH" , 0 , self .height - 1 )
135+ # Account for offsets in the column and row addressing
136+ cols = struct .pack (">HH" , self ._X_START , self .width + self ._X_START - 1 )
137+ rows = struct .pack (">HH" , self ._Y_START , self .height + self ._Y_START - 1 )
139138
140139 for command , data in (
141- (_CASET , cols ),
142- (_RASET , rows ),
143140 (_MADCTL , b"\xc0 " ), # Set rotation to 0 and use RGB
141+ (_CASET , b"\x00 \x00 \x00 \xef " ), # Column Address Set [Start col = 0, end col = 239]
142+ (_RASET , b"\x00 \x00 \x00 \xef " ), # Row Address Set [Start row = 0, end row = 239]
144143 ):
145144 self .write (command , data )
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