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wamisnet
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Revert "Update IDF to 9274814 (espressif#767)"
This reverts commit 55289a4.
1 parent 3219e63 commit e72a17e

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99 files changed

+1302
-1011
lines changed

cores/esp32/esp32-hal-i2c.c

+1-2
Original file line numberDiff line numberDiff line change
@@ -340,8 +340,7 @@ i2c_err_t i2cRead(i2c_t * i2c, uint16_t address, bool addr_10bit, uint8_t * data
340340
// Save bytes from the buffer as they arrive instead of doing them at the end of the loop since there is no
341341
// pause from an END operation in this approach.
342342
if((!isEndNear) && (nextCmdCount < 2)) {
343-
willRead = ((len>32)?32:len);
344-
if (willRead > 0) {
343+
if (willRead = ((len>32)?32:len)) {
345344
if (willRead > 1) {
346345
i2cSetCmd(i2c, cmdIdx, I2C_CMD_READ, (amountRead[ inc( &cmdIdx ) ] = willRead -1), false, false, false);
347346
nextCmdCount++;

tools/sdk/bin/bootloader.bin

-48 Bytes
Binary file not shown.

tools/sdk/bin/bootloader_qio.bin

-48 Bytes
Binary file not shown.

tools/sdk/include/config/sdkconfig.h

+2-1
Original file line numberDiff line numberDiff line change
@@ -68,6 +68,7 @@
6868
#define CONFIG_CONSOLE_UART_NUM 0
6969
#define CONFIG_ESP32_APPTRACE_LOCK_ENABLE 1
7070
#define CONFIG_ESP32_RTC_CLOCK_SOURCE_INTERNAL_RC 1
71+
#define CONFIG_LWIP_THREAD_LOCAL_STORAGE_INDEX 0
7172
#define CONFIG_TCP_OVERSIZE_MSS 1
7273
#define CONFIG_FOUR_UNIVERSAL_MAC_ADDRESS 1
7374
#define CONFIG_CONSOLE_UART_DEFAULT 1
@@ -84,7 +85,7 @@
8485
#define CONFIG_TCPIP_TASK_STACK_SIZE 2560
8586
#define CONFIG_FATFS_CODEPAGE_850 1
8687
#define CONFIG_TASK_WDT 1
87-
#define CONFIG_MAIN_TASK_STACK_SIZE 4096
88+
#define CONFIG_MAIN_TASK_STACK_SIZE 8192
8889
#define CONFIG_SPIFFS_PAGE_CHECK 1
8990
#define CONFIG_TASK_WDT_TIMEOUT_S 5
9091
#define CONFIG_INT_WDT_TIMEOUT_MS 300

tools/sdk/include/console/esp_console.h

-2
Original file line numberDiff line numberDiff line change
@@ -107,8 +107,6 @@ esp_err_t esp_console_cmd_register(const esp_console_cmd_t *cmd);
107107
* @param[out] cmd_ret return code from the command (set if command was run)
108108
* @return
109109
* - ESP_OK, if command was run
110-
* - ESP_ERR_INVALID_ARG, if the command line is empty, or only contained
111-
* whitespace
112110
* - ESP_ERR_NOT_FOUND, if command with given name wasn't registered
113111
* - ESP_ERR_INVALID_STATE, if esp_console_init wasn't called
114112
*/

tools/sdk/include/driver/driver/adc.h

+15-127
Original file line numberDiff line numberDiff line change
@@ -20,38 +20,24 @@ extern "C" {
2020
#endif
2121

2222
#include <stdint.h>
23-
#include <stdbool.h>
2423
#include "esp_err.h"
2524
#include "driver/gpio.h"
2625
#include "soc/adc_channel.h"
2726

2827
typedef enum {
29-
ADC_ATTEN_DB_0 = 0, /*!<The input voltage of ADC will be reduced to about 1/1 */
30-
ADC_ATTEN_DB_2_5 = 1, /*!<The input voltage of ADC will be reduced to about 1/1.34 */
31-
ADC_ATTEN_DB_6 = 2, /*!<The input voltage of ADC will be reduced to about 1/2 */
32-
ADC_ATTEN_DB_11 = 3, /*!<The input voltage of ADC will be reduced to about 1/3.6*/
33-
ADC_ATTEN_MAX,
28+
ADC_ATTEN_0db = 0, /*!<The input voltage of ADC will be reduced to about 1/1 */
29+
ADC_ATTEN_2_5db = 1, /*!<The input voltage of ADC will be reduced to about 1/1.34 */
30+
ADC_ATTEN_6db = 2, /*!<The input voltage of ADC will be reduced to about 1/2 */
31+
ADC_ATTEN_11db = 3, /*!<The input voltage of ADC will be reduced to about 1/3.6*/
3432
} adc_atten_t;
3533

3634
typedef enum {
37-
ADC_WIDTH_BIT_9 = 0, /*!< ADC capture width is 9Bit*/
38-
ADC_WIDTH_BIT_10 = 1, /*!< ADC capture width is 10Bit*/
39-
ADC_WIDTH_BIT_11 = 2, /*!< ADC capture width is 11Bit*/
40-
ADC_WIDTH_BIT_12 = 3, /*!< ADC capture width is 12Bit*/
41-
ADC_WIDTH_MAX,
35+
ADC_WIDTH_9Bit = 0, /*!< ADC capture width is 9Bit*/
36+
ADC_WIDTH_10Bit = 1, /*!< ADC capture width is 10Bit*/
37+
ADC_WIDTH_11Bit = 2, /*!< ADC capture width is 11Bit*/
38+
ADC_WIDTH_12Bit = 3, /*!< ADC capture width is 12Bit*/
4239
} adc_bits_width_t;
4340

44-
//this definitions are only for being back-compatible
45-
#define ADC_ATTEN_0db ADC_ATTEN_DB_0
46-
#define ADC_ATTEN_2_5db ADC_ATTEN_DB_2_5
47-
#define ADC_ATTEN_6db ADC_ATTEN_DB_6
48-
#define ADC_ATTEN_11db ADC_ATTEN_DB_11
49-
//this definitions are only for being back-compatible
50-
#define ADC_WIDTH_9Bit ADC_WIDTH_BIT_9
51-
#define ADC_WIDTH_10Bit ADC_WIDTH_BIT_10
52-
#define ADC_WIDTH_11Bit ADC_WIDTH_BIT_11
53-
#define ADC_WIDTH_12Bit ADC_WIDTH_BIT_12
54-
5541
typedef enum {
5642
ADC1_CHANNEL_0 = 0, /*!< ADC1 channel 0 is GPIO36 */
5743
ADC1_CHANNEL_1, /*!< ADC1 channel 1 is GPIO37 */
@@ -78,43 +64,11 @@ typedef enum {
7864
ADC2_CHANNEL_MAX,
7965
} adc2_channel_t;
8066

81-
typedef enum {
82-
ADC_CHANNEL_0 = 0, /*!< ADC channel */
83-
ADC_CHANNEL_1, /*!< ADC channel */
84-
ADC_CHANNEL_2, /*!< ADC channel */
85-
ADC_CHANNEL_3, /*!< ADC channel */
86-
ADC_CHANNEL_4, /*!< ADC channel */
87-
ADC_CHANNEL_5, /*!< ADC channel */
88-
ADC_CHANNEL_6, /*!< ADC channel */
89-
ADC_CHANNEL_7, /*!< ADC channel */
90-
ADC_CHANNEL_8, /*!< ADC channel */
91-
ADC_CHANNEL_9, /*!< ADC channel */
92-
ADC_CHANNEL_MAX,
93-
} adc_channel_t;
94-
95-
typedef enum {
96-
ADC_UNIT_1 = 1, /*!< SAR ADC 1*/
97-
ADC_UNIT_2 = 2, /*!< SAR ADC 2, not supported yet*/
98-
ADC_UNIT_BOTH = 3, /*!< SAR ADC 1 and 2, not supported yet */
99-
ADC_UNIT_ALTER = 7, /*!< SAR ADC 1 and 2 alternative mode, not supported yet */
100-
ADC_UNIT_MAX,
101-
} adc_unit_t;
102-
103-
typedef enum {
104-
ADC_ENCODE_12BIT, /*!< ADC to I2S data format, [15:12]-channel [11:0]-12 bits ADC data */
105-
ADC_ENCODE_11BIT, /*!< ADC to I2S data format, [15]-1 [14:11]-channel [10:0]-11 bits ADC data */
106-
ADC_ENCODE_MAX,
107-
} adc_i2s_encode_t;
108-
109-
typedef enum {
110-
ADC_I2S_DATA_SRC_IO_SIG = 0, /*!< I2S data from GPIO matrix signal */
111-
ADC_I2S_DATA_SRC_ADC = 1, /*!< I2S data from ADC */
112-
ADC_I2S_DATA_SRC_MAX,
113-
} adc_i2s_source_t;
114-
11567
/**
116-
* @brief Configure ADC1 capture width, meanwhile enable output invert for ADC1.
68+
* @brief Configure ADC1 capture width.
69+
*
11770
* The configuration is for all channels of ADC1
71+
*
11872
* @param width_bit Bit capture width for ADC1
11973
*
12074
* @return
@@ -123,16 +77,6 @@ typedef enum {
12377
*/
12478
esp_err_t adc1_config_width(adc_bits_width_t width_bit);
12579

126-
/**
127-
* @brief Configure ADC capture width.
128-
* @param adc_unit ADC unit index
129-
* @param width_bit Bit capture width for ADC unit.
130-
* @return
131-
* - ESP_OK success
132-
* - ESP_ERR_INVALID_ARG Parameter error
133-
*/
134-
esp_err_t adc_set_data_width(adc_unit_t adc_unit, adc_bits_width_t width_bit);
135-
13680
/**
13781
* @brief Configure the ADC1 channel, including setting attenuation.
13882
*
@@ -145,10 +89,10 @@ esp_err_t adc_set_data_width(adc_unit_t adc_unit, adc_bits_width_t width_bit);
14589
*
14690
* When VDD_A is 3.3V:
14791
*
148-
* - 0dB attenuaton (ADC_ATTEN_DB_0) gives full-scale voltage 1.1V
149-
* - 2.5dB attenuation (ADC_ATTEN_DB_2_5) gives full-scale voltage 1.5V
150-
* - 6dB attenuation (ADC_ATTEN_DB_6) gives full-scale voltage 2.2V
151-
* - 11dB attenuation (ADC_ATTEN_DB_11) gives full-scale voltage 3.9V (see note below)
92+
* - 0dB attenuaton (ADC_ATTEN_0db) gives full-scale voltage 1.1V
93+
* - 2.5dB attenuation (ADC_ATTEN_2_5db) gives full-scale voltage 1.5V
94+
* - 6dB attenuation (ADC_ATTEN_6db) gives full-scale voltage 2.2V
95+
* - 11dB attenuation (ADC_ATTEN_11db) gives full-scale voltage 3.9V (see note below)
15296
*
15397
* @note The full-scale voltage is the voltage corresponding to a maximum reading (depending on ADC1 configured
15498
* bit width, this value is: 4095 for 12-bits, 2047 for 11-bits, 1023 for 10-bits, 511 for 9 bits.)
@@ -190,62 +134,6 @@ int adc1_get_raw(adc1_channel_t channel);
190134
int adc1_get_voltage(adc1_channel_t channel) __attribute__((deprecated));
191135
/** @endcond */
192136

193-
/**
194-
* @brief Power on SAR ADC
195-
*/
196-
void adc_power_on();
197-
198-
/**
199-
* @brief Power off SAR ADC
200-
*/
201-
void adc_power_off();
202-
203-
/**
204-
* @brief Initialize ADC pad
205-
* @param adc_unit ADC unit index
206-
* @param channel ADC channel index
207-
* @return
208-
* - ESP_OK success
209-
* - ESP_ERR_INVALID_ARG Parameter error
210-
*/
211-
esp_err_t adc_gpio_init(adc_unit_t adc_unit, adc_channel_t channel);
212-
213-
/**
214-
* @brief Set ADC data invert
215-
* @param adc_unit ADC unit index
216-
* @param inv_en whether enable data invert
217-
* @return
218-
* - ESP_OK success
219-
* - ESP_ERR_INVALID_ARG Parameter error
220-
*/
221-
esp_err_t adc_set_data_inv(adc_unit_t adc_unit, bool inv_en);
222-
223-
/**
224-
* @brief Set ADC source clock
225-
* @param clk_div ADC clock divider, ADC clock is divided from APB clock
226-
* @return
227-
* - ESP_OK success
228-
*/
229-
esp_err_t adc_set_clk_div(uint8_t clk_div);
230-
231-
/**
232-
* @brief Set I2S data source
233-
* @param src I2S DMA data source, I2S DMA can get data from digital signals or from ADC.
234-
* @return
235-
* - ESP_OK success
236-
*/
237-
esp_err_t adc_set_i2s_data_source(adc_i2s_source_t src);
238-
239-
/**
240-
* @brief Initialize I2S ADC mode
241-
* @param adc_unit ADC unit index
242-
* @param channel ADC channel index
243-
* @return
244-
* - ESP_OK success
245-
* - ESP_ERR_INVALID_ARG Parameter error
246-
*/
247-
esp_err_t adc_i2s_mode_init(adc_unit_t adc_unit, adc_channel_t channel);
248-
249137
/**
250138
* @brief Configure ADC1 to be usable by the ULP
251139
*

tools/sdk/include/driver/driver/i2c.h

+4-23
Original file line numberDiff line numberDiff line change
@@ -200,7 +200,7 @@ esp_err_t i2c_isr_free(intr_handle_t handle);
200200
* - ESP_OK Success
201201
* - ESP_ERR_INVALID_ARG Parameter error
202202
*/
203-
esp_err_t i2c_set_pin(i2c_port_t i2c_num, int sda_io_num, int scl_io_num,
203+
esp_err_t i2c_set_pin(i2c_port_t i2c_num, gpio_num_t sda_io_num, gpio_num_t scl_io_num,
204204
gpio_pullup_t sda_pullup_en, gpio_pullup_t scl_pullup_en, i2c_mode_t mode);
205205

206206
/**
@@ -341,7 +341,7 @@ esp_err_t i2c_master_stop(i2c_cmd_handle_t cmd_handle);
341341
* - ESP_ERR_INVALID_STATE I2C driver not installed or not in master mode.
342342
* - ESP_ERR_TIMEOUT Operation timeout because the bus is busy.
343343
*/
344-
esp_err_t i2c_master_cmd_begin(i2c_port_t i2c_num, i2c_cmd_handle_t cmd_handle, TickType_t ticks_to_wait);
344+
esp_err_t i2c_master_cmd_begin(i2c_port_t i2c_num, i2c_cmd_handle_t cmd_handle, portBASE_TYPE ticks_to_wait);
345345

346346
/**
347347
* @brief I2C slave write data to internal ringbuffer, when tx fifo empty, isr will fill the hardware
@@ -358,7 +358,7 @@ esp_err_t i2c_master_cmd_begin(i2c_port_t i2c_num, i2c_cmd_handle_t cmd_handle,
358358
* - ESP_FAIL(-1) Parameter error
359359
* - Others(>=0) The number of data bytes that pushed to the I2C slave buffer.
360360
*/
361-
int i2c_slave_write_buffer(i2c_port_t i2c_num, uint8_t* data, int size, TickType_t ticks_to_wait);
361+
int i2c_slave_write_buffer(i2c_port_t i2c_num, uint8_t* data, int size, portBASE_TYPE ticks_to_wait);
362362

363363
/**
364364
* @brief I2C slave read data from internal buffer. When I2C slave receive data, isr will copy received data
@@ -375,7 +375,7 @@ int i2c_slave_write_buffer(i2c_port_t i2c_num, uint8_t* data, int size, TickType
375375
* - ESP_FAIL(-1) Parameter error
376376
* - Others(>=0) The number of data bytes that read from I2C slave buffer.
377377
*/
378-
int i2c_slave_read_buffer(i2c_port_t i2c_num, uint8_t* data, size_t max_size, TickType_t ticks_to_wait);
378+
int i2c_slave_read_buffer(i2c_port_t i2c_num, uint8_t* data, size_t max_size, portBASE_TYPE ticks_to_wait);
379379

380380
/**
381381
* @brief set I2C master clock period
@@ -481,25 +481,6 @@ esp_err_t i2c_set_data_timing(i2c_port_t i2c_num, int sample_time, int hold_time
481481
*/
482482
esp_err_t i2c_get_data_timing(i2c_port_t i2c_num, int* sample_time, int* hold_time);
483483

484-
/**
485-
* @brief set I2C timeout value
486-
* @param i2c_num I2C port number
487-
* @param timeout timeout value for I2C bus (unit: APB 80Mhz clock cycle)
488-
* @return
489-
* - ESP_OK Success
490-
* - ESP_ERR_INVALID_ARG Parameter error
491-
*/
492-
esp_err_t i2c_set_timeout(i2c_port_t i2c_num, int timeout);
493-
494-
/**
495-
* @brief get I2C timeout value
496-
* @param i2c_num I2C port number
497-
* @param timeout pointer to get timeout value
498-
* @return
499-
* - ESP_OK Success
500-
* - ESP_ERR_INVALID_ARG Parameter error
501-
*/
502-
esp_err_t i2c_get_timeout(i2c_port_t i2c_num, int* timeout);
503484
/**
504485
* @brief set I2C data transfer mode
505486
*

tools/sdk/include/driver/driver/i2s.h

+1-13
Original file line numberDiff line numberDiff line change
@@ -26,7 +26,6 @@
2626
#include "esp_attr.h"
2727
#include "esp_intr_alloc.h"
2828
#include "driver/periph_ctrl.h"
29-
#include "driver/adc.h"
3029
#include "freertos/semphr.h"
3130

3231
#ifdef __cplusplus
@@ -119,7 +118,7 @@ typedef enum {
119118
I2S_MODE_TX = 4,
120119
I2S_MODE_RX = 8,
121120
I2S_MODE_DAC_BUILT_IN = 16, /*!< Output I2S data to built-in DAC, no matter the data format is 16bit or 32 bit, the DAC module will only take the 8bits from MSB*/
122-
I2S_MODE_ADC_BUILT_IN = 32, /*!< Input I2S data from built-in ADC, each data can be 12-bit width at most*/
121+
//I2S_MODE_ADC_BUILT_IN = 32, /*!< Currently not supported yet, will be added for the next version*/
123122
I2S_MODE_PDM = 64,
124123
} i2s_mode_t;
125124

@@ -406,17 +405,6 @@ esp_err_t i2s_zero_dma_buffer(i2s_port_t i2s_num);
406405
*/
407406
esp_err_t i2s_set_clk(i2s_port_t i2s_num, uint32_t rate, i2s_bits_per_sample_t bits, i2s_channel_t ch);
408407

409-
/**
410-
* @brief Set built-in ADC mode for I2S DMA, this function will initialize ADC pad,
411-
* and set ADC parameters.
412-
* @param adc_unit SAR ADC unit index
413-
* @param adc_channel ADC channel index
414-
* @return
415-
* - ESP_OK Success
416-
* - ESP_FAIL Parameter error
417-
*/
418-
esp_err_t i2s_set_adc_mode(adc_unit_t adc_unit, adc1_channel_t adc_channel);
419-
420408
#ifdef __cplusplus
421409
}
422410
#endif

tools/sdk/include/driver/driver/sdmmc_types.h

-2
Original file line numberDiff line numberDiff line change
@@ -102,7 +102,6 @@ typedef struct {
102102
#define SCF_RSP_R6 (SCF_RSP_PRESENT|SCF_RSP_CRC|SCF_RSP_IDX)
103103
#define SCF_RSP_R7 (SCF_RSP_PRESENT|SCF_RSP_CRC|SCF_RSP_IDX)
104104
esp_err_t error; /*!< error returned from transfer */
105-
int timeout_ms; /*!< response timeout, in milliseconds */
106105
} sdmmc_command_t;
107106

108107
/**
@@ -128,7 +127,6 @@ typedef struct {
128127
esp_err_t (*set_card_clk)(int slot, uint32_t freq_khz); /*!< host function to set card clock frequency */
129128
esp_err_t (*do_transaction)(int slot, sdmmc_command_t* cmdinfo); /*!< host function to do a transaction */
130129
esp_err_t (*deinit)(void); /*!< host function to deinitialize the driver */
131-
int command_timeout_ms; /*!< timeout, in milliseconds, of a single command. Set to 0 to use the default value. */
132130
} sdmmc_host_t;
133131

134132
/**

tools/sdk/include/driver/driver/spi_slave.h

-1
Original file line numberDiff line numberDiff line change
@@ -53,7 +53,6 @@ typedef struct {
5353
*/
5454
struct spi_slave_transaction_t {
5555
size_t length; ///< Total data length, in bits
56-
size_t trans_len; ///< Transaction data length, in bits
5756
const void *tx_buffer; ///< Pointer to transmit buffer, or NULL for no MOSI phase
5857
void *rx_buffer; ///< Pointer to receive buffer, or NULL for no MISO phase
5958
void *user; ///< User-defined variable. Can be used to store eg transaction ID.

tools/sdk/include/driver/driver/touch_pad.h

+2-2
Original file line numberDiff line numberDiff line change
@@ -31,8 +31,8 @@ typedef enum {
3131
TOUCH_PAD_NUM5, /*!< Touch pad channel 5 is GPIO12*/
3232
TOUCH_PAD_NUM6, /*!< Touch pad channel 6 is GPIO14*/
3333
TOUCH_PAD_NUM7, /*!< Touch pad channel 7 is GPIO27*/
34-
TOUCH_PAD_NUM8, /*!< Touch pad channel 8 is GPIO33*/
35-
TOUCH_PAD_NUM9, /*!< Touch pad channel 9 is GPIO32*/
34+
TOUCH_PAD_NUM8, /*!< Touch pad channel 8 is GPIO32*/
35+
TOUCH_PAD_NUM9, /*!< Touch pad channel 9 is GPIO33*/
3636
TOUCH_PAD_MAX,
3737
} touch_pad_t;
3838

tools/sdk/include/driver/driver/uart.h

+1-2
Original file line numberDiff line numberDiff line change
@@ -106,8 +106,7 @@ typedef struct {
106106
uart_parity_t parity; /*!< UART parity mode*/
107107
uart_stop_bits_t stop_bits; /*!< UART stop bits*/
108108
uart_hw_flowcontrol_t flow_ctrl; /*!< UART HW flow control mode (cts/rts)*/
109-
uint8_t rx_flow_ctrl_thresh; /*!< UART HW RTS threshold*/
110-
bool use_ref_tick; /*!< Set to true if UART should be clocked from REF_TICK */
109+
uint8_t rx_flow_ctrl_thresh ; /*!< UART HW RTS threshold*/
111110
} uart_config_t;
112111

113112
/**

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