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‎Code/ADD1/ADD1.cmd_log‎

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xst -intstyle ise -ifn "E:/Xilinx/Computer Architecture Lab/Project/ADD1/ADD1.xst" -ofn "E:/Xilinx/Computer Architecture Lab/Project/ADD1/ADD1.syr"
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xst -intstyle ise -ifn "C:/Users/home/Desktop/Project/ADD1/ADD1.xst" -ofn "C:/Users/home/Desktop/Project/ADD1/ADD1.syr"

‎Code/ADD1/ADD1.gise‎

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<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
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<generated_project xmlns="http://www.xilinx.com/XMLSchema" xmlns:xil_pn="http://www.xilinx.com/XMLSchema">
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<!-- -->
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<!-- For tool use only. Do not edit. -->
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<!-- -->
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<!-- ProjectNavigator created generated project file. -->
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<!-- For use in tracking generated file and other information -->
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<!-- allowing preservation of process status. -->
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<!-- -->
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<!-- Copyright (c) 1995-2013 Xilinx, Inc. All rights reserved. -->
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<version xmlns="http://www.xilinx.com/XMLSchema">11.1</version>
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<sourceproject xmlns="http://www.xilinx.com/XMLSchema" xil_pn:fileType="FILE_XISE" xil_pn:name="ADD1.xise"/>
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<files xmlns="http://www.xilinx.com/XMLSchema">
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<file xil_pn:fileType="FILE_CMD_LOG" xil_pn:name="ADD1.cmd_log"/>
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<file xil_pn:branch="Implementation" xil_pn:fileType="FILE_LSO" xil_pn:name="ADD1.lso"/>
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<file xil_pn:branch="Implementation" xil_pn:fileType="FILE_NGC" xil_pn:name="ADD1.ngc"/>
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<file xil_pn:branch="Implementation" xil_pn:fileType="FILE_NGR" xil_pn:name="ADD1.ngr"/>
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<file xil_pn:branch="Implementation" xil_pn:fileType="FILE_XST_PROJECT" xil_pn:name="ADD1.prj"/>
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<file xil_pn:branch="Implementation" xil_pn:fileType="FILE_XST_STX" xil_pn:name="ADD1.stx"/>
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<file xil_pn:branch="Implementation" xil_pn:fileType="FILE_XST_REPORT" xil_pn:name="ADD1.syr"/>
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<file xil_pn:branch="Implementation" xil_pn:fileType="FILE_XST" xil_pn:name="ADD1.xst"/>
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<file xil_pn:branch="Implementation" xil_pn:fileType="FILE_XST_PROJECT" xil_pn:name="ADD1_Test_beh.prj"/>
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<file xil_pn:branch="BehavioralSim" xil_pn:fileType="FILE_ISIM_EXE" xil_pn:name="ADD1_Test_isim_beh.exe"/>
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<file xil_pn:fileType="FILE_ISIM_MISC" xil_pn:name="ADD1_Test_isim_beh.wdb"/>
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<file xil_pn:branch="Implementation" xil_pn:fileType="FILE_XST_PROJECT" xil_pn:name="ADD1_Test_stx_beh.prj"/>
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<file xil_pn:fileType="FILE_HTML" xil_pn:name="ADD1_envsettings.html"/>
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<file xil_pn:fileType="FILE_HTML" xil_pn:name="ADD1_summary.html"/>
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<file xil_pn:branch="Implementation" xil_pn:fileType="FILE_XST_PROJECT" xil_pn:name="ADD1_vhdl.prj"/>
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<file xil_pn:fileType="FILE_XRPT" xil_pn:name="ADD1_xst.xrpt"/>
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<file xil_pn:fileType="FILE_XMSGS" xil_pn:name="_xmsgs/xst.xmsgs"/>
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<file xil_pn:fileType="FILE_LOG" xil_pn:name="fuse.log"/>
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<file xil_pn:fileType="FILE_DIRECTORY" xil_pn:name="isim"/>
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<file xil_pn:branch="BehavioralSim" xil_pn:fileType="FILE_CMD" xil_pn:name="isim.cmd"/>
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<file xil_pn:branch="BehavioralSim" xil_pn:fileType="FILE_LOG" xil_pn:name="isim.log"/>
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<file xil_pn:fileType="FILE_FITTER_REPORT" xil_pn:name="webtalk_pn.xml"/>
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<file xil_pn:branch="BehavioralSim" xil_pn:fileType="FILE_INI" xil_pn:name="xilinxsim.ini"/>
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<file xil_pn:fileType="FILE_DIRECTORY" xil_pn:name="xst"/>
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</files>
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<transforms xmlns="http://www.xilinx.com/XMLSchema">
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<transform xil_pn:end_ts="1610558427" xil_pn:name="TRAN_copyInitialToAbstractSimulation" xil_pn:start_ts="1610558427">
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<status xil_pn:value="SuccessfullyRun"/>
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<status xil_pn:value="ReadyToRun"/>
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</transform>
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<transform xil_pn:end_ts="1610558549" xil_pn:in_ck="-1110074110283462989" xil_pn:name="TRAN_copyAbstractToPostAbstractSimulation" xil_pn:start_ts="1610558549">
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<status xil_pn:value="SuccessfullyRun"/>
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<status xil_pn:value="ReadyToRun"/>
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<outfile xil_pn:name="ADD1.vhd"/>
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<outfile xil_pn:name="ADD1_Test.vhd"/>
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</transform>
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<transform xil_pn:end_ts="1610558508" xil_pn:name="TRAN_xawsToSimhdl" xil_pn:prop_ck="3793106382867566120" xil_pn:start_ts="1610558508">
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<status xil_pn:value="SuccessfullyRun"/>
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<status xil_pn:value="ReadyToRun"/>
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</transform>
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<transform xil_pn:end_ts="1610558508" xil_pn:name="TRAN_schematicsToHdlSim" xil_pn:prop_ck="2197135856267426666" xil_pn:start_ts="1610558508">
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<status xil_pn:value="SuccessfullyRun"/>
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<status xil_pn:value="ReadyToRun"/>
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<transform xil_pn:end_ts="1610558427" xil_pn:name="TRAN_regenerateCoresSim" xil_pn:prop_ck="6865490367585752518" xil_pn:start_ts="1610558427">
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<status xil_pn:value="SuccessfullyRun"/>
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<status xil_pn:value="ReadyToRun"/>
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<status xil_pn:value="SuccessfullyRun"/>
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<status xil_pn:value="ReadyToRun"/>
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<outfile xil_pn:name="ADD1.vhd"/>
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<outfile xil_pn:name="ADD1_Test.vhd"/>
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</transform>
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<transform xil_pn:end_ts="1610558552" xil_pn:in_ck="-1110074110283462989" xil_pn:name="TRAN_ISimulateBehavioralModelRunFuse" xil_pn:prop_ck="8192028397516866393" xil_pn:start_ts="1610558549">
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<status xil_pn:value="SuccessfullyRun"/>
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<status xil_pn:value="ReadyToRun"/>
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<status xil_pn:value="OutOfDateForOutputs"/>
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<status xil_pn:value="OutputChanged"/>
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<outfile xil_pn:name="ADD1_Test_beh.prj"/>
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<outfile xil_pn:name="ADD1_Test_isim_beh.exe"/>
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<outfile xil_pn:name="fuse.log"/>
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<outfile xil_pn:name="isim"/>
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<outfile xil_pn:name="isim.log"/>
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<outfile xil_pn:name="xilinxsim.ini"/>
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</transform>
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<transform xil_pn:end_ts="1610558553" xil_pn:in_ck="-8726514929708259224" xil_pn:name="TRAN_ISimulateBehavioralModel" xil_pn:prop_ck="3652877339119595206" xil_pn:start_ts="1610558552">
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<status xil_pn:value="SuccessfullyRun"/>
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<status xil_pn:value="ReadyToRun"/>
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<status xil_pn:value="OutOfDateForOutputs"/>
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<status xil_pn:value="OutputChanged"/>
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<outfile xil_pn:name="ADD1_Test_isim_beh.wdb"/>
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<outfile xil_pn:name="isim.cmd"/>
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<outfile xil_pn:name="isim.log"/>
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</transform>
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<transform xil_pn:end_ts="1610558433" xil_pn:name="TRAN_copyInitialToXSTAbstractSynthesis" xil_pn:start_ts="1610558433">
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<status xil_pn:value="SuccessfullyRun"/>
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<status xil_pn:value="ReadyToRun"/>
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</transform>
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<transform xil_pn:end_ts="1610558433" xil_pn:name="TRAN_schematicsToHdl" xil_pn:prop_ck="4805823858898720408" xil_pn:start_ts="1610558433">
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<status xil_pn:value="SuccessfullyRun"/>
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<status xil_pn:value="ReadyToRun"/>
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</transform>
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<transform xil_pn:end_ts="1610558433" xil_pn:name="TRAN_regenerateCores" xil_pn:prop_ck="6865490367585752518" xil_pn:start_ts="1610558433">
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<status xil_pn:value="SuccessfullyRun"/>
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<status xil_pn:value="ReadyToRun"/>
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</transform>
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<transform xil_pn:end_ts="1610558433" xil_pn:name="TRAN_SubProjectAbstractToPreProxy" xil_pn:start_ts="1610558433">
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<status xil_pn:value="SuccessfullyRun"/>
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<status xil_pn:value="ReadyToRun"/>
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</transform>
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<transform xil_pn:end_ts="1610558433" xil_pn:name="TRAN_xawsTohdl" xil_pn:prop_ck="-528987301814060202" xil_pn:start_ts="1610558433">
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<status xil_pn:value="SuccessfullyRun"/>
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<status xil_pn:value="ReadyToRun"/>
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</transform>
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<transform xil_pn:end_ts="1610558433" xil_pn:name="TRAN_SubProjectPreToStructuralProxy" xil_pn:prop_ck="-3893270297158069842" xil_pn:start_ts="1610558433">
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<status xil_pn:value="SuccessfullyRun"/>
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<status xil_pn:value="ReadyToRun"/>
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</transform>
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<transform xil_pn:end_ts="1610558433" xil_pn:name="TRAN_platgen" xil_pn:prop_ck="9066437138986960720" xil_pn:start_ts="1610558433">
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<status xil_pn:value="SuccessfullyRun"/>
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<status xil_pn:value="ReadyToRun"/>
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</transform>
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<transform xil_pn:end_ts="1610891860" xil_pn:in_ck="2860739717386" xil_pn:name="TRANEXT_xstsynthesize_spartan3e" xil_pn:prop_ck="5326813977997775740" xil_pn:start_ts="1610891809">
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<status xil_pn:value="SuccessfullyRun"/>
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<status xil_pn:value="WarningsGenerated"/>
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<status xil_pn:value="ReadyToRun"/>
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<status xil_pn:value="OutOfDateForOutputs"/>
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<status xil_pn:value="OutputChanged"/>
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<outfile xil_pn:name="ADD1.lso"/>
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<outfile xil_pn:name="ADD1.ngc"/>
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<outfile xil_pn:name="ADD1.ngr"/>
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<outfile xil_pn:name="ADD1.prj"/>
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<outfile xil_pn:name="ADD1.stx"/>
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<outfile xil_pn:name="ADD1.syr"/>
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<outfile xil_pn:name="ADD1.xst"/>
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<outfile xil_pn:name="ADD1_Test_beh.prj"/>
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<outfile xil_pn:name="ADD1_Test_stx_beh.prj"/>
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<outfile xil_pn:name="ADD1_vhdl.prj"/>
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<outfile xil_pn:name="ADD1_xst.xrpt"/>
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<outfile xil_pn:name="_xmsgs/xst.xmsgs"/>
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<outfile xil_pn:name="webtalk_pn.xml"/>
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<outfile xil_pn:name="xst"/>
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</transform>
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</transforms>
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</generated_project>

‎Code/ADD1/ADD1.lso‎

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work

‎Code/ADD1/ADD1.ngc‎

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‎Code/ADD1/ADD1.ngr‎

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XILINX-XDB 0.1 STUB 0.1 ASCII
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XILINX-XDM V1.6e
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‎Code/ADD1/ADD1.prj‎

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vhdl work "ADD1.vhd"

‎Code/ADD1/ADD1.stx‎

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